Question: Convert binary 111111110010 to hexadecimal. A.EE216 B.FF216 C.2FE16D.

FD216 Answer:B

Question: Convert the binary number 1001.00102 to decimal. A.90.125 B.9.125 C.125 D.12.5 Answer:B

Question: How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate to go HIGH? A. any one of the inputs B. any two of the inputs C. any three of the inputs D. all four inputs Answer :d

Answer:c .At least one input must be LOW.At least one input must be HIGH.Question: If the output of a three-input AND gate must be a logic LOW. D. what must the condition of the inputs be? A. All inputs must be LOW B.All inputs must be HIGH. C.

Question: How many 3-line-to-8-line decoders are required for a 1-of-32 decoder? A.2 C.1 B.4 D.8 Answer:C .

d Answer:D . a B.Question: Which of the circuits in figure (a to d) is the sum-ofproducts implementation of figure (e)? A. b C. c D.

three inputs and two outputs Answer:D . three inputs and one output D.Question: A full subtracter circuit requires ________. A.two inputs and three outputs C. two inputs and two outputs B.

to active the entire chip D. to connect ground C. to apply Vcc B. to active one half of the chip Answer:C .Question: What is the function of an enable input on a multiplexer chip? A.

counter system Answer:B .Question: The expansion inputs to a comparator are used for expansion to a(n): A.BCD system D.4-bit system B.8-bit system C.

single-pole relay B.DPDT switch C. linear stepper Answer:C . rotary switch D.Question: A basic multiplexer principle can be demonstrated through the use of a: A.

HIGH C. and the input be LOW. Cannot be determined Answer: A .LOW B. let all D inputs be LOW. both S inputs be HIGH. What is the status of the Y output? A. Don't Care D.Question: For the device shown here.

Cannot be determined Answer:A . let all D inputs be LOW.HIGH C. and the input be HIGH. What is the status of the Y output? A.LOW B.Question: For the device shown here. Don't Care D. both S inputs be HIGH.

to a high impedance C. active-HIGH B. the related output will switch: A.Question: A principle regarding most IC decoders is that when the correct input is present. active-LOW Answer:D . to an open D.

a LOW on all gate enable inputs C.Question: What control signals may be necessary to operate a 1-line-to-16 line decoder? A. input from a hexadecimal counter D. a HIGH on all gate enable circuits Answer:B . flasher circuit control signal B .

Question: One multiplexer can take the place of: A. several SSI logic gates or combinational logic circuits Answer:D . several SSI logic gates B. several Ex-NOR gates D. combinational logic circuits C.

10 D.1 Answer: A .8 C.Question: How many inputs are required for a 1-of-10 BCD decoder? A.4 B.

Question: Convert 59.7210 to BCD. A.111011 B.01011001.01110010 C.1110.11 D.0101100101110010 Answer:B

Question: Which is typically the longest: bit, byte, nibble, word? A. Bit B. Byte C. Nibble D. Word Answer:D

Question: Assign the proper odd parity bit to the code 111001. A.1111011 B.1111001 C.0111111 D.0011111 Answer:B

D. Answer:C . C. Parity checking is capable of detecting and correcting errors in transmitted codes. B.Question: Select the statement that best describes the parity method of error detection: A. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. Parity checking is not suitable for detecting single-bit errors in transmitted codes. Parity checking is best suited for detecting single-bit errors in transmitted codes.

Ex-NOR gate B.OR gate C. Ex-OR gate D.Question: Identify the type of gate below from the equation A.NAND gate Answer:C .

B. The first output is inverted.Question: How is odd parity generated differently from even parity? A. The last output is inverted. Answer:B .

while the PAL only has a programmable AND plane. The PAL has a programmable OR plane and a programmable AND plane. C. The PAL has more possible product terms than the PLA. while the PLA only has a programmable AND plane. The PLA has a programmable OR plane and a programmable AND plane. Answer: A . PALs and PLAs are the same thing. B. D.Question: The difference between a PLA and a PAL is: A.

on. byte B. decimal Answer:B . odd. negative. even. upper. positive. digit D. off. bit C. lower. A.Question: Parity systems are defined as either________ or ________ and will add an extra ________ to the digital information being transmitted.

when A = 0.Question: Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. when A = 0. A. X is the same as B. C. X is the inverse of B. X is the inverse of B. X is the same as B. B. when A = 0. X is the inverse of B. X is the inverse of B. Using A as the control. When A = 1. When A = 1. Using A as the control. When A = 1. X is the same as B. when A = 0. D. Answer:B . When A = 1. X is the same as B. Using A as the control. Using A as the control.

45 C.6 Answer:C .3 B.5 D.Question: How many flip-flops are required to make a MOD-32 binary counter? A.

Question: Which statement BEST describes the operation of a negative-edge-triggered D flipflop? A. C. The logic level at the D input is transferred to Q on NGT of CLK. The Q output is ALWAYS identical to the D input. The Q output is ALWAYS identical to the D input when CLK = PGT. D. The Q output is ALWAYS identical to the CLK input if the D input is HIGH. B. Answer:A .

K = 0 C.J = 1. K = 1 D.Question: How is a J-K flip-flop made to toggle? A.J = 1. K = 1 Answer:D .J = 0. K = 0 B.J = 0.

passed to the AND function for output Answer:B . sent immediately to an output pin D.Question: Each programmable array logic (PAL) gate product is applied to an OR gate and. the product is ORed and then: A. the polarity fuse is restored B. sent to an inverter for output C. if combinational logic is desired.

Buffers D. Latches Answer:C .Question:________ are used at the inputs of PAL/GAL devices in order to prevent input loading from a large number of AND gates. A. Fuses C. Simplified AND gates B.

P = 0. P = 0 B. P = 0 C. P = 1 D. P = 0. P = 1. P = 1 Answer:D .Question: Determine odd parity for each of the following data words: 1011101 11110111 1001101 A.P = 1.P = 0. P = 0. P = 1.P = 1.

and frequency division C. counting operations. and frequency multiplication D. sequencing. counting operations.Question: Integrated-circuit counter chips are used in numerous applications including: A. and frequency multiplication Answer:B . and frequency multiplication B. data generation. decoding operations. timing operations. timing operations. timing operations. sequencing. sequencing. counting operations. sequencing.

input clock pulses are not used to activate any of the counter stages D. input clock pulses are applied only to the last stage C. input clock pulses are applied simultaneously to each stage Answer:D . input clock pulses are applied only to the first and last stages B.Question: Synchronous counters eliminate the delay problems encountered with asynchronous counters because the: A.

Question: What is the difference between combinational logic and sequential logic? A .Combinational circuits are not triggered by timing pulses. C. Combinational and sequential circuits are both triggered by timing pulses. B. Neither circuit is triggered by timing pulses. Answer:A . sequential circuits are triggered by timing pulses.

2728 C. 0101111002 A.Question: Convert the following binary number to octal.1748 D.2748 Answer:D .1728 B.

100 Answer:A .2 C.3 D.Question: How many binary digits are required to count to 10010? A.7 B.

100010 B.Question: The binary number for octal 458 is ________.100101 C. A.100100 Answer:B .110101 D.

d Answer:B .Question: Which of the figures in figure (a to d) is equivalent to figure (e)? A. a B. c D.b C.

4 Answer:C .3 D.2 C.Question: How many data select lines are required for selecting eight inputs? A.1 B.

decimal-to-hexadecimal B. odd parity to even parity Answer:B . multiple outputs C.Question: Most demultiplexers facilitate which type of conversion? A. ac to dc D. single input.

Question: Why can a CMOS IC be used as both a multiplexer and a demultiplexer? A. It cannot be used as both. Answer:B .CMOS uses bidirectional switches. B.

Question:A flip-flop has ________. one stable state B. no stable states C. none of the above Answer:C . two stable states D. A.

coded representation of a shaft's mechanical position B.Question: The primary use for Gray code is: A. to represent the correct ASCII code to indicate the angular position of a shaft on rotating machinery D. to convert the angular position of a shaft on rotating machinery into hexadecimal code Answer:A . turning on/off software switches C.

10 Answer:A . A.625 B.0.Question: Convert the fractional binary number 0000.0.0.55 D.0.1010 to decimal.50 C.

B.Question: The simplest equation which implements the Kmap shown below is: A. D. . C.

nine's-complement code B.excess-3 code D.8421 code C. Gray code Answer:D .Question: A binary code that progresses such that only one bit changes between two successive codes is: A.

Boolean algebra and Karnaugh mapping B.Question: Which of the following statements accurately represents the two BEST methods of logic circuit simplification? A. Boolean algebra and actual circuit trial and error evaluation Answer:A . Karnaugh mapping and circuit waveform analysis C. Actual circuit trial and error evaluation and waveform analysis D.

A.100100 Answer:C .100001 C.110011 B.Question: The sum of 11101 + 10111 equals ________.110100 D.

duty cycle Answer:A .MSB B.LSB D. frequency C.Question: A binary number's value changes most drastically when the ________ is changed. A.

Question: What is an analog-to-digital converter? A. It stores information on a CD. C. Answer:B . It takes analog signals and puts them in digital format. D. It makes digital signals B. It allows the use of digital signals in everyday life.

Answer:A . All logic circuits are reduced to nothing more than simple AND and OR operations. not including inverters. B. The delay times are greatly reduced over other forms. No signal must pass through more than two gates.Question: Which of the following is an important feature of the sum-of-products form of expressions? A. The maximum number of gates that any signal must pass through is reduced by a factor of two. C. D.

both of the above D. when the gate is LOW B. neither of the above Answer:B .Question: On a master-slave flip-flop. when is the master enabled? A. when the gate is HIGH C.

Serial in/parallel out register C. Parallel in/parallel out register B. Parallel-access shift register Answer:D .Question: What type of register is shown below? A. Serial/parallel-in parallel-out register D.

equality gate C.Question: The Ex-NOR is sometimes called the ________. parity gate B. inverted OR D. parity gate or the equality gate Answer:B . A.

Question: What is another name for digital circuitry called sequential logic? A. Inverter Answer:C . flip-flop memory circuitry D. logic macrocell B. logic array C.

More than 30 years ago D.Question: When did the first PLD appear? A. More than 40 years ago Answer:C . More than 10 years ago B. More than 20 years ago C.

Question: The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator.A > B = 0.A > B = 1. A < B = 1 B. A < B = 1. A = B = 1 Answer:C .A > B = 0. A = B = 0 C.A > B = 1. A < B = 1. A = B = 0 D. A < B = 0. What are the output levels? A. A < B = 0.

a LOW output for all possible HIGH input conditions. a DON'T CARE condition for all possible input truth table combinations. Answer:A .Question: Each "1" entry in a K-map square represents: A. C. a HIGH for each input truth table condition that produces a HIGH output. B. D. a HIGH output on the truth table for all LOW input combinations.

D. variables within the loop that appear in both complemented and uncomplemented form.Question:Looping on a K-map always results in the elimination of: A . Answer:C . B. variables that remain unchanged within the loop.variables within the loop that appear only in their uncomplemented form.variables within the loop that appear only in their complemented form. C.

Question: Which of the following is not a weighted value positional numbering system: A. binary-coded decimal C. binary D. Octal Answer:B . hexadecimal B.

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