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Assembly code
Fourth-generation languages
Fifth-generation languages
1. Program is created in the editor and stored on disk 2. Preprocessor program processes the code 3. Compiler creates object code and stores it on disk. 4. Linker links the object code with the libraries
4. Link
5. Load 6. Execute
Primary Memory
CPU
6. CPU takes each instruction and executes it, possibly storing new data values as the program executes
Summary
HDL
HDL
Combined with modern Field Programmable Gate Array chips large complex circuits (>100000s of gates) can be implemented.
HDLs
Verilog HDL ABEL VHDL Large standard developed by US DoD VHDL = VHSIC HDL VHSIC = Very High Speed Integrated Circuit
Easier to use in many ways = better for teaching C - like syntax
Verilog HDL
Modules have inputs and outputs Modules can be built up of Verilog primatives or of user defined submodules.
endmodule
HDL Summary
Hardware Description Languages allow fast design and verification of digital circuits. Accurate simulation and testing requires delays and inputs to be specified. There are three different levels of abstraction for modelling circuits.
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Codesign Language
Has no tool support. Only useful for influencing other languages. Lacks CAD tool support
SystemC History
VSIA SLD Data Types Spec (draft)
Synopsys
ATG
Synopsys
Scenic
UC Irvine 1996
Synopsys
Fridge
SystemC v1.0 Apr. 00
Frontier Design
A/RT Library 1991 imec 1992
CoWare
N2C 1997
Abstract Protocols
SystemC Highlights
Clocks Cycle-based simulation Multiple abstraction levels Communication protocols Debugging support Waveform tracing
Manual Conversion
VHDL/Verilog
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Analysis
Results
Problems
Errors in manual conversion from C to HDL Disconnect between system model and HDL model Multiple system tests