DEPARTMENT OF TECHNICAL EDUCATION ANDHRA PRADESH

Name Designation Branch Institute Year/Semester Subject Subject Code Topic Duration Sub Topic Teaching Aids : V. SURYA PRAKASH RAO : Sr.Lecturer : Electronics & Communication Engg. : Govt. Polytechnic, Warangal. : III semester : Digital Electronics : EC-304 (9/15) : Combinational Logic Circuits : 50 min : Multiplexers : Animation & images.
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MULTIPLEXER

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Recapitulation
In the earlier classes, we have discussed about • Serial Adder • Parallel Adder • Comparison of Serial and Parallel Adders.

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Objectives
On completion of this period, you would be able to know

• Operation of 4x1 Multiplexer

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Multiplexer
• “Selects” binary information from one of many input lines and directs it to a single output line. • Also known as the “Data selector” circuit, selection is controlled by a particular set of inputs lines whose number depends on the number of the data input lines.

• For a 2n-to-1 multiplexer, there are 2n data input lines and n selection lines whose bit combination determines which input is selected.

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4 x 1 MULTIPLEXER
Enable

4 input lines

Data Output

Fig:1

Input Select

S1 S0

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4-to-1 MUX (Gate level)
Control Section

Three of these signal inputs will always be 0. The other will depend on the data value selected

Fig:3
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Implementing Boolean functions with Multiplexers (MUX)
• Any Boolean function of n variables can be implemented using a 2n-1-to-1 multiplexer. A MUX is basically a decoder with outputs ORed together, hence this isn’t surprising. • The SELECT signals generate the minterms of the function. • The data inputs identify which minterms are to be combined with an OR.
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Example
•F(X,Y,Z) = X’Y’Z + X’YZ’ + XYZ’ + XYZ = Σm(1,2,6,7) •There are n=3 inputs, thus we need a 22-to-1 MUX •The first n-1 (=2) inputs serve as the selection lines

Fig:5
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Efficient Method for implementing Boolean functions
For an n-variable function (e.g., f(A,B,C,D)): • Need a 2n-1 line MUX with n-1 select lines. • Enumerate function as a truth table with consistent ordering of variables (e.g., A,B,C,D) • Attach the most significant n-1 variables to the n-1 select lines (e.g., A,B,C)

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• Examine pairs of adjacent rows (only the least significant variable differs, e.g., D=0 and D=1). • Determine whether the function output for the (A,B,C,0) and (A,B,C,1) combination is (0,0), (0,1), (1,0), or (1,1). • Attach 0, D, D’, or 1 to the data input corresponding to (A,B,C) respectively.

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Another Example
• Consider F(A,B,C) = ∑m(1,3,5,6). We can implement this function using a 4-to-1 MUX as follows. • The index is ABC. Apply A and B to the S1 and S0 selection inputs of the MUX (A is most sig, S1 is most sig.) • Enumerate function in a truth table.

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MULTIPLEXER Example
A B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 0 1 0 1 0 1 1 0

When A=B=0, F=C When A=0, B=1, F=C When A=1, B=0, F=C When A=B=1, F=C’

0 0 0 0 1 1 1 1

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implementation of F(A,B,C) = ∑m(1,3,5,6) using MULTIPLEXER
A

B C C C C’
Fig:6
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F

Or Simply….

C C C C

11 10 01 00

F

A B
Fig:7

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Multiplexer as a Universal Gate
• We can construct OR, AND, and NOT gates using 2-to1 MUXs. Thus, 2-to-1 MUX is a universal gate. OR 1
Z x

NOT

AND

x1
z = x1+ x1’x0 z = 0x + 1x’ = x’
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z = x1x0 + 0x0’ = x1x0
16

= x1x0’ + x1x0 + x1’x0 = x1 + x0

QUIZ

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1. The circuit that selects one of 8 inputs is
known as
A. C. E. 1x8 demultiplexer 8x1 multiplexer 1x8 multiplexer

D. 8x1 demultiplexer

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2. A multiplexer has
A. One data input and number of data outputs B. One data output and number of data inputs C. One data output,a number of data inputs and a number of select input. D. One data output and a number of select input.

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3. A multiplexer with 4-bit data select input is a
A. 4:1 multiplexer B. 8:1 multiplexer C. 16:1 multiplexer D. 32:1 multiplexer

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4. A 4-variable logic expression can be realized by
using only one
A. Nand gate B. Nor gate C. Demultiplexer D. 16:1 multiplexer

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Frequently Asked Questions (FAQ)
1. 3. Define the multiplexer? Explain the working of 4x1 multiplexer.

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Assignment
1. List the applications of multiplexers.

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