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# DEPARTMENT OF TECHNICAL EDUCATION

## NAME : K.SRI LAKSHMI

DESIGNATION : LECTURER
BRANCH : ELECTRONICS AND
COMMUNICATION ENG.
SEMESTER : III SEMESTER
SUBJECT : DIGITAL ELECTRONICS
SUBJECT CODE : CM-305
TOPIC : FLIP FLOPS
DURATION : 100 min
SUB TOPIC : MASTER-SLAVE FLIP FLOP, Flip- Flop.
Ics
TEACHING AIDS : DIAGRAM,TRUTH TABLE
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OBJECTIVES

## • the elimination of race condition, working of master

slave J-K flip flop .

## • The different TTL technology and CMOS technology

Flip-flop IC chips

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Recap

## • Draw backs of JK flip flop

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J-K MASTER SLAVE FLIP- FLOP

## • A master slave flip flop is a combination of two

clocked flip flops , the first is called the master and
second is called slave.

## • Master is positively clocked and slave is

negatively clocked.

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On summarizing the working of J-K master slave
flip flop,

## 4. While the clock is high ,the master is active ,and

the slave is inactive.

## 7. While the clock is low , the master is inactive and

the slave is active.

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S
J
Q
clk
MASTER SLAVE

Q
K R
R
RR

## FIG(1) MASTER-SLAVE FLIP-FLOP

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• In a master slave J-K flip flop assume low Q and
high Q for an input clock high , the master goes in
to the set state producing high ‘S’ and low ‘R’.

## • No change in Q and Q output . As the slave in

inactive while the clock is high.

• When clock goes low, the high ‘S’ and low ‘R’
forces the slave in to the set state producing a
high Q and low Q.

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• There are two distinct steps in setting the final
Q output .
• The Master is set while the clock is high.
• The slave is set while the clock is low.
• The truth table below in fig(2) ,shows that when
clock is high & J=1, K=0 the flip flop set.
• When clock is high , and J=0,K=1.the flip flop reset.
• When clock is high and J=K=0, no change .
• when clock is high J=K=1,then the flip flop toggles.

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TRUTH TABLE OF J-K MASTER FLIP FLOP

INPUTS OUTPUTS
COMMENT
CLK J K Q(n+1)
NO CHANGE
X 0 0 Qn

1 RESET
0 0
1 SET
1 0
Qn TOGGLE
1 11

## FIG(2) truth table of master-slave flip-flop

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IC NUMBER FUNCTION

## 7476 Dual j-k Flip Flop

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IC NUMBER FUNCTION
74107 Dual j-k Flip Flop

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Summary

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Quiz

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Questions

## 3. What is the state called when J and K are high

along with clock in master slave J-K flip flop?

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