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Department of Technical Education

Andhra Pradesh

Name : P. Srinivasa Rao


Designation : Lecturer
Branch : Electronics & Communication Engg.
Institute : Andhra Polytechnic, Kakinada
Year/Semester : III semester
Subject : Digital Electronics
Subject code : CM-305
Topic : Counters & registers
Duration : 50mts
Sub topic : Synchronous Counter
Teaching Aids : PPT. Diagrams

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OBJECTIVES

On completion of this period, you would be able to

• Know the working 4 bit synchronous counter

• Draw the circuit diagram 4 bit synchronous counter

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RECOLLECT

1. What is a counter?
It is a group of flip flops which counts the number of
clock pulses arrived at the input.

5. What is a Flip Flop?


It is a sequential circuit which is used for storing one bit
of data.

3. For what input the and gate give high output when all
input are high (logic)

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Introduction

• Synchronous counter is clocked such that each flip


flop is triggered at the same time.

• All the flip flops used in synchronous counter are clocked


simultaneously.

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• The number of flip flops required are depending upon
the various factors.

• For ‘n’ bit counter, number of flip flops are equal to ‘n’. It
can counts up to 2n.

Ex: For 4 bit counter, the no. of flip flops are 4.

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Notations of synchronous counter

• Lower order flip flop is complemented with every


pulse.

• J&K inputs must be maintained at the logic 1

• A Flip flop in any other position is complemented


with a pulse provided all bits in the lower order
positions are equal to 1.

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• The binary count dictates that the next higher order bit

should be complemented.

• These are easily constructed with complementing flip

flops & gates.

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CIRCUIT DIAGRAM

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• J&K: Synchronous inputs which must be high. If
J=K=1,ouput toggles i.e. the ouput changes alternatively
from 0 to 1 (or) 1 to 0.

• QA,QB, QC &QD: The outputs which are entirely dependent


on the clock pulses and J&K inputs.

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• CLK: It is a timing signal given at the inputs
simultaneously to all the flip flops.

• G1&G2: AND gates which produces output Logic 1 only


when both inputs are high.

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SUMMARY

• Synchronous counter is clocked such that each flip


flop is triggered at the same time.

• For 4 bit counter, the no. of flip flops are 4.

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QUIZ

4. How many flip flops are required for 3 bit


synchronous counter?

a) 4

b) 3

c) 2

d) None

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2. By using 5 bit counter the max count is?

a) 30

b) 5

c) 32

d) none

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1. In synchronous counter the clock pulses are given to
all flip flops in the manner of

a) one by one

b) Simultaneously

c) a&b

d) none

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Questions

1. Draw the logic circuit of 4- bit synchronous counter

4. Describe the construction of 4- bit synchronous


counter.

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