November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah

Cornell University (ECE) Fall 2005
INTEGRATOR
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
TRANSLINEAR INTEGRATOR
Eng Teck Ong Chirag Shah
Erinc Tokluoglu Ojas Shah
Cornell University
College oI Electrical and Computer Engineering
Fall 2005
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
OUTLINE
What are Translinear Circuits?
Translinear Loop Principle (TLL)
Translinear Circuits
Square Root Circuit
Multiplier/Divider Circuit
Integrator Circuit
ReIerences
Question and Answers
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Characteristics
W Current Mode instead oI voltage mode
W Typically used Ior Math operations
%5es
W $6:are root domain
MOSFETs in strong inversion (saturation):
ID ÷ u
n
C
ox
*(W/2L) *(V
GS
-V
Tn
)
2
· 5onential/Logarithmic domain circ:its:
Ts in linear/active region :
I
C
÷ I
S
*exp (V

/V
T
- 1)
MOSFETs in sub-threshold region
TRANSLINEAR CIRCUITS
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Characteristics
W Current Mode instead oI voltage mode
W Typically used Ior Math operations
%5es
W $6:are root domain
MOSFETs in strong inversion (saturation):
ID ÷ u
n
C
ox
*(W/2L) *(V
GS
-V
Tn
)
2
· 5onential/Logarithmic domain circ:its:
Ts in linear/active region :
I
C
÷ I
S
*exp (V

/V
T
- 1)
MOSFETs in sub-threshold region
TRANSLINEAR CIRCUITS
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
TRANSLINEAR LOOP
PRINCIPLE
irchoff`s Voltage Law
-V
GS1
¹ V
GS2
- V
GS3
¹ V
GS4
÷ 0
V
GS1
¹ V
GS3
÷ V
GS2
¹ V
GS4
MO$% C:rrent 6:ation
I
D
÷ K(V
GS
-V
Tn
)
2
V
GS
÷ V
Tn
¹
V
Tn
¹ \ (I
D1
/K) ¹ V
Tn
¹ \ (I
D3
/K) ÷ V
Tn
¹ \ (I
D2
/K) ¹ V
Tn
¹ \ (I
D4
/K)
\ I
D1
+ \I
D3
= \ I
D2
+ \ I
D4
/K) (I
D
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Square Root Circuit
I
x1
and I
x2
two input currents
· '
s1
-'
s4
+ '
s3
- '
s2
=0 (1)
· '
th1
= '
th4
, '
th2
= '
th3
· \(I
1
) + \(I
3
) = \(I
2
) + \(I
4
)
· I
7
= I
z
, I
3
= I
x2
, I
1
= I
x1
· I
2
= I
z
+ .5(I
x1
+ I
x2
) - I
x4
(3)
· I
x1
+ I
4
= I
2
+ I
3
- (I
x2
- I
x1
) (4)
· I
4
= I
2
+ I
3
- I
x2
, I
4
= I
2
· I
2
= I
z
/2 + (I
x1
+I
x2
)/4 (5)
· From (2)
\(I
x1
)+ \(I
x2
)=2* \ (I
z
/2)+(I
x1
+I
x2
)/4
I
z
= \(I
x1
*I
x2
)
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Operation oI the Square root Circuit
DC Rane of Operation:
10µA < Ì2 < 150µA with less than %3 error.
Current Conditions:
Ì2>Ì1 The current should be sinking down from the drain of M6
to gnd to get the square root equation of operation.
AÌ = Ì2 ÷Ì1 < 100µA
%ransient AnaIysis:
Ì1dc = 40µA Ì1ac = 2sin(wt)µA w=2¬1000rads/s
Ì2dc = 80µA
Ìzdc = 56.57µA Ìzac = 1.414sin(wt)µA
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
MULTIPLIER CIRCUIT
Four Quadrant Multiplier: Composed oI two squaring circuits
I
out
÷ I
z
÷ I
x1
I
x2
/ 2I
x3
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
SQUARING CIRCUIT
Ì
z
= 2 Ì
x3
+ (Ì
x1
+ Ì
x2
)
2
/8 Ì
x3
\(Ì
1
) + \(Ì
3
) = \(Ì
2
) + \(Ì
4
)
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
MULTIPLIER CIRCUIT
Four Quadrant Multiplier: Composed oI two squaring circuits
2I
x3
¹ (I
x1
¹ I
x2
)
2
/ 8I
x3
2I
x3
¹ (I
x1
- I
x2
)
2
/ 8I
x3
I
out
÷ I
z
÷ 2I
x3
¹ (I
x1
¹ I
x2
)
2
/ 8I
x3
2I
x3
- (I
x1
- I
x2
)
2
/ 8I
x3
÷ 4 I
x1
I
x2
/ 8I
x3
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Operation oI the Square root Circuit
DC Rane of Operation:
10µA < Ì2 < 150µA with less than %3 error.
Current Conditions:
Ì2>Ì1 The current should be sinking down from the drain of M6
to gnd to get the square root equation of operation.
AÌ = Ì2 ÷Ì1 < 100µA
%ransient AnaIysis:
Ì1dc = 40µA Ì1ac = 2sin(wt)µA w=2¬1000rads/s
Ì2dc = 80µA
Ìzdc = 56.57µA Ìzac = 1.414sin(wt)µA
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
INTEGRATOR PRINCIPLE
dt
dJ
C I
gs
cap

2
) (
2
%3 gs out
J J
B
I
cap
out
out
I
C
BI
dt
dI
2

November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
TRANSLINEAR INTEGRATOR
3
out
I
dt
dI
-
3 cap o out
I I I I I
02 1

cap
out
out
I
C
BI
dt
dI
2

B I
I C
o
2
02
1
-
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Square Root Domain Integrator
Four Quadrant Multiplier
Square Root Circuit
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
Operation oI the Square root Circuit
DC Rane of Operation:
10µA < Ì2 < 150µA with less than %3 error.
Current Conditions:
Ì2>Ì1 The current should be sinking down from the drain of M6
to gnd to get the square root equation of operation.
AÌ = Ì2 ÷Ì1 < 100µA
%ransient AnaIysis:
Ì1dc = 40µA Ì1ac = 2sin(wt)µA w=2¬1000rads/s
Ì2dc = 80µA
Ìzdc = 56.57µA Ìzac = 1.414sin(wt)µA
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
REFERENCES
W K. ult and H. Wallinga, 'A CMOS Iour-Quadrant analog multiplier,¨ IEEE J. Sold-
State C7cuts, vol. SC-°1, no. 3, pp. 430-435, une 1986.
· J. Mulder, W. A. Serdjin, A. C. van der woerd and A. H. M. van Roermund, "A 3.3
V Current-Controlled \- Domain Oscillator.¨ ÌEEE Jour. Delft Univ. 1998.
· K. Bult and H. Wallinga, ``A class of analog CMOS circuits based on the square-
law characteristic of an MOS transistor in saturation.'' ÌEEE Jour. of Solid State
Circ. 22(3), pp. 357±365, June 1987.
· R. J. Wiegerink, ``Analysis and synthesis of MOS translinear circuits.'' PhD
thesis, Twente University of Technology, Enschede, 1992.
· J. Mulder, A. C. van der Woerd, W. A. Serdijin, A. H. M. van Roermund, "Current
Mode Companding \x ÷ domain integrator.¨ Electronic Letters Vol. 32, 1996.
· Y. Tsvidis, "On Linear Ìntegrators and Differentiators using Ìnstantaneous
Companding.¨ ÌEEE Jour. Vol. 42, No. 8 Aug 1995.
November 23, 2005 Eng Teck Ong, Chirag Shah, Erinc Tokluoglu, Ojas Shah
Cornell University (ECE) Fall 2005
REFERENCES
N. Takai, A. Kimura, N. Fuji 'CMOS FET Companding Current-mode Integrator.¨
Tokyo Univ. IEEE ournal 1998.

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