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LM733/LM733C Differential Video Amp.

(a)

(b)

(a) The input bias currents IB1 and IB2 and the offset voltage Vio. (b) The Op-Amp equivalent circuit showing bias currents and offset voltage.

Input bias current: The input bias current is one-half the sum of the separate currents entering the two input terminals of a balanced amplifier, as shown in the figure. The input bias current is IB | (IB1 + IB2)/2 when Vo = 0. Input offset current: The input offset current Iio is the difference between the separate currents entering the input terminals of a balanced amplifier. As shown in the figure, we have Iio | IB1 IB2 when Vo = 0. Input offset current drift: The input offset current drift Iio/T is the ratio of the change of input offset current to the change of temperature. Input offset voltage: The input offset voltage Vio is that voltage which must be applied between the input terminals to balance the amplifier.

Input offset voltage drift: The input offset voltage drift Vio/ T is the ratio of the change of input offset voltage to the change in temperature. Output offset voltage: The output offset voltage is the difference between the dc voltages present at the two output terminals (or at the output terminal and ground for an amplifier with one output) when the two input terminals are grounded. Input common-mode range: The common-mode input-signal range is that range within which a differential amplifier remains linear. Input differential range: This is the maximum difference signal that can be applied safely to the Op-Amp input terminals. Output voltage range: This is maximum output swing that can be obtained without significant distortion (at a given load resistance).

Full-power bandwidth: This is the maximum frequency at which a sinusoid whose size is the output voltage range is obtained. Power-supply rejection ratio: The power-supply rejection ratio PSRR is the ratio of the change in input offset voltage to the corresponding change in one power-supply voltage, with all remaining power voltages held constant. Slew rate: The slew rate is the time rate of change of the closedloop amplifier output voltage under large-signal conditions.

LEVEL SHIFTERS Even if the input to an amplifier has an average value of zero volts, the output often has a non-zero average voltage due to biasing effects. These dc voltages can cause an undesired offset which adversely affects the operation of a system. Since the op-amp is a multi-stage dc amplifier with high gain, unwanted dc voltages can be a source of concern. A small offset in an early stage can saturate a later stage. Level shifters are amplifiers that add or subtract a known voltage from the input in order to compensate for dc offset voltages. Op-amps have level shifters included in their design. The figure illustrates a simple level shifter. We show that this shifter acts as a unit-gain amplifier for ac while providing an adjustable dc output.

We begin the analysis by using KVL in the input loop of the figure (a) and letting Rin = 0 to obtain

VBB ! I B RB  VBE  I C RE  Vout


Now since

IC IB ! F
we solve for the dc value of output voltage, Vout.

Vout ! VBB

RB I C   I C RE  VBE F

(a) Simple level shifter where Rin = 0

(b) Actual circuit

(c) Small-signal ac equivalent circuit Figure. Level shifter

The equation shows that by varying RE, Vout can be set to any desired dc level (limited to a maximum of VBB VBE). Since VBB is the dc level acquired from the previous stage, this amplifier is used to shift the level downward (to a lower value). If upward shifting is required, a similar circuit is used but pnp transistors are substituted for the npn transistors. A complete circuit with active current source is shown in the figure (b). We now examine the circuit with ac signals applied. The figure (c) illustrates the ac equivalent circuit. Note that F2ib2 is the collector current in the active current source, and we assume it to be a constant. Because the ac value of the current is zero, this current source is replaced by an open circuit. We write the ac equations using KVL.

v in ! ib1 RB  ib1 rT 1  ic RE  v out

and

v out ! ic ro 2
v out ic ! ro 2

v out RB v out rT 1 v out RE v in    v out Fro 2 Fro 2 ro 2


The ratio of ac output to ac input is
v out 1 ! v in 1  RB / F  rT 1 / F  RE / ro 2

The equation shows that as ro2 becomes large, the ratio of output to input approaches unity and the level shifter acts like an emitter follower to ac. This is the desired result.