Name: Ali Abdulrahim Ismail

Architecture & Organization II

Review problems

The 8088 and 8086 signals
1. how much memory can the 8088 directly address? 2. how is minimum or maximum mode of operation selected? 3. describe the difference between the minimum-mode 8088 system and maximum-mode 8088 system? 4. Are the signal QS0 and QS1 produced in the minimum mode or maximum mode ? 5. dose the 8088 have a multiplexed address/data bus or independent address and data buses ? 6. what signal dose a minimum mode 8088 respond with when it acknowledges an active interrupt request ?

1 - 1 Mbyte 2 - The logic level of input MN/MX---- determines the mode. Logic 1 puts the MPU in minimum mode, and logic 0 puts it in maximum mode. 3 - In the minimum-mode, the 8088 directly produces the control signals for interfacing to memory and I/O devices. In the maximummode these signals are encoded in the status lines and need to be decoded externally. Additionally, the maximum-mode 8088 produces signals for supporting multiprocessing systems. 4 - Maximum mode. 5 - Multiplexed. 6 - INTA

I/O interface

Figure (1)

Figure 2

1 - what is the address of port 7 in the circuit shown in Fig.1? 2 - what are the input of the I/o address decoder in Fig.1 when the I/o address on the bus is (800A)h ? Which output is active ? Which output port does this enable? 3 - what operation does the instruction sequence that follows perform for the circuit in Fig.1 MOV AL,0FFH MOV DX,8004H OUT DX,AL 4 - write a sequence of instruction to output the word contents of the memory location called DATA to output port 0 and 1 in the circuit shown in Fig1? 5 ± what operation is performed to the circuit in Fig 2,when the instruction sequence that follows is executed ? MOV DX,8000H IN AL , DX AND AL ,0FH MOV [low_nibble] , AL 6- write a sequence of instructions to read in the contents of port 1 and 2 in the circuit show in Fig 2 and save them and consecutive memory addresses A0000 and A0001 in memory. 7-name a method that can be used to synchronize the input or output of information to peripheral device .

Solution
1. A15LA14L ......A4LA3LA2LA1LA0L = 1X.....X11102 = 800E16 with X = 0

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2.G1 = A15L = 1, G----2B = A0L = 0 , G----2A = (IO/M----)---- = 0, and CBA = A3LA2LA1L = 101. This make P5 equal to 0 and Port 5 is selected. 3. Sets all outputs at port 2 (O16-O23) to logic 1. 4. MOV DX, 8000H ;Write low byte to port 8000H MOV AX, [DATA] OUT DX, AL MOV DX, 8002H ;Write high byte to port 8002H MOV AL, AH OUT DX, AL 5. The value at Port 0 is read into AL; then the upper four bits are masked off; and finally the masked value is copied into memory location LOW_NIBBLE.

6. MOV AX,0A000H ;Set up the segment to start at A0000H MOV DS, AX MOV DX,8002H ;Input from port 1 IN AL, DX MOV [0000H],AL ;Save the input at A0000H MOV DX,8004H ;Input from port 2 IN AL, DX MOV [0001H],AL ;Save the input at A0001H 7. Handshaking

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