FPGAs are "fine-grain" devices -that means that they contain a lot (up to 1,000,00) of tiny blocks of logic
with flip-flops. FPGAs are built from one basic "logic-cell", duplicated hundreds or thousands of time.
It is two dimensional array of logic blocks and flip-flops with a electrically programmable interconnections between logic blocks . The interconnections consist of electrically programmable switches which is why FPGA differs from Custom ICs. as Custom IC is programmed using integrated circuit fabrication technology to form metal interconnections between logic blocks
and delay introduced for product to market (time to market) because of increased design time. complexity of logic functions that it can implement.
. However. and improved performance. They are relatively very expensive to develop. Initial attempt to solve this problem led to development of Custom ICs which were to replace the large amount of interconnect. total number of transistors that it consumes.Systems typically consisted of few large scale integrated components and large number of SSI (small scale integrated circuit) and MSI (medium scale integrated circuit) components. Logic block in an FPGA can be implemented in ways that differ in number of inputs and outputs amount of area consumed. custom ICs have their own disadvantages. This reduced system complexity and manufacturing cost.
logic blocks are made using transistor. It varies from one to other. mux. Cross point FPGA Plessey FPGA Actel Logic Block Xilinx Logic block Altera Logic Block
It also effects the performance of the FPGA.
. On the other hand a large logic block will consume more space on the FPGA.Size of logic block plays an important role in deciding density of logic blocks and area utilization in an FPGA. A large size logic block implements more logic and hence requires less number of logic blocks to implement a functionality on the FPGA. So optimal size of logic block is one that optimally uses lesser number of logic blocks for functionality implementation while consuming as little space as possible.
Wire segments connect I/O blocks to wire segments through connection blocks. Connection blocks are connected to logic blocks. depending on the design requirement one logic block is connected to another and so on.Typically an FPGA has logic blocks. interconnects and Input / Output blocks. Input Output blocks lie in the periphery of logic blocks and interconnect.
16 or 32 of the logic blocks are grouped into a Logic Array Block
. Actel routing methodology : Actel 's design has more wire segments in horizontal direction than in vertical direction Altera routing methodology : Altera routing architecture has two level hierarchy.
Xilinx Routing architecture :In Xilinx routing. At the first level of the hierarchy. connections are made from logic block into the channel through a connection block.
efficiency and flexibility .There is a constant effort on the part of system designers to design systems with improved performance.
. PLDs later evolved into what was later known as FPGAs. if one wants to make effective and competitive use of these general purpose blocks.Today. They could be programmed to into a single chip to meet specific requirements. The first form of reconfigurable device was Programmable Logic Devices which consisted of arrays of AND and OR gates with programmable metal paths as interconnection between them. then one of the better ways is to user configurable hardware that allows user programmability.
2. Input output blocks are located in the periphery of the rows. Symmetrical arrays : This architecture consists of logic elements(called CLBs) arranged in rows and columns of a matrix and interconnect laid out between them. 3.On the basis of internal arrangement of blocks FPGAs can be divided into three classes: 1. One row may be connected to adjacent rows via vertical interconnect. Row Based architecture: Row based architecture consists of alternating rows of logic modules and programmable interconnect tracks. Hierarchical PLDs : This architecture is designed in hierarchical manner with top level containing only logic blocks and interconnects.
.At this stage designer has to decide what portion of his functionality has to be implemented on FPGA and how to integrate that functionality with rest of the system.Sequential elements in the input circuit map to flip flops on the FPGA.Below given circuit consists of gates and flip flops. Combinational elements of the circuit are covered by a 4-input Look up table(4LUT). Placement of these elements is done in such a way as to minimize wiring during routing.
which may be simple flip-flops or more complete blocks of memory. or merely simple logic gates like AND and XOR. and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"³somewhat like many (changeable) logic gates that can be inter-wired in (many) different configurations. FPGAs contain programmable logic components called "logic blocks". adders and so forth. registers. the logic blocks also include memory elements. Logic blocks can be configured to perform complex combinational functions. In most FPGAs.The device is programmed by connecting the gates together to form multipliers.