Centre for Computer Technology

ICT123 Computer Architecture
Week 13

Review

Week 1

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Computer architecture refers to the system attributes that have direct impact on the logical execution of operations, and which are visible to the programmer Computer organization refers to the physical operational units and their interconnections, and other details that realize the architectural specifications, and which are transparent to the programmer. IAS Computer Electronics Computer
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March 20, 2012

Week 2
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Von Neumann Architecture Von Neumann bottleneck Harvard Architecture Instruction Cycle - Two distinct phases, namely; Instruction Fetch (IF) and execute Instruction (EI) Interrupts

Architectures - 0-address (stack), 1address, 2-address, 3-address
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March 20, 2012

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Integer Data Representation Integer Arithmetic
msb 1 8 bits biased exponent 23 bits Significand

Week 3

lsb

Sign of significand 0 positive 1 negative

In a normalized binary number the msd is 1, which is implied (not stored)

 20, 2012 March

Floating Point Data Representation Floating Point Arithmetic Copyright Box Hill Institute

Week 4
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Types of Buses - Address buses, Data buses, Control buses, Power bus Elements of Bus design - Bus Width, Method of Arbitration, Data Transfer Type, Timing Multiplexing Types of Registers - User-visible registers (optimize main memory), Control and Status registers (control the processor or the execution of programs)
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March 20, 2012

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Micro-operations are the atomic (indivisible) operations performed by the CPU. Functional Requirements of the Control Unit

Week 5


The CU can be implemented either as a hardwired circuit (hardware implementation), or in programmed form (micro-programmed implementation)
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Define the basic elements Describe the micro-operations Determine the functions that the control unit must perform to cause the micro-operations to be performed.

March 20, 2012

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Multiple Streams, Prefetch each branch into a separate pipeline  Prefetch Branch Target, Target of branch is prefetched in addition to instructions following branch  Loop buffer, Fast Memory - Contains the n most recently fetched instructions, in sequence.  Branch prediction - Predict never taken, Predict always taken, Predict by Opcode, Taken/Not taken switch  Delayed branching March 20, 2012

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Pipelining, allows the execution of multiple instructions to overlap in time. Dealing with Branches

Week 6

Week 7
CISC Architecture
It is based on the Von Neumann architecture  Motivated by a desire to have low memory bandwidth due to memory being expensive and slow

RISC Architecture

It is based on the Harvard Architecture to achieve the goal of one instruction per cycle
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March 20, 2012

Week 8
Memory Hierarchy  Principle of Locality  Main memory - RAM, DRAM, SRAM. SDRAM, RDRAM  Bulk Storage - HDD’s, RAID, CD’s  Virtual Memory  Cache

March 20, 2012

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Week 9
Use of main memory and disk space to provide the illusion of “endless” amount of physical memory.  Paging, Demand Paging, Segmentation  Small amount of fast memory, Sits between normal main memory and CPU, May be located on CPU chip or module  Direct Mapping, Fully Associative Mapping, Set Associative Mapping

March 20, 2012

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Week 10
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Flynn’s Taxonomy SISD, SIMD, MISD, MIMD Loosely Coupled and Tightly Coupled Systems Message-Passing Architectures, SharedMemory Architectures SMP Organisation Classification

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Time shared or common bus Multiport memory Central control unit
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March 20, 2012

Directory Protocol, Snoopy Protocol, MESI protocol  Execution time = instructions x CPI x cycle time  MIPS, MFLOPS  Comparing computer performance

Week 11

Latency, Bandwidth

Relative MIPS, normalized MFLOPS  How fast does it execute MY program

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March 20, 2012

Week 12
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Threads - Instruction stream divided into smaller streams Process is an instance of a program running on a computer Explicit and Implicit Multithreading Clusters - A group of interconnected whole computers working together as a unified resource Parallel architectures types – SMP, Clusters, NUMA Hardware components of a router include input/output ports, switching fabric and the routing processor Buffer Management, HOL blocking
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March 20, 2012

GRADE SET FOR DEGREE STUDENTS
GRADE HD DI CR PA PU NE DESCRIPTOR High Distinction Distinction Credit Pass Pass - Ungraded Supplementary Examination Recommended Fail Withheld Withdrawn after commencing studies but within 6 weeks of the commencement of the subject Withdrawn without commencing studies 80-100% 70-79% 60-69% 50-59% Used when pass/fail dichotomy only is required Course Leaders may recommend a supplementary examination when a mark is 45-49%. 0% - 49% Result withheld due to an extension granted. Must be converted to a grade. Withdrawn from subject within 6 weeks of commencement of subject. Withdrawal over 6 weeks results in an NN (Fail) grade. RESULT

NN WH WA

WB

Withdrawn from subject prior to the commencement of classes and studies.
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March 20, 2012

Assessment Summary
Assessment
Assessment 1 Assessment 2 Assessment 3

Details
Laboratory and Tutorial exercises Research Assignment: Report and Presentation Final Examination

Max Marks
20% 30% 50%

March 20, 2012

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Labs and Tutorials (Max Marks 20)
Task
Successfully complete Lab work and submit tutorial activities for 12 teaching weeks
Successfully complete Lab work and submit tutorial activities for 9-11 teaching weeks

Max Marks
20

16

Successfully complete Lab work and submit tutorial activities for 5-8 teaching weeks
Successfully complete Lab work and submit tutorial activities for less than five teaching weeks March 20, 2012
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5
0

Research Assignment (Max Marks 30)
Task
Report Presentation

Marks
(Maximum 20%) (Maximum 10%)

Assessment 3 - Final Examination (Max Marks 50)
March 20, 2012

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Revision Hints

Re-do as many lab-tute questions and problems as you possibly can. Try to do the problems without looking at the notes, but look at the notes if you have to, and to check your answers. Time yourself, you have limited time in the exam.
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March 20, 2012

Final Examination

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Closed book exam However, You can bring an A4 size document, handwritten on a ruled sheet of paper. 2.5 hours + 10 minutes reading time Exam has 2 parts Part A – short answer questions (20 marks)
12 questions, answer any 10  More marks for concise focused answers than for verbose superficial answers  Each question is worth 2 marks

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March 20, 2012

Examination
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Part B – problems and more searching questions (30 marks) 6 questions/problems, answer any 5 Each question is worth 6 marks Some have multiple parts Marks for each question are shown on the question paper Full marks will only be awarded for correct solutions with detailed explanation/justification
March 20, 2012

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Check front page for detailed instructions  Follow instructions to maximise your score  A sample question paper is available in the resources folder on the studentweb
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Examination

GOOD LUCK !
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March 20, 2012

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