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Intel 8086 CPU: An Introduction
• 16-bit Arithmetic Logic Unit
• 16-bit data bus
• 20-bit address bus - 220 = 1,048,576 = 1 meg
• The address refers to a byte in memory. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 815). • The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. • The least significant byte of a word on an 8086 family microprocessor is at the lower address.
Microprocessors – Introduction to 8086
the Extra Segment Register • The BIU fetches instructions using the CS and IP.the Instruction Pointer CS .the Code Segment Register DS . written CS:IP. Microprocessors – Introduction to 8086 . • The BIU contains the following registers: IP .the Data Segment Register SS . Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode.8086 Architecture • The 8086 has two parts. the Bus Interface Unit (BIU) and the Execution Unit (EU).the Stack Segment Register ES . reads and writes data. • The BIU fetches instructions. to construct the 20-bit address. and computes the 20-bit address. • The EU decodes and executes the instructions using the 16-bit ALU.
8086 Block Diagram Microprocessors – Introduction to 8086 .
the Source Index Register DI . a High byte and a Low byte.the Base Register CX . and DX registers can be considered as two 8-bit registers.AL BX --> BH.the Data Register Default to stack segment SP . the 8080 and 8085.8086 Architecture ] The EU contains the following 16-bit registers: AX .the Base Pointer SI .BL CX --> CH.CL DX --> DH. The AX.the Accumulator BX .the Stack Pointer BP . although. they often have a special-purpose use for some instructions. as seen by their names.DL Microprocessors – Introduction to 8086 .the Destination Register These are referred to as general-purpose registers. This allows byte operations and compatibility with the previous generation of 8-bit processors. The 8-bit registers are: AX --> AH. BX.the Count Register DX . CX.
5. Bit 0 .ZF Zero Flag .TF Single Step Trap Flag Bit 9 . The condition bits are set or cleared by the execution of an instruction. 3. 12-15 are undefined.Set if result is zero Bit 7 .Set by carry out of msb Bit 2 .IF Interrupt Enable Flag Bit 10 .Set if result has even parity Bit 4 .PF Parity Flag .CF Carry Flag . Microprocessors – Introduction to 8086 .8086 Architecture The EU also contains the Flag Register which is a collection of condition bits and control bits. The control bits are set by instructions to control some operation of the CPU.for BCD arithmetic Bit 6 .SF Sign Flag = msb of result Bit 8 .AF Auxiliary Flag .DF String Instruction Direction Flag Bit 11 .OF Overflow Flag Bits 1.
8086 Programmer’s Model 16-bit Registers BIU registers (20 bit adder) ES CS SS DS IP AX BX CX DX AH BH CH DH AL BL CL DL Extra Segment Code Segment Stack Segment Data Segment Instruction Pointer Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register Destination Index Register EU registers 16 bit arithmetic Microprocessors – Introduction to 8086 SP BP SI DI FLAGS .
start at an address that ends in 0H. MEMORY Address 000000H CODE 64K Data Segment STACK DATA EXTRA CS:0 64K Code Segment Segment Registers Segments are < or = 64K. Microprocessors – Introduction to 8086 0FFFFFH . can overlap.Segments Segment Starting address is segment register value shifted 4 place to the left.
Microprocessors – Introduction to 8086 SS: 0B200H STACK 0CF000H 0DEFFFH 0FF000H 0FFFFFH Note that the Code segment is < 64K since 0FFFFFH is the highest address.8086 Memory Terminology Segment Registers DS: 0100H Memory Segments 000000H DATA 001000H 10FFFH 0B2000H 0C1FFFH ES: 0CF00H EXTRA CS: 0FF00H CODE Segments are < or = 64K and can overlap. .
The Code Segment 000000H CS: 0400H IP 0056H 4000H 4056H CS:IP = 400:56 Logical Address Memory Left-shift 4 bits Segment Register Offset Physical or Absolute Address + 0400 0 0056 0FFFFFH 04056H The offset is the distance in bytes from the start of the segment. The physical address is also called the absolute address Microprocessors – Introduction to 8086 . The offset is given by the IP for the Code Segment. Instructions are always fetched with using the CS register.
The Data Segment 000000 H DS: 05C0 EA 0050 05C00H 05C50H DS:EA Memory Segment Register 05C0 0 Offset Physical Address + 0050 05C50H 0FFFFFH Data is usually fetched with respect to the DS register. Microprocessors – Introduction to 8086 . The effective address (EA) is the offset. The EA depends on the addressing mode.
20H is put in AX. MOV AX. DW = Define Word DATA1 DW 25H DATA1 is defined as a word (16-bit) variable. the contents of DATA1 is put into AX. The offset of SAM is just a number. Does not go to memory to get data. OFFSET DATA1 The assembler knows which mode to encode by the way the operands SAM and FRED are defined.e. Data is in the instruction. DATA2 is not a memory location but a constant. 25H is put in AX. Microprocessors – Introduction to 8086 . DATA2 EQU 20H Direct Addressing MOV AX. i.Addressing Modes Assembler directive. a memory location that contains 25H. The CPU goes to memory to get data.DATA1 [DATA1] AX..DATA2 DATA2 = 20H AX. Immediate Addressing MOV AX.
Based Addressing (BP defaults to SS) or DI or SI -.[BX] AX DS:BX Can use BX or BP -.Addressing Modes Register Addressing MOV AX.[BX][SI] Based-Indexed w/Displacement MOV AX.Indexed Addressing The offset or effective address (EA) is in the base or index register.SAM[BX][DI] EA = BX + DI + offset SAM Microprocessors – Introduction to 8086 . Register Indirect with Displacement Indexed with displacement Based with displacement MOV AX.SAM[BX] AX DS:BX + Offset SAM AX DS:EA where EA = BX + offset SAM EA = BX + SI Based-Indexed Addressing MOV AX.BX AX BX Register Indirect Addressing MOV AX.
new CS and IP are encoded in the instruction. Microprocessors – Introduction to 8086 . All addressing modes apply.IP relative displacement new IP = old IP + displacement Allows program relocation with no change in code.Addressing Modes Branch Related Instructions NEAR JUMPS and CALLS Direct -.new CS and IP are in memory. Indirect -. All addressing modes apply except immediate and register. Intrasegment (CS does not change) FAR Intersegment (CS changes) Direct -.new IP is in memory or a register. Indirect -.
called a two-pass assembler.Assembly Language The Assembler is a program that reads the source program as data and translates the instructions into binary machine code. • The second pass generates the code. The assembler outputs a listing of the addresses and machine code along with the source code and a binary file (object file) with the machine code. Microprocessors – Introduction to 8086 . • The first pass determines the locations of the labels or identifiers. Most assemblers scan the source code twice -.
This counts the number of bytes required by each instruction. Microprocessors – Introduction to 8086 . the location counter is zero. the counter resumes the count. • If a previous segment is re-entered. The offsets are used in the second pass to generate operand addresses. the assembler has a location counter. the assembler uses the location counter to construct a symbol table which contains the offsets or values of the various labels. In the first pass. • When the program starts a segment. • The location counter can be set to any offset by the ORG directive.Assembly Language To locate the labels.
Instruction Set adc Add with carry flag add and call cbw Add two numbers Bitwise logical AND Call procedure or function Convert byte to word (signed) cli cwd cmp dec div idiv imul in inc Clear interrupt flag (disable interrupts) Convert word to doubleword (signed) Compare two operands Decrement by 1 Unsigned divide Signed divide Signed multiply Input (read) from port Increment by 1 intMicroprocessors – Introduction to 8086 Call to interrupt procedure .
) iret j?? jmp lea mov mul neg nop not or Interrupt return Jump if ?? condition met Unconditional jump Load effective address offset Move data Unsigned multiply Two's complement negate No operation One's complement negate Bitwise logical OR out pop popf push Output (write) to port Pop word from stack Pop flags from stack Push word onto stack Microprocessors – Introduction to 8086 .Instruction Set (Contd.
) pushf ret sal sar sbb Push flags onto stack Return from procedure or function Bitwise arithmetic left shift (same as shl) Bitwise arithmetic right shift (signed) Subtract with borrow shl shr sti sub test xor Bitwise left shift (same as sal) Bitwise right shift (unsigned) Set interrupt flag (enable interrupts) Subtract two numbers Bitwise logical compare Bitwise logical XOR Microprocessors – Introduction to 8086 .Instruction Set (Contd.
Conditional Jumps Name/Alt JE/JZ JNE/JNZ JL/JNGE JNL/JGE JG/JNLE JNG/JLE JB/JNAE JNB/JAE JA/JNBE JNA/JBE JS JNS JO JNO JP/JPE JNP/JPO JCXZ Meaning Jump equal/zero Jump not equal/zero Jump less than/not greater than or = Jump not less than/greater than or = Jump greater than/not less than or = Jump not greater than/ less than or = Jump below/not above or equal Jump not below/above or equal Jump above/not below or equal Jump not above/ below or equal Jump on sign (jump negative) Jump on not sign (jump positive) Jump on overflow Jump on no overflow Jump parity/parity even Jump no parity/parity odd Jump on CX = 0 Flag setting ZF = 1 ZF = 0 (SF xor OF) = 1 (SF xor OF) = 0 ((SF xor OF) or ZF) = 0 ((SF xor OF) or ZF) = 1 CF = 1 CF = 0 (CF or ZF) = 0 (CF or ZF) = 1 SF = 1 SF = 0 OF = 1 OF = 0 PF = 1 PF = 0 --- Microprocessors – Introduction to 8086 .
End of segment Originate or Origin: sets the location counter. Give source module a name. Defines the segment name and specifies that the code that follows is in that segment.More Assembler Directives ASSUME SEGMENT ENDS ORG END NAME Tells the assembler what segments to use. Current location count Microprocessors – Introduction to 8086 . DW DB EQU Define word Define byte. End of source code. Equate or equivalence LABEL $ Assign current location count to a symbol.
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