INTEGRATED CIRCUIT LAYOUT AND SIMULATION 1. INTEGRATED CIRCUIT LAYOUT     Define Function Colour Code Design Rules 2.    Define 4 levels of simulation Simulations software . INTEGRATED CIRCUIT DESIGN SIMULATION.

Layout designed by through the stick diagram designed.It is produced with the aid of computer software or by hand.INTEGRATED CIRCUIT LAYOUT DEFINE 1.LAYOUT is a pattern drawing showing the metallurgical tracks. . 3. the position of N @ P diffusion and polysilicon on the wafer. 2.

. To provide the physical sizes of the MOS devices such as length and width of the transistor used. Each component in an integrated circuit represented in each 2dimensional.INTEGRATED CIRCUIT LAYOUT PURPOSE 1. 2.

.INTEGRATED CIRCUIT LAYOUT STICK DIAGRAM 3. . Stick diagram is a conversion of schematic diagram CMOS transistor to the diagram that represents information about the layers that form the transistors in a device.

INTEGRATED CIRCUIT LAYOUT STICK DIAGRAM 4. . Stick diagram not just maintain the properties of the schematic diagram but also can provide information on layer upon complete processing circuit produced.

Layer determines the number of connections and floor plan for the restructuring layer on wafer. 2.To create the layout. the pattern on the mask should be provided in accordance with certain rules.INTEGRATED CIRCUIT LAYOUT FUNCTION OF LAYOUT 1. .

INTEGRATED CIRCUIT LAYOUT COLOUR CODE Color representation of the transistor layers. COLOUR Green Yellow Red Blue Black Brown LAYER N-diffusion P-diffusion Polysilicon Metal Contact P-well .

Rules based on geometry (lambda @ micron). 2. It is necessary in the production of masks and it provides communication between process engineers and circuit designers. There are two types of layout design rules: 1.INTEGRATED CIRCUIT LAYOUT DESIGN RULES 1. 2. Design rule is a feature of the law on the legal dimensions of a practiced in the design of integrated circuits. . Standard Design Rules.

Total path intersecting the interface must be reduced. 3. Touch pads must be placed in a peripheral chip that does not intersect.INTEGRATED CIRCUIT LAYOUT Standard Design Rules 1. Avoid the formation of junctions over a wide area so that it is a lot of leakage current. 2. Layout arrangement must be in a small chip area. 4. .

. Micron and lambda. such as short circuit. namely the definition of : If the overlap between the two layers can lead to disaster. (1λ = 2. 3. the design will cause very close to the leakage current and sheet layout software and sometimes there are errors. 2.5 um)  If overlap is allowed. Rationale.INTEGRATED CIRCUIT LAYOUT Geometry Design Rules 1. then the pattern must be removed at least two lambda. Two categories. but can be avoided then the pattern must be separated by a distance of 1 lambda.

2. A process of copying @ emulate through the study of the relationship between the parameters in the system.SIMULATION DESIGN OF INTEGRATED CIRCUITS Definition 1. Simulation is a process to verify the circuit operation designed using computer aided design software. .

SIMULATION DESIGN OF INTEGRATED CIRCUITS Level Of Simulation 4-Level of Simulation: • Circuit level simulation • Gate level simulation • Switch level simulation • Device level simulation .

. Gate Level Simulation Gate level simulation will accept and produce only logic 1 and 0 during the simulation.SIMULATION DESIGN OF INTEGRATED CIRCUITS Design Level Simulation Circuit Level Simulation Simulations are performed to check the truth of a circuit schematic by inserting the values ​of voltage or current to the circuit model. All input and output of a gate will be examined to determine all consistent with the expression logic design.

a transistor to be simulated as a transistor (not just as a switch) and a voltage is simulated as the actual voltage value (not just a logic 1 and 0).SIMULATION DESIGN OF INTEGRATED CIRCUITS Level Of Simulation Switch Level Simulation This simulation model provides an overview of the transistors as switches and logic gate transistor as a switch network. For example. Results from the simulation of this switch should be the same level as in the simulation gate. . Device Level Simulation This simulation will simulate an actual device as a device.

Disadvantages Can cause errors in the design which causes the design does not operate. . Can not explain in detail for each variable and the relationship between them.SIMULATION DESIGN OF INTEGRATED CIRCUITS Advantages and Disadvantages Advantages Can provide proper guidance for the design for optimum performance. Able to detect any changes and operation of each component with other components in the same circuit.

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