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Content Addressable Memory is a

special kind of memory! Read operation in traditional memory: Input is address location of the content that we are interested in it. Output is the content of that address.

In CAM it is the reverse: Input is associated with something stored in the memory. Output is location where the associated content is stored.

The input to the system is the search word. The search word is broadcast on the search lines. Match line indicates if there were a match btw. the search and stored word. Encoder specifies the match location. If multiple matches, a priority encoder selects the first match. Hit signal specifies if there is no match.

Largest available around 18 Mbit (single chip). Rule of thumb: Largest CAM chip is about half the largest available SRAM chip. A typical CAM cell consists of two SRAM cells. Exponential growth rate on the size

The search-data word is loaded into the search-data register.


All match-lines are pre-charged to high (temporary match state). Search line drivers broadcast the search word onto the differential search lines. Each CAM core compares its stored bit against the bit on the corresponding searchlines. Match words that have at least one missing bit, discharge to ground.

BINARY CAM (BCAM) only stores 0s and 1s Applications: MAC table consultation. Layer 2 security related VPN segregation.
TERNARY CAM (TCAM) stores 0s, 1s and dont cares. Application: when we need wilds cards such as, layer 3 and 4 classification for QoS and CoS purposes. IP routing (longest prefix matching).

Bit storage portion RAM(SRAM) cell.

is a standard 6T static

Binary CAM cell performs READ and WRITE operations similar to an SRAM cell. Transistors N1-N4 implement the XNOR logic to compare the table entry with the search key. WRITE operation is performed by placing the data on the bit lines (BLs) and enabling the word line (WL). READ operation is performed by pre-charging the BLs to VDD and enabling the WL.

Similar to the binary CAM cell except that it has two SRAM cells to store ternary data. READ, WRITE and SEARCH operations are performed in this cell. WRITE operation is performed by placing the data on the bit lines (BLs) and enabling the word line (WL). READ operation is performed by pre-charging the BLs to VDD and enabling the WL.

Consists of 3 major parts TCAM Arrays Peripheral circuitry Test & Repair circuitry Each row in a TCAM Array stores a word. PE is used to determine the highest priority match. High-density TCAM chip employs test and repair circuitry for identifying the faulty components and replacing them with their redundant counter parts.