DMA Controller (DMAC)

Data transfer between the Ps main memory & an external device such as a disk without involving P is called Direct Memory Access, a separate LSI chip is used for this purpose, called as DMAC. DMAC can send commands to the memory in the same way as the P. Considered as 2nd P. Very high data rate due to implementation of several functions in hardware. DMAC has several I/O ports. As shown in fig, it has 2 I/O ports and memory is directly connected to them through 2 channels of DMAC.

DMAC

DMAC (Contd..)
Each channel contains an address reg., a control reg., and a counter for block length ( To move a block of data). When P wants to transfer data P writes the - i) starting address of the memory from where the data transfer is to take place in the address reg. ii) Direction of transfer in the control reg. iii) Length of the data to be transferred in the Counter. The DMAC then completes the transfer of data independent of P, only when P relinquishes system bus and the external device is ready.

Printers (Contd..)
When I/O device wants to transfer data When the I/O port is ready with an available buffer to receive data or has data ready to write into a memory location, it activates the DMAREQ of DMAC. The DMAC then activates the HOLD input signal of the P, requesting the P to relinquish the bus, and waits for a HOLD ACK back from P. After a few cycles, the P activates the HOLD ACK and tristates the output drivers to the system bus. The DMAC then takes over the bus & outputs the starting address in the system bus, sends DMACK to the I/O port.

Printers (Contd..)
The DMAC outputs a normal R/W to memory & a complemented R/W to the I/O port. The I/O port and memory then complete the transfer. After the transfer, the DMAC disables all the signals, including the HOLD on the system bus, and tristates all its bus drivers. The P then takes over the bus and continues with its normal operation.

I/O ports have two modes of operation: Non DMA & DMA. For non DMA ports operate in normal mode. For DMA mode the P configures the port in the DMA mode and then signals the DMAC to perform the transfer.

Printers (Contd..)
For efficient operation, the DMAC is provided with a burst mode in which it has control over the bus until the entire block of data is transferred. Data chain register (DCR) - Contains address reg, control reg, a counter and a channel identification. DCRs store the information for a specific channel for the next transfer.

When the specified channel completes a DMA transfer, its registers are reloaded from the DCRs and the next transfer continues without any interruption from the P.