You are on page 1of 30

William Stallings Computer Organization and Architecture 8th Edition Chapter 4 Cache Memory

A small fast memory, holds recently accessed data and is designed to speed up access to the same data.

Cache Memory A special buffer storage, smaller and faster then main storage, used to hold the copy of instructions and data in the main storage which are likely needed next by the processor.

Characteristics Memory System: UCLAPPPO Location Capacity Unit of transfer Access method Performance (Act) Physical type (smo) Physical characteristics Organisation

CPU Internal ( in terms of 1byte=8 bits or words) Common word lengths are 8,16,32 External (in term of bytes)

Word is same as bits

Word size
The natural unit of organisation Size of the word is equal to the number of bits

Number of words
or Bytes

Unit of Transfer
Usually governed by data bus width

Usually a block which is much larger than a word

Addressable unit
Smallest location which can be uniquely addressed Word internally 2a=N

Access Methods (1)

Start at the beginning and read through in order Access time depends on location and previous location e.g. tape

Individual blocks have unique address Access is by jumping to vicinity (pattern, Track no, sector) plus sequential search Access time depends on location and previous location e.g. disk

Access Methods (2)

Individual addresses identify locations exactly Access time is independent of location or previous access e.g. RAM

Data is located by a comparison with contents of a portion of the store Access time is independent of location or previous access e.g. cache

Access time
Time between presenting the address and getting the valid data

Memory Cycle time

Time may be required for the memory to recover before next access Cycle time is access + recovery

Transfer Rate
Rate at which data can be moved 4 ram equal to 1/cycle time 4 non random (page 132)

Memory Hierarchy

Internal or Main memory

May include one or more levels of cache RAM

External memory
Backing store

Memory Hierarchy - Diagram

Physical Types

Disk & Tape


Bubble Hologram

Physical Characteristics
Decay (volatile) Information lost when electric power is switched off Volatility (magnetic surface memories) Erasable Power consumption

For Ram Organisation is a key design issue Physical arrangement of bits into words Not always obvious e.g. interleaved

The Bottom Line

How much?

How fast?
Time is money

How expensive?

Hierarchy List
Registers L1 Cache L2 Cache Main memory Disk cache Disk Optical Tape

So you want fast?

It is possible to build a computer which uses only static RAM (see later) This would be very fast This would need no cache
How can you cache cache?

This would cost a very large amount

Locality of Reference
During the course of the execution of a program, memory references tend to cluster e.g. loops

Small amount of fast memory Sits between normal main memory and CPU May be located on CPU chip or module

Cache and Main Memory

Cache/Main Memory Structure

Cache operation overview

CPU requests contents of memory location Check cache for this data If present, get from cache (fast) If not present, read required block from main memory to cache Then deliver from cache to CPU Cache includes tags to identify which block of main memory is in each cache slot

Cache Read Operation - Flowchart

Cache Design
Addressing Size Mapping Function Replacement Algorithm Write Policy Block Size Number of Caches

Cache Addressing
Where does cache sit?
Between processor and virtual memory management unit Between MMU and main memory

Logical cache (virtual cache) stores data using virtual addresses

Processor accesses cache directly, not thorough physical cache Cache access faster, before MMU address translation Virtual addresses use same address space for different applications
Must flush cache on each context switch

Physical cache stores data using main memory physical addresses

Size does matter

More cache is expensive

More cache is faster (up to a point) Checking cache for data takes time

Typical Cache Organization

Comparison of Cache Sizes

Processor IBM 360/85 PDP-11/70 VAX 11/780 IBM 3033 IBM 3090 Intel 80486 Pentium PowerPC 601 PowerPC 620 PowerPC G4 IBM S/390 G4 IBM S/390 G6 Pentium 4 IBM SP CRAY MTAb Itanium SGI Origin 2001 Itanium 2 IBM POWER5 CRAY XD-1 Type Mainframe Minicomputer Minicomputer Mainframe Mainframe PC PC PC PC PC/server Mainframe Mainframe PC/server High-end server/ supercomputer Supercomputer PC/server High-end server PC/server High-end server Supercomputer Year of Introduction 1968 1975 1978 1978 1985 1989 1993 1993 1996 1999 1997 1999 2000 2000 2000 2001 2001 2002 2003 2004 L1 cache 16 to 32 KB 1 KB 16 KB 64 KB 128 to 256 KB 8 KB 8 KB/8 KB 32 KB 32 KB/32 KB 32 KB/32 KB 32 KB 256 KB 8 KB/8 KB 64 KB/32 KB 8 KB 16 KB/16 KB 32 KB/32 KB 32 KB 64 KB 64 KB/64 KB L2 cache 256 to 512 KB 256 KB to 1 MB 256 KB 8 MB 256 KB 8 MB 2 MB 96 KB 4 MB 256 KB 1.9 MB 1MB L3 cache 2 MB 2 MB 4 MB 6 MB 36 MB

Mapping Function
Cache of 64kByte Cache block of 4 bytes
i.e. cache is 16k (214) lines of 4 bytes

16MBytes main memory 24 bit address