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FPGA DESIGN OF A REAL-TIME IMPLEMENTATION OF DYNAMIC RANGE COMPRESSION FOR IMPROVING TELEVISION PICTURE

FPGA DESIGN OF A REAL-TIME IMPLEMENTATION OF DYNAMIC RANGE COMPRESSION FOR IMPROVING TELEVISION PICTURE

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Published by Charoensak
This paper presents efficient FPGA hardware architecture for the implementation of a digital video processing algorithm for improving picture quality when displayed on devices such as LCD/PDP panels. The algorithm performs dynamic range compression on the photographic quality input video and produces the output suitable for displaying on a display panel. The algorithm is based on using Bilateral filter. Bilateral filter is a type of non-iterative smoothing filter that preserves edge information. The proposed architecture demonstrates a good compromise between filtering performance and FPGA resource requirements. The architecture was prototyped in hardware using FPGA. The design and simulation was carried out using FPGA system-level design approach.
This paper presents efficient FPGA hardware architecture for the implementation of a digital video processing algorithm for improving picture quality when displayed on devices such as LCD/PDP panels. The algorithm performs dynamic range compression on the photographic quality input video and produces the output suitable for displaying on a display panel. The algorithm is based on using Bilateral filter. Bilateral filter is a type of non-iterative smoothing filter that preserves edge information. The proposed architecture demonstrates a good compromise between filtering performance and FPGA resource requirements. The architecture was prototyped in hardware using FPGA. The design and simulation was carried out using FPGA system-level design approach.

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Published by: Charoensak on Mar 10, 2010
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12/11/2012

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FPGA DESIGN OF A REAL-TIME IMPLEMENTATION OF DYNAMIC RANGECOMPRESSION FOR IMPROVING TELEVISION PICTURE
Charayaphan Charoensak 
Digital Video Processing, Architecture andStandard Design, Philips Consumer Electronics620A Lorong 1, Toa Payoh, Singapore 319762emails: Charayaphan.Charoensak@Philips,ecchara@ntu.edu.sg
Farook Sattar 
School of Electrical and Electronic EngineeringNanyang Technological UniversityNanyang Avenue, Singapore 639798email: efsattar@ntu.edu.sg
ABSTRACT
This paper presents efficient FPGA hardwarearchitecture for the implementation of a digital videoprocessing algorithm for improving picture quality whendisplayed on devices such as LCD/PDP panels. Thealgorithm performs dynamic range compression on thephotographic quality input video and produces the outputsuitable for displaying on a display panel. The algorithm isbased on using Bilateral filter. Bilateral filter is a type of non-iterative smoothing filter that preserves edgeinformation. The proposed architecture demonstrates agood compromise between filtering performance and FPGAresource requirements. The architecture was prototyped inhardware using FPGA. The design and simulation wascarried out using FPGA system-level design approach.
1.
 
INTRODUCTION
There is an increasing demand for more research onhigh-definition (HD) picture quality processing forapplications in consumer-based television. Such areasinclude full-HD picture quality enhancement and LCD/PDPpanel picture quality improvement. The consumer expectsphotorealistic quality from the expensive HD television setthey purchased. Today, the digital signal processors usedinside a television set often support up to 14 bits processingdata path allowing a very wide signal dynamic range.However, the display panels often limit the signal datawidth to within 8 to 10 bits. In addition to that, the opticalproperty of the display panel further limits the effectivedynamic range. Thus, effective techniques for compressingthe dynamic range of the input image for displaying on atypical display panel are desirable.This paper presents our work on hardware architectureof FPGA-based circuit for the implementation of dynamicrange compression suitable for video applications. Thealgorithm is based on using Bilateral filter (BF) for theimplementation of edge-preserving smoothing filter. TheBilateral filter discussed in this paper offers hardwaresimplification and is suitable for FPGA implementation.The paper first introduces technique for dynamic rangecompression followed by introduction of Bilateral filter.Then, MATLAB simulations showing the results of dynamic range compression is given. After that, the finalverification of the FPGA design was carried out and theFPGA synthesis results are reported.
2.
 
PREVIOUS WORK ON DYNAMIC RANGECOMPRESSION
One technique that takes a high-dynamic-range imageinput and compresses its contrast while preserving thedetails was introduced in [5][6]. Such algorithm is basedon two-scale decomposition of the image into a
base
layer(large-scale features) and a
detail
layer. Only the baselayer has its contrast reduced while the detail is preserved,thus preserving the visible details. The algorithm requiresimplementation of edge-preserving filter – a filter thatblurs the small variations of a signal (noise or texturedetail) but preserves the large discontinuities (edges).Bilateral filter is commonly used to implement the edge-preserving filter and is discussed in more detail in nextsection.
3.
 
BILATERAL FILTER AS AN IMAGEESTIMATOR
Bilateral filter was first introduced by Smith andBrady under the name “SUSAN” [3] and was later referredto as “Bilateral filter” [1][4]. The filter replaces each pixelby a weighted average of its neighbors. The weightassigned to each neighbor decreases with both the distancein the image plane and the distance on the intensity axis.Thus, it is a form of moving average adaptive filterweighted:(1)
1212
()()()()
ll
l
kll
 ywyywlk wyywl
 x
η η 
=
 
Here,
 y
and
l
 x
are the filter input and output valuesrespectively,
and
 k
are 2D-coordinates of the image pixellocations,
l
η 
is a neighborhood around
,
.
denotes theEuclidean distance, and
w
1
(.) and
w
 2
(.) are weightfunctions.
w
1
(.) is a function of absolute difference of brightness value and
w
 2
(.) is a function of Euclideandistance. The weight functions are usually chosen asGaussians for
w
 2
(.) and exponential for
w
1
(.).
 
The estimation
 x
of the original signal is computedfrom a distorted signal
 y = x + n
, where
 n
is uncorrelatednoise. The least mean-square (LMS) estimate is obtainedby the conditional expectation.(2)and the linear solution of this problem is Wiener filter.Similarly, a locally adaptive Weiner filter is expressed as:(3)Here, the pixels in
 y
located around position
aredenoted
ζ 
. The correlation
 xy
 ρ 
is defined; where its highvalue indicates that the observation belongs to the samestructure, and low value for pixels that do not. Thiscorrelation within structure is expressed as
22
(/)
 xyx
 ρ 
σ σ 
=
.
σ 
denotes the noise variance, and
 x
σ 
the signal variance.Typically,
 xy
 ρ 
is closed to 1 and we may assume:
0.
l
 xy
 xy
rifyelse
 ρ 
ζ 
=
(4)Since the observations are corrupted by noise, we maypresent the probability
(|,)
Py
ζ 
that an observed value
 y
at location
 k
belongs to
ζ 
.If we assume constant variance and uncorrelatedobservations, a formulation similar to the Bilateral filtercan be derived.
 yy
 R
as well as its inverse are diagonal withconstant entries. The Weiner filter may then beimplemented by the conditional average:(5)where
(|,)
l
KyPy
η 
ζ 
=
is the normalization factor and
 xy
 ρ 
is constant. Equation (5) may be expressed in the formof Bilateral filter:(6)where (7)(8)are the correspondence between the image estimator andthe Bilateral filter. Thus, Bilateral filter may be used as anefficient image estimator.In most implementations of Bilateral filter, Gaussian blurfunction is used. The special characteristic is that itprevents blurring across edges by decreasing the weight of pixels when the intensity difference is too large. Bilateralfilter is also attractive for our application of dynamic rangecompression because it is non-iterative, robust, andrelatively simple for hardware realization.
Fig. 1 Bilateral filter. (a) Input image showing small amplitude details(or noise) and high amplitude edge, (b) Gaussian low-pass filterfunction –
w
 2
, (c) intensity function –
w
1
, (d) combined filterfunction derived from
w
1
and
w
 2
, (e) the final filter output showingthe much reduced small amplitude details and the preserved largeamplitude edge information.
 
4.
 
IMPLEMENTATION OF DYNAMIC RANGECOMPRESSION
It was described in last section on how Bilateral filter canbe used for edge-preserving low-pass filter. In this section,more detail discussion on the implementation of dynamicrange compression is given.
{|}
 xExy
=
1
ll
 xyyy
 xrRy
=
1(|,)
l
l
 yPy
 x
η 
ζ 
=
1(|,)(|,),(|)
l
l
 py yPyKpy
 x
η 
ζ ζ 
=
1
(|,)(||)(|)
l
 pywyy py
ζ 
2
()(|)
l
wP
ζ 
 
Our implementation of dynamic range compression isbased on a multi-scale decomposition of image [5][6].Typically, a two-scale decomposition, where the
base
 image (less details) is computed using Bilateral filtering,and the
detail
image is the division of the input intensity bythe base layer (please refer to
Fig. 1
). The
base
image hasits dynamic range (contrast) reduced, while the magnitudeof the
detail
image is unchanged. The final output is thesummation of the two decompositions and thus has overalldynamic range reduced while the detail is preserved. Formore details on the algorithm, please refer to providedreferences.
(a)(b)(c)
Fig. 2 Two-scale decomposition. (a) Input image, (b)
 based 
imagecomputed by performing Bilateral filtering on input image. Noticehere that the small details is smoothed out while the high contrastedge information is preserved, (c) the
 detail 
image
 
Fig.3 shows the simulation result from dynamic rangecompression. Note that the compression was carried outonly on luminance channel. Thus, the color image wasseparated into two channels, luminance and color. Afterthe luminance channel is processed the luminance andcolor channels were inverted back to colored image.
(a)(b)
Fig. 3 Dynamic range compression result reported in [5]. (a) Inputimage showing high resolution image but contains portion with brightzone (near the lamp) and vary dark zone (corners), (b) Output imageshowing much improved lighting distribution throughout the imagewith details preserved.
5.
 
PROPOSED HARDWARE ARCHITECTUREFOR DYNAMIC RANGE COMPRESSION
In this section, we propose architecture for efficientimplementation of dynamic range compression algorithmdescribed earlier. Our goal is to maintain low hardwarecomplexity while preserving the algorithm performancespecifically:1.
 
It should effectively reduce the dynamic range of image, and with minimal reduction in picturesharpness (details).2.
 
It should be simple to be realized in hardware. Itshould not require frame buffer, i.e. base on in-stream processing. Thus, the hardware will bepractical for real-time video post-processing usinglow-cost components.3.
 
It should be able to process at real-time video datarate and thus usable for implementation inconsumer products.

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