Course 29.

Computer Organisation and Architecture (Web Course)

Faculty Coordinator(s) :

1. Prof. Jatindra Kumar Deka

Department of Computer Science and Engineering

Indian Institute of Technology, Guwahati

North Guwahati, Guwahati 781039

Assam, India

E-Mail: jatin@iitg.ernet.in

Telephone : (91-361) Off : 2690321-8 Extn: 2354

Res : 2691152, 2584354

Detailed Syllabus :

Module Lectures
Module-1 Lecture-1: Introduction to computer system and its submodules
Lecture-2: Number System and Representation of information
Module-2 Lecture-1: Arithmetic and Logical operation and hardware implementation.
Lecture-2: Software implementation of some complex operation.
Module-3 Lecture-1: Arithmetic and Logic Unit, Introduction to memory Unit, control
unit and Instruction Set
Lecture-2: Working with an ALU, Concepts of Machine level programming,
Assembly level programming and High level programming
Module-4 Lecture-1: Various addressing modes and designing of an Instruction set.
Lecture-2: Concepts of subroutine and subroutine call
Lecture-3: Use of stack for handling subroutine call and return
Module-5 Lecture-1: Introduction to CPU design, Instruction interpretation and
execution, Micro-operation and their RTL specification
Lecture-2 & 3: Hardwired control CPU design
Lecture-4 & 5: Microprogrammed control CPU design
Module-6 Lecture-1: Concepts of semiconductor memory, CPU-memory interaction,
organization of memory modules
Lecture-2: Cache memory and related mapping and replacement policies.
Lecture-3: Virtual memory
Module-7 Lecture-1: Introduction to input/output processing, working with video
display unit and keyboard and routine to control them
Lecture-2: Programmed controlled I/O transfer
Lecture-3: Interrupt controlled I/O transfer
Lecture-4: DMA controller
Module-8 Lecture-1: Secondary storage and type of storage devices
Lecture-2: Introduction to buses and connecting I/O devices to CPU and
memory
Module-9 Lecture-1: Introduction to RISC and CISC paradigm
Lecture-2 & 3: Design issues of a RISC processor and example of an existing
RISC processor.
Module-10 Lecture-1: Introduction to pipelining and pipeline hazards, design issues of
pipeline architecture
Lecture-2 & 3: Instruction level parallelism and advanced issues.
Module-11 Lecture-1: Introduction to interconnection network and practical issues.
Lecture-2 & 3: Examples of interconnection networks
Module-12 Lecture-1: Multiprocessors and its characteristics
Lecture-2: Memory organization for multiprocessors systems
Lecture-3: synchronization and models of memory consistency.
Lecture-4: Issues of deadlock and scheduling in multiprocessor systems.
Module-13 Lecture-1: Cache in multiprocessor systems and related problems
Lecture-2: Cache coherence protocols
Module-14 Lecture-1: Parallel processing concepts
Lecture-2: Parallelism algorithm for multiprocessor systems.