Flash Memories have an increasing importance for the construction of mechanically robust embedded computer systems and consumer electronics. For consumer applications, at least \ufb01ve different solutions exist: Compact Flash (CF), Sony Memory Stick (MS), Secure Digital (SD), Multimedia Card (MMC) and the xD-Picture Card. Of every type, different generations with different technical parameters (access speed, capacity) exist.
Usually, the embedded controller of the medium is responsible for wear-levelling and error correction. If no controller exists, the \ufb01le system must take care of these aspects. Therefore, a number of specialized \ufb01le systems have been developed, among them the Journalling Flash File System (JFFS2) and the Yet Another Flash File System (YAFFS2).
The aim of this thesis is to develop methods to characterize the timing of access operations for \ufb02ash memories of different types and with different \ufb01le systems. Amongst other the work should present detailed analysis of the following aspects:
\u2022basic write and read access operations to different media types
\u2022performance with random and sequential access patterns
\u2022achievable and sustainable throughput including worst cases
\u2022mount times for media of different capacity and \ufb01le systems
\u2022evolution of certain parameters for media of different age
\u2022worst case behavior of different \ufb01le systems
\u2022in\ufb02uence of \ufb01le system on performance and timing predictability
Flash memories are used as the main storage in many portable consumer electronic devices because they are more robust than hard drives. This document gives an overview of existing consumer \ufb02ash memory technologies which are mostly removable \ufb02ash memory cards. It discusses to which degree consumer \ufb02ash devices are suitable for real-time systems and provides a detailed timing analysis of some consumer \ufb02ash devices. Further, it describes methods to analyze mount times, access performance and timing predictability of \ufb02ash memories. Important factors which in\ufb02uence access timings of \ufb02ash memories are pointed out and different \ufb02ash \ufb01le systems are evaluated with regard to their suitability for real-time systems. Some remaining problems of existing \ufb02ash \ufb01le system implementations concerning real-time use are discussed.
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