Design of Analog MOS LSI Lecture 3 Small Signal Modeling of CMOS Subcircuits

Michael Perrott September 10, 2003

Copyright 2003 by Michael H. Perrott All rights reserved.

Outline

Thevenin modeling for small-signal analysis Small-signal analysis of CMOS Subcircuits

- Amplifiers - Current mirrors - Current sources - Cascode and enhanced cascode techniques

M.H. Perrott 2003

Small Signal Analysis

A CMOS Amplifier

Small Signal Analysis Steps

ID RG RD

1) Solve for bias current Id vout

RS

vin Vbias

2) Calculate small signal parameters (such as gm, ro) 3) Solve for small signal response using transistor hybrid- small signal model

Key analysis step is to plug in the Hybrid- model

- Small signal parameters determined from biasing - All independent sources are set to zero

M.H. Perrott 2003

Analysis of Amplifier Using Hybrid-Pi Model

Fill in Hybrid-model for transistor and set independent sources to zero

MOS Hybrid- Small Signal Model
RG

vin

vgs

gmvgs

-gmbvs

ro

RD

vout

vs

RS

Use KCL/KVL to solve for node voltages/currents

- Requires solution of simultaneous equations!

Is there a faster way?

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Thevenin/Norton Modeling

Allows simplification of circuits into One-Port and Two-Port models

- Eliminates having to solve simultaneous equations! With practice, can calculate many circuit characteristics by inspection Note: we will assume unilateral behavior for two-ports This is valid for transistor circuits given the Hybrid- model on the previous slide

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Basics of One-Port Modeling

Thevenin Equivalent Zth Vth Ith Zth Norton Equivalent

Linear Network

Vth computed as open circuit voltage at port nodes Ith computed as short circuit current across port nodes Zth computed as Vth/Ith

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Basics of Two-Port Modeling (Unilateral)

Linear Network

ZL

Zs Vin

We now include a dependent current or voltage source Zin

- Solve using 1-Port

analysis at input

No Independent Sources

Zout

- Solve using 1-Port

analysis at output with V1 = 0

Zs Vin V1 Zin GmV1 Zout ZL

GM

- Short circuit output - Open circuit output

OR
Zs Vin V1 Zin AvV1 Zout ZL

current as a function of V1

Av

voltage as a function of V1
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Analysis of Cascaded Blocks

Block 1
Linear Network

Block 2
Linear Network

Block 3
Linear Network

Vin

Va

Vb

Vc ZL

No Independent Sources

No Independent Sources

No Independent Sources

Vin

Zin GmVin

Zout

Va

Zin GmVa

Zout

Vb

Zin

GmVb

Zout

Vc ZL

Zout,effective Vth,effective Vb Zin,effective

Analysis carried out without solving simultaneous equations!

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Thevenin Modeling of CMOS Transistors

Hybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm
2 2|F| + VSB 1 ID

Use the Hybrid- model of transistor to calculate Thevenin resistances at each transistor node Key point: we dont need to do this every time we analyze a circuit
general use

- We can derive expressions for Thevenin resistances for

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Thevenin Resistance Expressions

Hybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm
2 2|F| + VSB 1 ID

Thevenin Resistances

Exact Rth = ro (1+(gm+gmb)RS)+RS d Rth = infinite

g

ID RG Rthg g d s

RD Rthd

Rths= (1+RD /ro ) (ro

1 ) gm+gmb

Approximation (gmb << gm, gmro >> 1) Rths RS Rthd= ro (1+gmRS) Rth = infinite g 1 + RD /ro Rth = gm s 1 gm

Thevenin resistances useful for many calculations It would be nice to replace Hybrid- model with Thevenin equivalent
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Replace Hybrid- Model with Thevenin Model

Hybrid- Model Rthd RG Rthg g vgs gmvgs -gmbvs ro gmb s Rths vs RS ro d RD Key Small-Signal Parameters Parameter gm Strong Inversion 2nCox(W/L)ID Weak Inversion qID nkT (n-1)qID nkT 1 ID

gm
2 2|F| + VSB 1 ID

Thevenin Resistances

Exact Rth = ro (1+(gm+gmb)RS)+RS d g Rthg= infinite

Proposed Thevenin Model d Rths Rthg vg Avvg is

ID RG Rthg g d s

RD Rthd

Rths= (1+RD /ro ) (ro

1 ) gm+gmb

is

Rthd

Approximation (gmb << gm, gmro >> 1) Rths RS Rthd= ro (1+gmRS) Rthg= infinite 1 + RD /ro Rth = gm s 1 gm Exact Av= gmro = 1 gm gm+gmb

s Approximation (gmb << gm, gmro >> 1) Av = 1 = 1

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Example 1: Source Follower Amplifier

Perform small signal analysis by plugging in Thevenin model rather than Hybrid- model

- Determine parameters using calculations on summary

sheet in previous slide
RG g Vin d M1 s RS Vout

M1 RG g vin Rthg vg Avvg Rths is d

is

Rthd

s RS vout

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Reduce to Two-Port For Convenience

Since Av is approximately 1, we see that a source follower acts like a voltage buffer with overall gain < 1

- Note that overall gain is highly influenced by R

RG g Vin d M1 s RS Vout vin RG g vg Rthg Avvg Rths s

RS

vout

M1 RG g vin Rthg vg Avvg Rths is d

is

Rthd

s RS vout

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The Issue of the Backgate Effect

RG Vin M1 Vout RS vin vg RG gm v gm+gmb g 1 gm+gmb

Rs

vout

Backgate effect alters VT as the source node varies

- Leads to reduced gain for the source follower

mb

Backgate effect is eliminated if we tie the bulk connection of the device to its source

- Causes g to be set to zero - For N-well process, this is only possible for PMOS
devices
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Some Technologies Allow Elimination of Backgate Effect

RG Vin M1 Vout RS n-well process vin vg RG gm v gm+gmb g 1 gm+gmb

Rs

vout

RG Vin M1 Vout RS vin

RG 1 gm

vg

vg

Rs

vout

p-well or triple well process (tie the well and source)

P-well process: NMOS devices Triple well process: both NMOS and PMOS devices
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Example 2: Degenerated Common Source Amplifier

Again plug in Thevenin model for transistor Reduction to two-port model achieved by lumping impact of middle stage of model into last stage

- Dependent current source will then depend on v

RD RG M1 Vout RS

rather than is

Vin

M1 RG g Rths is d

vin

Rthg

vg

Avvg s RS

is

Rthd

RD

vout

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Reduce to Two-Port

Calculation of Gm

RD RG M1 Vin RS Vout vin

RG

vg

Rthg

Gmvg

Rthd

RD

vout

M1 RG g Rths is d

vin

Rthg

vg

Avvg s RS

is

Rthd

RD

vout

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Example 3: Common Gate Amplifier

Reduction to two-port is easy once we realize that dependent source Avvg is zero since vg = 0
RD Vout M1 RS Vin M1 g Rths is d

Rthg

vg

Avvg s RS vin

is

Rthd

RD

vout

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Reduce to Two-Port

Left section is eliminated

RD Vout M1 RS Vin M1 g Rths is d vin RS

is Rths is Rthd RD vout

Rth

vg

Avvg s RS vin

is

Rthd

RD

vout

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Example 4: Cascode Amplifier

RD Vout M2 RG M1 Vin RS s2 M1 RG g1 Rths1 is1 d1 Common Gate Rths2 M2 is2 d2

2is2

Rthd2

RD

vout

vin

Rthg1

vg1 Av1vg1 s1

1is1

Rthd1

General Model

RS

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Allows elimination of Miller effect of Cgd1 Reduction to two-port will be done in several steps

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Eliminate Middle Sections

RD Vout M2 RG M1 Vin RS s2 M1 RG g1 d1 Rths2 M2 is2 d2

2is2

Rthd2

RD

vout

vin

Rthg1

vg1

Gm1vg1

Rthd1

Calculation of Gm1 same as for common source amp To reduce further, note that
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Resulting Two-Port Similar to Common Source Amp

RD Vout M2 RG M1 Vin RS M2 d2

Gm1vg1

Rthd2

RD

vout

M1 RG g1

vin

Rthg1

vg1

Key difference: drain impedance much larger

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Example 5: Differential Amplifier

R1 Vin+ R2 Vin-

Vo- Vo+ M1 Ibias M2

Vbias

M4

Useful for amplifying signals in the presence of noise

- Common-mode noise is rejected

performance

Useful for high speed digital circuits

- Low voltage swing allows faster gate/buffer

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First Steps in Small Signal Modeling

R1 Vin+ R2 VinVin+ R1 R2 Vin-

Vo- Vo+ M1 Ibias M2

Vo- Vo+ M1 M2

Vbias

M4

Rthd4= ro4

Small signal analysis assumes linearity

4

- Impact of M on amplifier is to simply present its drain impedance to the diff pair transistors (M and M ) - Impact of V and V can be evaluated separately and
1 2 in+ in-

then added (i.e., superposition) By symmetry, we need only determine impact of Vin+ Calculation of Vin- impact directly follows

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Calculate Impact of Vin+ using Thevenin Models

R1 Vin+ R2

Vo- Vo+ M1 M2

ro4 R1 M1 is1 Rths1 Vin+ Rthg1 vg1 Av1vg1 VoM2 R2 Vo+

1is1

Rthd1

Rths2 2 is2

Rthd2

is2 General Model ro4 Common Gate

Analysis follows fairly easily, but there is a simpler way!

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Method 2 of Differential Amplifier Analysis

R1 Vin+ R2 VinVid 2 Vic R1 R2

Vo- Vo+ M1 M2

Vo- Vo+ M1 M2 -Vid 2 ro4

ro4

Partition input signals into common-mode and differential components By superposition, we can add the results to determine the overall impact of the input signals

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Differential Analysis
is1= is2 iR = 0 -Vid 2 Vid 2 R1 R2 -Vid 2 Vid 2

R1 Vid 2

R2

R1 VoM1

R2 Vo+ M2 -Vid 2

Vo- Vo+ M1 is1 iR M2 is2 ro4

Vo- Vo+ M1 M2

Key observations

- Inputs are equal in magnitude but opposite in sign to each other - By linearity and symmetry, i must equal i
s1 s2

This implies iR is zero, so that voltage drop across ro4 is zero The sources of M1 and M2 are therefore at incremental ground and decoupled from each other!
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Analysis can now be done on identical half-circuits

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Common-Mode Analysis
R1 Vic R2 Vic is2 ro4 is1= is2 iR = 2is1= 2is2 Vic is1

R1 VoM1 idiff = 0 2ro4

R2 Vo+ M2 Vic is2 2ro4 Vic

R1 VoM1

R2 Vo+ M2 Vic

Vo- Vo+ M1 is1 iR M2

2ro4

2ro4

Key observations

- Inputs are equal to each other - By linearity and symmetry, i must equal i This implies i = 2i = 2i - We can view r as two parallel resistors that have equal
s1 s2 R s1 s2 o4

current running through them Allows us to break up amplifier into two identical halfcircuits

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Issue: Thevenin Method Breaks Down in Some Cases

RthA

M1

RS

Using Thevenin method

But, in reality

Issue: coupling between source, drain, or gate

M.H. Perrott 2003

- Do we have to abandon the Thevenin method?

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Thevenin Resistance of Diode-Connected MOS

Diode-Connected Device Derive RthA Using Hybrid-p Model
RthA RthA RthA

Resulting One-Port Model

vgs M1

gmvgs

-gmbvs

ro

1
gm

(gm+gmb) gm

RS

RS

vs

RS

Plug in Hybrid- to do the analysis Whenever you see this exception, you can simply use this result for small signal analysis (i.e., Hybrid- model not needed anymore)
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Example: Current Mirror / Current Source

Ibias n1 M2 n2 M1 Iref

M2

n1 g1

M1 d1

n2

n2

1 gm2

Rthg1

vg1

g m1vg1

Rthd1

Rthd1= ro1

Diode-Connected

Common Source

Key parameter of current source output is its output resistance

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Cascoded Current Source

Iref Ibias Vbias M3 Rthd3 Vbias M3 Rthd3

M2

M1

ro1

Offers increased output resistance Calculation straightforward using Thevenin resistance method

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Double Cascode Current Source

I1 Vbias2 I2 M3 Rthd3

Vbias1

M2

M4

M1

Offers even higher output resistance Calculation straightforward using Thevenin resistance method

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Wilson Current Mirror

I2 I1 M2 Rthd2

M3

M1

Relies on feedback in its operation

coupling!

- Thevenin method cannot be applied due to source/gate - Output resistance comparable to cascode current source

Using Hybrid- analysis

This circuit is rarely used these days

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Enhanced Cascode Current Source

Ibias

Ibias2

Iref M4

M3 M2 M1

Offers output resistance comparable to double cascode current source As with Wilson mirror, analysis is tricky due to source/gate coupling

- Must resort to Hybrid- model - Result (using R formula in the following slide)
thd

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Thevenin Resistances for CMOS Transistor Feedback Pair

RA RC RA Rthd M4 M3 M4 RC Rthd

S
RB

Rths

M3

vgs4

gm4vgs4

-gmb4vs4

ro4

ro3

-gmb3vs3 vs3=0

gm3vgs3 vgs3

S
vs4 RB

Rths

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Variation on a Theme: Enhanced Cascode Amplifiers

Ibias1 Ibias2 R1 Vout M4 Input Source M3 M2 M1 Iin Rs

We can turn the enhanced cascode current source into an amplifier

- Inject a current input at the source of M

previous slide

Key aspects of small signal analysis can be done using Thevenin method

- Simply leverage Thevenin resistance formulas shown on

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Small-Signal Analysis of Enhanced Cascode Amp

Ibias1 Ibias2 R1 Vout M4 Input Source M3 M2 M1 Iin Rs 1 gm2 M3 Rthd1 Rin Iin Rs M4 Input Source R1 Rout Vout

From Thevenin resistance calculations, we know

- Input impedance is quite low

- Output impedance is probably determined by R

This amplifier is useful for extracting a current signal from a high impedance source
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Conclusion

CMOS subcircuits form key building blocks for larger circuits (such as op-amps)

- Consists of amplifiers, current mirrors, current sources - Avoids having the solve simultaneous equations

Thevenin modeling can be used to quickly perform small-signal analysis of CMOS subcircuits Thevenin approach is limited to subcircuits that do not have coupling between source, drain, and/or gate
for such subcircuits Examples: diode-connected devices, enhancedcascode configuration

- However, can often derive specific Thevenin equivalents

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