CAREER ENDEAVOUR PUBLICATIONS has taken due care In collecting the data and providing the soluons, before [pulsing his book npteo his, fan inaccuracy or rinng eros are thee, CAREER ENDEAVOUR PUBLICATIONS aves | no responsibilty. CAREER ENDEAVOUR PUBLICATIONS wil be grat i you could point out any such eror. Your | suggestions wile highly appreciated All right reserved by CAREER ENDEAVOUR PUBLICATIONS. No part of this book may be reproduced or {utilized in any form without the written permission from the publisCONTENTS Chapter Page Nos. Chapter-1; Network Theory Chapter-2: Semiconductor Diodes .. Chapter-3: Bipolar Junction Transistors ... Chapter-4: Field Effect Transistors (FET) . Chapter-5: Zener Diode and opto Electronics... Chapter-6: Operational Amplifier .. Chapter-7: Digital Electronics ... Chapter-8:. Microprocessor ...CHAPTER ~— 1: NETWORK THEORY ee Basic Circuit Analysis and KVLIKCL Resistanee: It is the property of a resistor to oppose current, R Case-I: > 5-—=—— Conventional current flow from high to low potential, Case: 54 Blectron current flow fiom low to high potential In both case I and case Il: 7 = Where resistance of Resistor: | R where [= length of conductor, A= Area of conductor, p = resistivity of conguctor. . ‘The ph rl . i described by the tem . Lg ? (charge across a cross- sectional boundary Voltage: + Tomove the electrons In analytical circuit ext where a differential amod Voltage = “Energy per : . ae cc eee automobile battery, for example, has a voltage of 12V across its terminals even if nothing whatsoever is connected"to the terminal. Ohm’s Law: ‘+ Atconstant temperature, the potential difference V across the terminals of resistor R as show below, is directly proportional to the current i flowing through it. That is em) TT] : Ohm's law can also be expressed in terms of conductance G as Fail 1 G = Conductance [mho or Siemens] NETWORK THEORYrpretation of Ohm’s Lav constant temperature current density is directly proportional o electric field intensity.” +q(___ ji Lo Jak Ue J s+» Current density (A/tt}, 6 ...no.e. Conductivity [((Q—m)"'] E suunew Electric field intensity (V/m) Linearly test of Resistor: «When resistive element obeys ohms law then the element is called as linear resistor otherwise it is a non-linear resistor, Power Dissipation in a Resistor: Practical Voltage Soure sources, | Current Sources: Ideal c ape across the source. | | AC r Practical Current Sources: Practical current sources delivers energy at specified current I, which is dependent on voltage across the source. In real time system current source does not exist. I i@ 1® 3R VL DC - AC NETWORK THEORYiS @ Capacitance: It is the property of capacitor to hold charge q to confined electric field v 45 de ——— [._#A oF ide [=F |¢ is] v d = distance between plates, A = Area of cross section of each conducting plates Note: When the capacitance of capacitor is independent of current is called as linear capacitor. Q ay ' c=2 incl. V sents v 7 dt a Inductance: «Ifthe curent “i” lowis aye the magnetic flux “9 ! a the cireuit, equal to att dt where, L is constant o! ‘Fo 0) 3 «0 @) © Inductive circuit ‘Mutually coupled circuit v ‘Therefore, there is an induced emf in coil B, which is equal to BG) - EG) + As (dildt) is directly proportional to (dé / df) . Comparison of these two equation gives | 7) 5 NETWORK THEORYAs v= 14, so in steady state ie. 1y00 [V=0 a ‘And circuit behaves like shots circuit. Active Element: When an element is capable of delivering energy for infinite period of tine is called as active element. Example: Voltage, source, current source. Passive Element: When an element is not able to deliver energy for infinite time period is called as passive clement. Example: Resistor, inductor and capacitor Active Element Voltage Source: Ideal voltage source delivers energy at a specified ‘V’. Internal resistance of ideal voltage source is zero. DC source Voltage Divider Rule: \ 1 i | NETWORK THEORY+ For eapacitor: Ton yh CTC, Kirchoff’s Voltage Law (KVL): It states that algebraic sur ofall voltages in a closed loop is equal to zero, It is based on conservation of energy, | R, | xa | I CY DVa Vy soe ai Its wT ov Soln. Applying KVL 6+341-5-4-9 3=11L nd Amp Q Calculate V ., in the given circuit 22a WwW (48 we [A x } NETWORK THEORY lov@ Sol, KVL at loop 1: (Left loop) ~4l, ~ 21, +5 =0, 1, = 5/6 Amp KVL at loop 2: (Right loop) 10 - 21, ~ SI, = 0 10 T= > Amp. Vag = Vax * Vir * Von wo 3nd 24 2D ow 2042420 _ 32 6 7 6 7 ub Vy =1.53Volt Q The value of I, in the circuit is voltage source] Applying KVL 8-71-15 -51 NETWORK THEORYSoln. Soln. el Calculate the values of V, and V, by KCL: QV 2M T 6A pu ba TV ¥, Applying KCL at node 1; 6 = “| 3-h, hh ry. 13° 2 By solving equation (1) and (2); We get V, = SV and V, = 3V KCL at node (2) : Limitations of KVL and KCL: KCL and KVL wil fail foghe KVL and KCL wil fal effect of R, L, C, Obtain single current source for network shown (1) w= Q) oA 18v@) @uv 60 50 [ 3 62 GA HQ => OSA v0 L NETWORK THEORYSol. Linear and non-lineay Element Active and Passive Elemy Bilateral and Unilateral Element: Convert given cizcut into a single voltage source x ag fo 12a i@ v x { 1 10. ss Qxv <> @iowv 62 @nv Y A linear network 8 current passing tl Linear Single ress AEE and capacitances dOtagL Inge in applied voltage at a linear element, is called linear network or their resistance inductance circuit current . ira creat semen WELW CAL GRIGDG GAVOUL GOP at rassingtroughiten it is called an active element. Vacuum tubes and semiconductor devices are active elements on the | other hand resistors, inductors, capacitors, thermistors etc. are passive elements as they do not have any intrinsic mean of signal boosting. In V-I relation if any portion has V-I value as negative then it is active network. Ifthe magnitude of the current passing through an clement is affected due to change in polarity of polarity of the applied voltage then element is called unilateral element. On the other hand if extent ‘agnitude remains the same even if the applied voltage’s polarity is changed thet it is called a bikteral elements. If by changing variable relation between both dependent variable and independent variable remains same then called bilateral network otherwise unilateral network. NETWORK THEORYSi a ‘Mesh Analysis: Mesh is a property of a planner circuit and is undefined for a non-planner circuit. We define a mesh as “A loop that does not contain aaty other loops within it” Fig. (a) Fig. (6) (Planner) Non. Planner] No branch passes over or under any other Network Theorem: J ‘i Superposition Theorem: + The statement of super { : “fn any linear bilateral nay oe iy one of the branches is equal to algebraic surf in i egigblrest of the sources are replaced by their internal => The principle of superpas => This isnot valid for powe => Sources can be made ind (a) Shot circuiting the vg} like resistor, inductor, varying or time invariant. Otter Defi “Te apap MAAKOBFOGTERGEAVOR OOM ru ose in a linear circuit is the algebraic sum of the voltage across (or current through) that element due to each independent source acting alone. Q. Calculate value of V for the gives circuit by using superposition theorem, 82. 0 apy 43 | Soln, At one time only effect of one source is considered. Voltage source is short circuited and current | source is open circuited. Since there are two sources, So, V = V, + V, NETWORK THEORYSoin. Let V, is the voltage across 4 ohm due to 6V voltage source alone (in this case current source is ‘open circuited). 52. we = Vi=—— x4, 82. angy, =8 volts So total voltage Since there are two ‘Sontota W=aV,+V, Let V, is the volta, it an source is short circuited) 32 nc ans Wwwcareerendeavourcom aan =44, V,=2*4=8 volt 34245 7 Let V, is voltage due to 20V source alone ry ¥,=4 volt, V=V,+¥,=8+4 [%,=l2volt x2 107° ‘Thevenin’s Theorem: Any two terminal linear bilateral network can be replaced by a voltage source in series with impedance, Bhd Ov. NETWORK THEORYCalculation of Thevenin’s equivalent for independent source: For Catculation of Ry: All independent current sources are open circuited and all independent voltage sources are short circuited, For Calculation of V,,; Vollage across open circuit terminal. Calculation of Thevenin’s equivatent for dependent source: For calculation of V,,: Voltage is calculated across open circuited terminal by assuming current 7ec0 in that terminal For calculation of R,,: First [seis calculated by assuming short-circuited terminal and then R,, is calculated by | Rn = Mal Ise Q. For the given circuit calculate the power loss in the 1 olun resistor by use of thevenin’s theorem, 100; sO Ry 10x5 “10+5? ato. Ma 3a RytR, 33344 Q. Find the current through the 50) resistor in the circuit by use of Thevenin’s theorem. 29 ae 1a io] SV NETWORK THEORY@ iS Sol. For calculation of V,,, = 5 ohm resistor is open citcuited and so current in $ ohm will be zero. v at fio Asv For Caleulating Ry,; 2A current source is open circuited and SV source is short circuited. 29 I ao 12. =—B_2——=]A . 4 Ry +R, 5+10 : Norton’s Theorem: Any two terminal linear bilateral network containing active and passive element can be NW c [—B B Note: R KG) 3 (2) Thevenin’sequivatentciruit —_(b) Norton's equivatent circuit » Both of the above circuits are convertible to each other with the relations given as below. Q. Find the Norton’s equivalent circuit across a-b for the network shown in figure: 1 50 5A@ 20 wa b 50: Soin, 5A Te wr NETWORK THEORYQa Soin. Reciprocity Theorem: sv 350 Big = 1A ‘The equivalent circuit after shorting ab terminal. 10a 199 . 503 A linear network is said fo be reciprocal or bilateral ifit remains invatiant due to the interchange of n of cause and effet in the network. For verification ofthe reciprocity theorem following conditions mist be satisfied Circuit should consist of linear, ‘time-invariant bilateral element. Circuit should consist of only a single indep yendent sources. When circuit consist dep: MiNteca apie platineay (Gili hbtlbe-Netified. Maximum Power Transfer Theorem: Maximum power transferred from source to load is only possible when. (@ Source impedance = Load impedance (ii) Thevenin impedance = Load impedance For DC Cireuits: rl Source Network (Load connected to the do source network} (Equivalent source network and load) NETWORK THEORYRy +R, while the power delivered to the resistance load is (rn ¥ xR, woe (i) (e+e) Differentiating equation (i) with respect to R, and equating to zero. We get | R, = Rr, | Hence, it has been provided that power transfer from a de source network to a resistance network is maximum when the internal resistance of the de source network is equal to the load resistance. Again value of that maximum power is, Vin Rn. Vin "Rye Ray ak, [hm Fon 100% | => = ABx100% | Ry So that efficiency in this case is 50% i.e, half of the total power is transferred to the load R,. [Maximus Power Transfer Theorem for ac circuits} © Consider the Thevenin’s equivalent circuit for an ac network as shown below: + Now let us consider different cases for maximum power transfer, Case-1: Both R, and X, are variable 2 When both R, and X, are variable then maximum power from source to load will be transferred if load impedances is complex conjugate of internal impedance of the network. Z=%y NETWORK THEORY.7 = + Also durinig maximunt power transfer efficiency will be 50%, Case-2: R, is variable but X, is constant, « In this case maximum power will be transferred when, [R, =|Z,, + JX. or Ry =fR2 +(%q 4X) ay + Efficiency can be caleulated as | =| : ER, 100 % a | ¢ Efficiency comes out (0 be greater than 50% | n> 50% Case-3: Load impedance is purely resistive. «In this case maximum power will be transferred when, | R, =| » Efficiency comes out to be greater than 50%, Case-4: R, and X, are variable but’ the itripedance ‘angle is constant ke. Z,=R,+JX, and Q= In this case maximum power will be tra Q Calculate value of Rin amount of this power. avi 20. 10. xg —_—_1— &) Soin. Above circuit can be solVGA\by thé ‘190 To find Ry, 22 1 10 52 To find V,, open load R. 4¥( 29 fa NETWORK THEORYVn (6.4) i ~—h= =12W Maximum Power 32> 4.0.85 Q. Assuming maximum power transfer fiom source to load R calculate the value of R and maximum value of power transferred, sov 19 1g sa x 102 §R 3% u 100 Sol, Vy across XY = -—-V, Ryy across XY _ Yi, _ (100/37? _ 100 mx AR gy 2do0 3 2 P, WattAssignment - Network Theory 1. A segment of a circuit is shown in figure V, = SV, V_ = 4 sin 2t. The yoltage V, is given by (2 Taps, 2A (a) 3-8 cos 2% @) 32 sin 2r (©) 16 sin 2¢ (@ 16 cos & 2. Inthe cuit of gure the magnitudes of V, and V. are tvive that of V, Given that = 50 He, the inductance of coil is, _ (a) 2.14mH . * (318 mH @) 132H 3. Inthe figure vaiue of R is : a: RQ . 149. 19 10a 5k toov i aov (@ 100 ®) 180 @2u9 @ ne 4, In figure, the potential difference between points P and Q is www. ul " 7 (a) 12V (b) 10V ()-6V @ BV 5. In figure, the value of resistance R in Q is Toty 2A LO0V( tons is @) 10 (b) 20 ©)30 @ 40 NETWORK THEORY10. The RMS value of the voltage u(t) = 3 + 4 cos (30) @ vi7v ) sv ov @ G+22v Assuming ideal element in the circuit shown below, the voltage V ., will be a 22 of.) b @ Vv ©) ow av @sv ‘The current through the 2k Q resistance in the circuit shown is Qc Ika (a) OmA (d) mA. The time constant for the given circuit will be IF 39 IF AF 30 @3A, fa) Hes. (b) 14s @4s Os Jn the circuit given below, the value of R required for the transfer of maximum power to the load having a resistance of 30. is gol ie me \Reid @ 0 oo (b) 32 (c) 62 @) The ms. value of the current i(/) in the circuit shown below is a 19 or “$6 (Isin)v i @) yA @ FA @IA (@) 2A NETWORK THEORY12. 13. 4. 45, 16. 17. In the given figure, the Thevenin’s equivalent pair (voltage, impedance), as seen at the terminals P- Q is given by 2000 () 2V,50) () GV,52) © (4V,50) —— @ (2V,7.50) In the circuit shown, the power supplied by the voltage source is (@) OW sw ©@10w (@) 100w The voltage e, in the figure i (@) 48v () 24v (36 _ @ 2Vv In the circuit of figure, the value of the voltage source Eis ; Roa en (@) -lov (b) av @-0v @ i6v ‘The voltage V in figure is equal to: ov iv r 10V (3 () 3V @sv (@ None of these ‘The voltage in figure is be 2 v *)iov A @ 10v () 15V sv (@ None of these NETWORK THEORY18. 19. 20. 21, 22, 23, ‘What is the value of R required for maximum power transfer in network shown above? 52 49 ave 200: 3a R @ 20 ® 40 (©) 8a @ 162 The voltage across the terminal a and b in figure is: Bre) tw we 20 3a $ @ osv (b 3.0V (33V (@) 40V The nodal method of circuit analysis is based on ° (a) KVLand ohm’s law (®)KCL and Ohm's law (© KCL and KVL. and Ohm’s law The current i, in the @ 124 = RA (4A @ None of these Thevenin equivalent voltage V,.,, and resistance R,, across the terminals AB in the above circuit are 20h ha ove o 305 a 20, fa) 6V,5Q vw o Vi240.. (@) 2V.2.50 i és Pr ‘The differential equatioht ate eG wie ant the'figure is [ey OP oe sins - @ ae +2 i=sine ss 2i(t) = cost © ria til) =cost obra sap sine NETWORK THEORY Tvwa 25. 26. 21. 28. 29. 30. ‘The RC circuit shown in the figure is (a) alow-pass filter (b)a high-pass filter (©) a band-pass filter (d)a band-regeat filter In the circuit shown below, the value of R, such that the power transferred to R,, is maximum, 100 90 @ sa (b) 100 (©) 15Q @ 2002 Find the value of C to deliver the maximum power to load. soe 20 sin 2. @ 0.125F (b) 0.5E (2 Find Z, such that maximum power is transferred to it, 29 bo bo @4 22 JZ @) (2452;2 (b) (2-320 (©) (-J2Q), @ 22 The voltage actoss a capacitor is triangular in waveform, The waveform of current is (a) twangular (b) trapezoidal (©) Simisodal (a) Rectangular The value of R, ofthe network, : 28, 1 1 @ 162Q (b) 20 @32 @ 52 The maximum power that can be distributed in the load in the circuit shown is 30 19 @) 0.396 W () ow. ()6.75W @) 13.5W NETWORK THEORY31. 32. 33. 34. 35. Find V, from the given circuit. 2 vgion $500 wd ~ @ 22V () 83.3V (© 973V @ 103 IEV,() = 4 cos (10° 1)V in the circuit, find Vs. 2mH “On v (@) 64 cos 10 tV (b) 2.4 cos 105 t V wo (©) 6.4 cos 105 t V (@)-2.4 cos 105 t V Determine the current through the branch AB of network shown below. (a) 35+ j15 (b) 35-i15 @1S+535 @1LS- 535 Thevenin equivalent circuit is given by 22 39 “ P oo Ye @) 4V and 10K AY VHA) AMEARd 6K2 524 YOBY HTVKA (@ BV and 6K ‘What is the ratio of currents in the circuit due to 3A and 2A source? Current is taken through R. i900 1000 3A To02=R — @2a, 3 2 4 @ > 5 OF O% NETWORK THEORY oe(Gq 3 ANSWER KEY Lb) 2 © 3. @ 4 © 5. (b) 6 (a) 7. (a) 8 (@) %» ©) 10. (a) He (b) 12. (a) 13. (a) 14. (d) 15. (a) 16. (a) 17. @ 18. (©) 19. (©) 20. (b) 21. (by 22. (b) 23. (©) 24, (c) 25. (c) 26. (a). 27. (d) 28. (d) 29. (a) 30. (a) 31.) 32. (d) 33. (a) 34. (©) 35. (@) NETWORK THEORYCHAPTER - 2: SEMICONDUCTOR DIODES Diede: Junction Diode Characteristic Diode isthe simplest and most fundamental non-linear and active circuit element. Just lke a resistor. The diode has two terminals, but unlike the register, which has a linear (straight-line) relationship between the current flowing through it and the voltage appearing actoss it, the diode has a non-linear i-v characteristic, Consider a crystal of a semiconductor p-n junction is formed if donor impurities are introduced into one side and acceptors into the figure given below. Acceptor ion Junction, Donor ion mloeppeeaqgad Pee @@@Licon eee aaa . gee G.O.Q P-type type Donor ion is represeited by a plus: ian because’ fer onal ion, Acceptor ion is indicated by a minius sign’ because after converts into a negative ion, Diade Symbol: Arrow mark indicates direction of forward current, lectron, it becomes a positive atom “accepts” an electron, it Some electron and holes from n-type and p-type cr0ss into each others region and they get neutralized near junction, The unneutralized ions in the neighbourhood of the junction are referred to as uncovered charges Since this region of the junction isjdepleted of mobile charg, it ig palied the depletion region, the space-charge region ‘or transition region. ° The thickness of this region is of the order of wavelength of visible light (0.5 j1m). Within this very narrow space charge layer, there are no mobile carriers. For Step Graded p-n Jutiction: 1 Shape of charge density p. ‘Space Charge Region (0S) p= Charge Density Distance from junction SEMICONDUCTOR DIODESCorresponding field intensity curve is proportional to the integral of charge density curve. alee. d (S) Pp Te av i 2 2d (ay _ p= (2, , Since, Gye wax a fee E dx E=0 at Y=X, Electric field Note: Electric field intensity will be maximum at the junction ial: Variation of potential in the depletion region is shown as below figure. Blectrostatc potential V Potential - energy barrier for electrons Te {aon 2s a ete aul V0 Sam r istanoe from junction Combination of all these dia y Potential Barrier Potential Barter |V, SEMICONDUCTOR DIODESForward Bias Region: A forward biased or “on condition is established when positive terminal of battery is connected to the p-type material and negative terminal to the n-type material as shown in figure, Depletion region ie (b) Forward biased polarity, ‘The application of forward bias potential will “Pressure” electrons in the n-type material and holes in the p-type material to recombine with the ions near the boundary and reduce the width of the depletion region as shown in figure (a). The resulting minority carrier flow has not changed in magnitude (since the conduction level is controlled primarily by the limited number of impurities in the material), but the reduction in width of depletion region has resulted in a heavy majority flow across the junction. An electron of the 1-type material now “sees” a reduced barrier at the junction due to the reduced depletion region and a strong attraction for the positive potential applied to the p-type material As the applied bias increases in magnitude, the depletion region will continue to decreases in width until a flood of electron can pass through the junction, resulting in an exponential rie in current as shown in the forward bias tégion of the charactetistic oFfiguire (b). Reverse Bias Condition {fan external potential is applied across the p-n junction such that the positive terminal is connected to the n-type material and negative terminal is connected to the p-type material as shown in figure. @. ‘The number of uncovered ions will increase due to the large number of free electrons / hole drawa to the respective potential of the applied voltage. The net effect, therefore is a widening of the depletion region. Asa result majority carrier can not cross the barrier, effectively reducing the majority current flow to zero. ‘The number of minority carriers however, entering the depletion region will not change, resulting in minority cartier flow across the junction. SEMICONDUCTOR DIODES> J,, and r is given approximately by i Note: DC resistance > AC resist «The dynamic resistance of Ge diode’ «Dynamic resistance in Si diode is Contact Potential: (V,) '$ constant Depletion Region «The contact potential V, cannot be read by an voltqeter connected across it because of barrier voltage balance by a metal (0 semiconductor contact potential at the end of diode. SEMICONDUCTOR DIODESPotential barrier and width of depletion layer across P-N junction: ‘The harrier potential Vp is given by [ %, =IVp1#|7,| V, is the potential full in P-region and V, is the potential fall in N-region, Width of depletion layer is given by [ W =W, +17, Since crystal as a whole, is electrically neutral the murriber of charge carriers on both side must be equal ic W, y Ww 3 Ny (i) NW, =NW,; W=W, New; iy ‘6 So, it is clear thet if doping is increased on one side then depletion layer width will increase on other side. In case of P-N, juriction diode if doping is increased on P-side width of depletion layer will increase on N side. Value of Whdth Depletion Layer: jy, = (Net, [a (| €=6,e); £6, =8.854x10" IL7 for Si, 2, =16 for Ge SEMICONDUCTOR DIODES| Forward Biased P-N Junction Diode: | } te: V7, > Cut in voltage or offset Voltage or threshold voltage V,, > Defined as “minimum forward voltage required above which the forward current flow’s through device. In case of reverse biase current is due to flow of minority carriers. Lf voltage is further increased in reverse direction then reverse current does not increase. At the breakdown of junction, value of current increases abruptly. Effect of Temperature on Forward Current: Forward current is only due to majority carrier concentration is almost independent of temperature. SEMICONDUCTOR DIODES‘Note: Cut in voltage V, decreases with temperature. For 1°C increase in temperature V, decreases by 2.3 milli volts. Different Junction in Diode 1. Step graded junction or Abrupt Junction: + Ithas abrupt p-n junction. It refer’s to p* or PN diode, © Comparatively faster than normal diode. + Depletion layer will always penetrate more into lightly doped region consider PN diode. Charge Density a space Charge or Transition Capacitance: When a P-N junction is reversed biased then depletion region acts like an maby odes igrigh sil R and. egions on either side have low resistance and acts as ( ‘may be regarded as a parallel fe plate’ So this P-N ju plate capacitor if is area of parallel plate capacitor and W is width of depletion layer then, Transition Capacitance C, = 4 7 (a) For step graded junction, | WV, So, [oer | 7 aded ju war? (b) For linear graded junction [WV So, | Ca¥, > SEMICONDUCTOR DIODESNote: V, > Knee voltage, ¥, > Reversed biased voltage K —» Depends upon S.C, material 1 n=5 3 for step graded junction (Alloy junction) n= = for diffused junction / Linearly graded junction —> Step graded / Alloy [Ge +V,™ | — Linealy graded / Diffused Diffusion or Storage Capacitance (C,,): Diffusion capacitance dominates in a forward biased diode. It is mainly responsible for storage of minority carriers across the junction, a Mathematical Value: C, = 22 C,=te (r,= dynamic resistance Where g, = dynamic cor Varacter Diode: ‘These are voltage variable capacitor. ‘Varacters diode is a linear graded diode. ts principle of operation is transition capacitance (C,). It is always operated under reversed bias condition, ‘Transition capacitance (C,) is given by [ C, «V~ 1 Where | "=> 3) ‘As reverse bias increases, transition capacitance decreases. SEMICONDUCTOR DIODESRS Characteristic Curve) © Varacter diode is also known as “Vari-cap diode” or “volt-cap diode” or “epi-cap diode” Equivalent Cireuit: : © For fine tuning of Receivers. © Forself balancing of bridges * —_Asapara-amplifier (Parametric amplifier) and itis low noise microwave power amplifier used with satellite communication. Various Diede models in Forward Biasing: 1. Exponential Model: iy o0sy Ne eee 2. Piece-wire titear Characteristic: sloe=4 SEMICONDUCTOR DIODES —™3. Constant Voltage drop Model: _ 4, Ideal-diode: P,—P,p has dropped normally to zero, Nee be determined by the external resistance i see. i junction | Q Consider again the asymmetrical siticon diode we discussed in the previous two examples. Let the meaq litime of holes be 10 nS, and let f= 1. Ifa forward current of 0.1 mA is flowing in the diode, determine the diffusion capacitance. ~ 10nS%[Link] = 0.026V, r= oey “ay | Ye= 0026¥, TOY = 38.5pF SEMICONDUCTOR DIODESiq Q. Consider an asymmetrical silicon junction, with N, = 10'“/em? and N, = 10'"/om’, If the cross- sectional area of the junction is 9.641n°, determine its transition capacitance with no applied bias. Soin, Cr=7 > @ [ize Van, T 10%x10" — 0.026in( _l0%xt0 ee asx10F Hence, 0 8510 0.94 = 0.11 pt Or, ¥;=0.94V 16x10" x10" cE AVINe 4g |NoE _ €A _ 11.9x8.85x10" Rev, ~ “V2 ‘lik (F iM eS 2 : Edgy Riza0V0 @ Soin, ¥,=0.1V, Vp=E-Vy=8-0.V = 737, Vy, 130 R222 © tan Pore rN gO a Ur Soln, Junction potential = Built in potential + Reverse bias Voltage V,= Vy? Ve Now for abrupt pn junction depletion width We)", W=KV,? 32mA th at a reverse bias of 1L.2V 2um = K(08+1.2)" (i) x= K(0.8+7.2)? oii) ; x_(8)” From (i) and (i) 3-3) x=4um SEMICONDUCTOR DIODESQ —_At300K, fora diode current of ImA, a certain germanium diode requires a forward bias of 0.1435V, where as a cettain silicon diode requires a forward bias of 0.718V. Under the condition, stated above, the closest approximation of the ratio of reverse saturation current in germanium dinde to that in silicon diode is @t ) S (410 (a) 8 x 108 Soin, 1 =1 for Ge, 1=2 for Si, ru) I=1,,| 6" -1 LHS. of () = (i) ( ‘™ ns Shs |e Tho.| e"* -1 ey -( 0.718 © 2x 26x10" ‘Wave Shaping Abilities of Diodes Clipper and Clampers Clippers: Clipping circuits are used to select for transmissioy ‘of abitfary wave form which lies above or below some reference level. Clippling circuitsare also referred to as voltage / current limiters, amplitude selectors or slicers ot choppers £ In Other Way: “Clippers are networks that employ diodes to “clip” away a portion of an input signal without distorting the remaining part of the applied waveform. there are two general categories of clippers. i) Series i Parallel Series Ctipper: p— DR y, Ray t «Diode is series with local in seties clipper circuit vi Vv SEMICONDUCTOR DIODESTH (V,=V) (diode changes state) Pressure” established by each an through the diode. il) Determine the applied Voltage (itansition voltage) that will result ina change of state for the diode from the “off” to the “on” state. Parallel Clipper: B £ t Vv, Vo © Diode is parallel to the load in the parallel clipper circuit: e The analysis of parallel configuration is very similar to that applied to series configurations vi ae AGE y SEMICONDUCTOR DIODESQa Note: .----transition level 7 ‘On the basis of the connection of the diode - per are again divide in these manner. Clipper | Series Parallet Positive Negative Positive Negative SEMICONDUCTOR DIODES@ Table 1, Simple Series Clipper (Ideal Diode (a) Positive 4 A 'V, Positive) (2) Positive e+ (b) Negative ste v, Rea alr". v, R v7 w 4 t SEMICONDUCTOR DIODES3. Simple Parallel Clipper (Ideal Diode): (a) Positive 4. Biased Parallel Clippers (Ideal Diode): (a) Positive Note: In all the above clipper circuit always see carefully to the connection and polarities of diode and Batteries respectively. SEMICONDUCTOR DIODES“Clipping at Two Independent Levels: Above circuit is used to convert sinnsoidal wave form into a square wave. To generate a symmetrical square wave Vj, and Vey are adjusted numerically equal but of opposite sign. Above circuit is known as slicer because the output contains a slice of input between two reference level Vp, and Vp. [Dp | Va low Va <¥,+5 For Level Clipping: = R 4+ y, vy vd Sy, SEMICONDUCTOR DIODESClamper Cireuit: ‘A clamper is @ network constructed of a diode, a resistor and a capacitor that shifts a waveform to a different to level without changing the appearance of the applied signal Addition shift can also be obtained by introducing a do supply to the! basic structure the chosen resistor and capacitor of the network must be chosen such that the time constant determined by t=RC is sufficiently large to ensure that the voltage across the capacitor does not discharge significantly during the internal the diode is nonconducting, Clamping network have a capacitor connected directly fom input to output with a resistive element in parallel with the output Clamping network have a capacitor connected directly from input to output with a restive element in parallel with the output signal The diode i ison paral with not have a series de supply as an added element. POF she uit sianal that will forward bias the diode Step2: During the period that the dade is “Ont sate, assume that the capacito wi to.a voltage level determined by the surrounding network. ‘charge up instantaneously Bow] Step3: Assume that during the period when the diode is in the “off” state the capacitor holds on to its established voltage level. v.23). > Sy cusp gts Sf le Ske a v vy FR To 4 ‘Step4: Through out the analysis, maintained a continual awareness of the location and defined polarity for V,, to ensure that the proper levels are obtained. Since V, is ia the parallel with diode and resistor, it can also be drawn in the alternative position shown in step (3). Applying KVL in input loops V~V-V,=0 (=-2V] SEMICONDUCTOR DIODESStepS: Check that the total swing of the output matches that ofthe input. (Very important to check the proper answer in optional questio:s). iv, Ve Soln, In positive half cycle -20V + Vo~ SV =0 [Fe =257 In negative half cycle, Check the total swing Input swing = 30V (V, ‘max ~ Vimin» Output swing = 30v (V;, vi) 0 max YO min’ The wave is not start with 0 because of some finite time taken in the discharging, SEMICONDUCTOR DIODESSoln. Find the output waveform of the network. 7 wok, oe Step I: Condition on V, for the diode to be ON and OFF. ‘Applying KVL: -V, - IR ~ 2 = 0, IR=-V,~2V For D ON: -V,-2V>0 = V,<-2V Step Il: For D to be ON: -V, + V,~2V V,42=-5V+2=-3V 0 20v4 Find the output waveform of the network: Step 1 : Let D, is ON, D, is OF! V,-IR + 3V = 0, IR =-V, For D, is ON; IR> 0 > -V, 43> 0 => D, is OFF; IR< 0 > | Vi23V Let D, is ON and D, is OFF; Vi- IR - SV=0 = IR=V,~5 For D, is ON; IR > 0 = V, <5V5D, is OFF = IR<0 = V<5v] SEMICONDUCTOR DIODESwovp-y -10v}- Step I: svj ay For V,<3V = V,=3V, 3 V)=5V,V,>5V > Vy=3V Q A symunetrical 5 khz square wave whose output varies between +10V and 10 is impressed open clippling circuit shown in figure. If diode has R,=0 and R, = 2m and V, = 0. What is output Soln, waveform? Step-I: V,-2.5-IR Dis ON; IR> 0, V,<2.5V When D is OFF; IR < 0 V, > 2.5V Step-ll: If D is ON, V, <2.5Y, then output will be | Vy If D is off V, > 2.5 V, V,-21-1.1-2.5V=0 Vi4+5.0 (D is OFF) Step-III: Waveform of the output V, 1oy| 10V 2syf- 25V * >t -10y| SEMICONDUCTOR DIODESSoln. Soln, Soin. eS aS Questions Regarding Diodes h ko SV ae Calculate the value of current J in the above circuit. (Assume diode is ideal) Apply KVL, 0-1K1+3=0, [T=5mA] The ut in voltage for each diode is 0,6V (Si) each diode current is 0.5mA. Find the value of R,, RyRy 45V ov Current across R, = .5 + .5'= ImA, Current across R, =.5 [Link] = 1.5 mA V, = 5-06 =44V, Vy =0- 0.6 =- 0.6V 44-(-0.6) 5 7 ts O09) _ 5 iso VOOR, = Gsx05)mA ImA Calculate the value of current I. Cut in voltage of Si=0.7V and Ge = 0.3V. Applying KVL in the given cireuit 12= 0.7403 41% 5.6K ul -1= 6K, 1= —K [ 12-1 =1% 5.6K, P= 56K [1=196mA SEMICONDUCTOR DIODESQ sizazv. Ge=03V Ve 2.0K Find value of V, in the given circuit. Soln. Both Si and Ge are in forward bias but Ge will attain cut off early. So Si will not conduct. re F03v COM v =5vSoln. Soin. & Find the value of I in the circuit given below. (where cut in voltage of diode D, and D, = 9.7). and D, = 0.7). + tho, “T OR D, isin reverse biased so open circuited and no current flow across D. Only, i conducting and allow to pass-the current equivalent circuit is or a 20V | Applying KVL 20 - 2.2 For the circuit of figure sketch the figure. The diode is ideal and R, 4 given in R-102 Do ae IV, > 0, D conducts, so that V, = 0 and y= 100_y. 1) . c 20v 5V (es Step-II: When diode is off ou 43!) lov lov} -20V4 354 a T ve Lt __.- Apply KVL: -20 ~ V, Total swing of input = to D.C. Power Supply: Www career see eee tal swing of output ; ip oles vee | Lee (tT Transfer | [Reetifier) | Filter | )regutator} Load No “i ey > SEMICONDUCTOR DIODES@ ‘Important Terms: Let us signal X;=Xpe.+Xyo eee az) Form factor (F) = “Ty (2) (rms) Ripple factor (2) = “4 @ Xp(rms) = JX p.0+ Xaciens) on (4) Favi+r (5) Or ripple factor wa Rane reVF?-1 Note: Form factor X eng) Means root Kren Seay Theorem (1) : S : If X()=X\(+ XA iy | DC values or averagi jxo = Yass toe SO Old : [Link] | X, =X XO 4+... X00 (8) Theorem (2): If X= 4sinat, X,() = 4,sino,t aes eek | = 9) Where [o #0, i Single, Phase Diode Rectifiers: Rectifier is the process of conversion of bi-directional alternating input voltage to uni-directional output voltage. In diode based rectifiers, the output voltage cannot be controlled. A rectifier may half wave type or fll wave type. SEMICONDUCTOR DIODESSingle Phase Half Wave Rectifier: ‘This is the unidirectional rectifier, v ts V.=V,sinot REV, Average value of output voltage: Ufy Vong “ifr. sinot a, RMS value of output voltage = Form factor F = [Feis7] : (12) Ripple factor (r) = VF? —1 = (577 ed = 121 = (3) Ripple frequency isthe aay ibe RECO ROBERT! CO!) Peak Inverse Voltage (PIV): PIV is the zating of diode. It is defined as the maximum reverse voltage, diode can withstand. [pn (14) Ripple Voltage: .. (15) SEMICONDUCTOR DIODESReetifier Efficiency: 1 Voy bo +s Output de, power, Py =Voyagg = 7) RMS. Output Voltage: va -* (18) and m.s. output current Jims 20) Peak Crest factor = RMS) 1a Val Tacs athe @® =2 Single Phase Full wave Mid-point Rectifier (Centre Tap): WWW .careere| [Link] D.C. of average output voltage w, Vong => (1) SEMICONDUCTOR DIODESD.C. output current Me 2 SRR OR” 2) Where, [,,= Maximum value of load current Output dic. power, Pre = Vang Lang = <2 Fn bm + 8) Vv, Ting == RMS output current Jone =F (4) Output a.c, power Vou J ~ (6) Rectifier Efficiency: B. 4 n= =o Va lax [n=81.06% Form factor (f) Fall tere Ss ~@ Ripple Voltage . v.¥ (yy Vi = Ven -Veg = | 5 (2) = 0.3077 Vm 8) . a Lp are ioe Votage ripe ctor HIMES SHA IIGEV OU. Cc ve ‘e = 0.483 0) PIV for e&ch diode = 2V,, «= (10) Peak value of source current, iG (iD Joeak Crest factor of input current = 7 » (12) SEMICONDUCTOR DIODESSingle Phase Full Wave Bridge Rectifier: a6 7 Average output vo! RMS value of source voltagé a argon [Link] Jy RMS value of squree curment 45 =F Source current waveform for both types are identical, therefore cr=y2 iv) .W) SEMICONDUCTOR DIODESA comparison of three types of I-phase diade rectifier which are given below: Parameter Half Wave Full Wave (or two Pulse) (or one Pulse) __Centre-top Bridge Bn a 2, I = ae Bh 1. DCoutput voltage Vi,» = ? A RMS value of te a *. 2. value of output 7 6 5 voltage Ving 3. Ripple voltage V, 0.3856 V,, 03077 V,, 03077 V,, 4, Voltage ripple factor (VRE) 1.211 0.482 0.482 5. Rectification efficiency (n) 40.53% { . 81.06% 6 TUF 2 PW 8 CE 9. No. of diodes 10, __ Ripple frequency Drawback of Centre-topped type Rectifiers? (i) This is costly and bulky-because secondary winding is doubled. Gi) Tapping exactly centre is not all feasible. Note: Overall bridge rectifier ijn shay centre tapperh whe rectify SEMICONDUCTOR DIODESAssignment on Diodes Circuits While analyzing cireuits with a diode, the graphical method is often used because (@) graphs give more accurate answer than solutions of equations (b) nodal or mesh analysis can not be used for the non-linear diode circuits (c) solution of circuits equations leads to multiple answer, which is unphysical (@ the non-linear diode equation makes the solution of the circuit equations very difficult, Y, is given by ’ +6 4 LH The input V, is given to the circuit shown below: “vy PS eave bor Calculate I, and ID, in the circuit shown below. Assume the diodes are ideal. wv wi | 1D, 20 *D, 52 50, P lov" (@ ID, =-0.5A; 1D, =1A (6) ID, = 0A; ID, = 1A (©) ID, =-.5A; 1D, = 24 @ID, = 0A; ID, = 24 SEMICONDUCTOR DIODESPy Vv 202 (ideal diode) ly (@ 1mA (b) -1 mA (0 @2ma ‘The width of the depletion layer is proportion to 1 1 —— wu 5 = @) Doping ©) ‘Doping © Doping © Doping ‘Which of the following option is correct for P'N diode shown below: = + i t @ W.-W FE ‘The transition capacitang js Reverse The circuit in figure is we —i— + ve R % (@) Positive clamper any paveore Negative camper (6) Positive peak clipper WW. Calf eerenddavert FE leper In the circuit below, the diode is ideal. The voltage V is given by 4. 12 id a on + . @ min (Vv, 1) (b) max (V, 1) ©minCV,\) @ mx, 1) SEMICONDUCTOR DIODEScos at) € D, C, @ costs) 1 © sin(or) © 1-cos(of) — (@) 1-sin(wr) The circuit shown in the figure is best described as a =07 4 v20: ‘ ; i=) 500 om lov 04 VV <0.7K, ‘ el The current in the circuit is @ 10m (&) [Link], (©) 6.67 ma (@) 6.2 mA Ap" n junction has a built in potential of 0.8V. The depletion layer width at a reverse bias of 1.2V is 2um, Fora reverse bias of 7.2 V, the depletion layer width will be @ 4um (b) 4.9. um ©8&um @ 12 am Ina P* n junction digdejyinier reyerserbiag; she prAgTiyLe Uf electric field is maximum at (@) the edge of the depletion region on the p-side (b) the edge of the depletion region on the n-side (© the p’h junction (@ the centre of the depletion region on the n side. In the figure, siicon diode is carrying a constant current of ImA, when the temperature of the diode is 20°C, V,, is final to be 700 mV. If the temperature rises to 40°C, V,, becomes approximately equal to SEMICONDUCTOR DIODES4 16. a. 18. 19. 20. a. 22, 23. (@ 740 mV (b) 660m (©) 680 mv (@) 700 mv Value of Ip is {V cutin for Si = 0.7V, Gi= 0.2V} SiGe gt tt 1.8 +2 , pe (a) 2.56mA () 0 ()1.25mA (A) 1.96mA For an ideal diode operating in forward bias, change in diode voltage required fora 10 times inverse diode current is (@) 83 mV (b) 59 mv (©) 60 mV (@) 62.10 mv AA p-n junction diode is operating in reverse bias region. The applied reverse bias at which the ideal reverse current reaches 80% of its reverse saturation value is (@) 41.68 mV (b) 59.6 mv (48 mv (@) 42.3 mv Reverse saturation current of silicon diode of 25°C is 20nA. The reverse satutation current at 60°C will be (@) 20% 45 04 (©) 20 « 24.25 nA The leakage currents 0 Ips (@) 247 0A a Si is preferred over Ge begdiise @) Silicon has higher P) () Silicon is cost effet (©) Silicon is found in abut x eS aa (45/8 30HA. The value of 2) @) 287 0A @ NOT. : Ina centre tapped FULL WAVE res is @) > 2vm ) Vm © <2¥m ( 2Vm PIV ofa full wave bridge: type. rectifier ‘should be at least. -: % Vn Vr @ vm (b) 2Vm oF @ = The circuit shown uses thteg identical diode having n= 1,1,= 10" A. Find the value of the current to produce V, = 2 volt [Link] (@ 381nA (b) 308 (2.8 nA (@) 6nA ‘The leakage current of a transistor are [pgp = 3HA and Igy = 0.3mA, T= 30HA. The value of Bis @ 79 (b) 81 (99 (d) NOT SEMICONDUCTOR DIODESANSWER KEY L @ 2 @ 3) 4. @) 5. © 6) 1 @ & @) 9% @ 10. @) nu @ Rn @ 13. @) 14. © 15. (b) 16. (d) 17, (b) 18. (a) 19. (b) 0. ©) 2. © 2. (@) 2B. (@) 24. (a) ww, careerendeavor com SEMICONDIICTOR DIODESCHAPTER — 3: BIPOLAR JUNCTION TRANSISTORS The bipolar junction transistor has three separately doped regions and contains two pn junctions. A singie p-n junction has two modes of operation forward bias and reverse bias. The bipolar transistor, with two P-n junction, therefore has four possible modes of operation, depending on the bias condition of each p-n junction, which is one region for the vergatility of device. With three separately doped regions, the bipolar transistor is a three terminal device. The basic transistor principk is that the voltage between the two terminals controls the current hrough the third terminal Current in the transistor is due to the flow of both electrons and holes, hence the name bipolar. The n-p-n bipolar transistor contains a thin p-region between two n-regions. In contrast the p-m-p bipolar transistor contains a thin n-region sandwiched between two p-regions. The three regions and their terminal connections are called the emitter, base and collector. ‘The operation of the device depends, on the two p-n junction being in close proximity, so the with of the base must be very narrow, normally in the range of tenths of a micromietes(10 m). E (m) | ©) Emitter-base’ | Fanction (EBS) Of the tree regions, emit than that of collector. [Ne>Ne>N, The doping of the sandwiched layer is Considerably less than that of the outer layers (typically, 10:1 or less) Emitter is provided with medium area, Base is provided with smallest area to reduce the transit time, + Collector is provided with the largest area to withstand heat dissipation. ‘Symbol: (p-mp transistor symbol) Applications circuit Reverseactivemodeor | | rp | Asanampliier with voltageand } inverted mode i current gain tobe low | BIPOLAR JUNCTION TRANSISTORSIna transistor Emitter current - drift current Base current - recombination current Collector current - diffusion current The flow of charge carriers in a transistor between base and collector is due to the diffusion of minority carriers and this action is called “transistor action”. Hence, transistor action takes place in the base region. The total current lowing into the transistor must be equal to the total current flowing out of if @pplying Kirchhoff’ current law to the transistor as if it were a single node). Hence, the emitter current is equal to the sum of the collector are and base currents. i, = 1.414] The collector current comprise two components the majority and the minority carriers. The minority carrier current is called the leakage current and i given the symbol Ip (I, current will with emitter terminal open). : he = leeway + Loomis sate zi Itis also knownas & co fr gg is independent of collector supply voltage. The collector current is less than the emitter current. There are two reasons for this. Firstly, a part of the emitter current consists of holes that do not contribute to the collector current secondly, not all the electrons injected into-the base are Sr in reaching the collector. Equation for Emitter Currgngyyy Ca [Link] Ina transistor under active region, emitter anae is ihe forward current of emitter diode. ‘The emittet current exponentially increases with base to emitter voltage of transistor. Ina transistor under active region Vy, < LV. Typical value 0.2 V, For Si transistor [7s = 0.67 fo 0.9¥ | Typical value 0.7V Vag Teduced by 2.5 mV for 1°C rise in temperature, ic e BIPOLAR JUNCTION TRANSISTORSCommon Base Configuration: + To filly describe the behaviour of a three terminal devices such as the common base amplifier, requires two set of characteristics one for the ‘driving point” or input parameters and the other for the output side, | I _ | + TE | Ve | ve od Ie - ; | (ops tansistor CB configuration) Input Characteristics: 5 4 The input set for the common-base amplifer as shown in figure relates an input current (J) to an input voltage (Vpe) for various levels of output voltage Vi: asa O02 04-06-08 1 (input or driving painting characteristic for CB silicon transistor amplifier) Output Characteristic: 1 ¢ _Itrelates I, to Vg for various levels of input current I, as shown, (mA) WWIW.C ourcom o 0 5 10 15 20 a (Output or collector characteristics for a C3 transistor amplifier) . CB transistor is basically a current controlled current source (CCCS). «The curves clearly indicate that a first approximation to the relationship between I, and I, in the active region is given by | BIPOLAR JUNCTION TRANSISTORSProperties of CB Configuration: Lowest input resistance (R, < 1002) Highest output resistance (Ry > IMQ) Lowest current gain (a. <1) Highest voltage gain Medium power gain (typical value 68) Output and input voltages are in phase i.e. phase shift is 0°. In CB amplifier current gain is loss and therefore bandwidth is large and hence CB amplifier is widely used as high frequency. Alpha (a1) Note: In the de mode the levels of I, and f, due to the majority carriers are related by a quantity called alpha and defined by the following equation. Where Logg i E For ac situations teristic curve, an ac alpha is defined by. Ale| Mey, ‘The alpha is formally éalled common base aimplification factor on-current gain of common base transistor. i A ¥ 2 ‘The transistor’s amplifying action i’s basically due to its capability of transfer its signal current from a low resistance circuit to high resistance circuit, contracting the two terms transfer and resistor results in the name transistor; ie. transfer + resistance “transistor, Common-Emitter ConigBbi, [Link] BIPOLAR JUNCTION TRANSISTORSInput Characteristics: . ‘The input characteristics are a plot of the input current ((,) versus the input voltage (Vg,) for a range of values of output voltage Vg. Be THA) 02 04 DE OS Vee Output Characteristics: + The output characteristics are a plot of the output current ([,) versus output voltage (Veg) for a range of values of input current (f,). ‘Saturation Region 15 Vee Sat ‘Cut offregion’ Lego = Bleso Properties: © Moderate input resistance (around 1k) © Ce ener a [Link] Moderate voltage gain © Highest power gain (typical value 4226) » _ Output"and'input voltages are out of phase shift = 180°. © Itismost common and frequency used amplifier. Beta (f): L [ale 7 inde moda = (B > 1) For a “a, a] |,. 8] a= 1 teal [148] Range of B is 30 to 300. in terms of o, is f BIPOLAR JUNCTION TRANSISTORSiS * i iscalled the current gain of transistor in CE mode. It is the most important specification of the transistor, +B isalso denoted by f,, and always. Bu >B,.| or Pre> he] [lo=Bls Ip=Ietly=Blatl, [le=8+D4] ‘Common Collector Configuration (C-C): ze is taken across the emitter Properties: : © Highest input resistance’ (S0k© to 500 ka) «© Lowest output resistance (<100) «Highest curent gain © Lowest voltage gain (close to unity and ideally one) © Output and input voltages are in phase i.e. phase shittis 0® e Emitter follower is basically a current controlled voltage source (CCVS). Applications: [Link] ° As an audio frequency power amplifier . As a buffer (impedance matching device between high resistance to low resistance) . In designing of voltage sweep circuits. . As an high input resistance devices. © Asa“Boot strap emitter follower”. Gamma (1): 148 yotep=L la Saturation region, = Active region, = Cut-off'region BIPOLAR SUNCTION TRANSISTORS—————Y Note: Jepo! Saturation Regior Minimum [,, required to keep the transistor under saturation region. lc de ona | oF fame Gy 1, Conditions for saturation region: [Vor $0.27) (Ce ee Where ,ifR, = 0 Tom = Rot +R, Cut-off Region: Condition for cut-off region is Active Region: Conditions for transistor Tena OF To Vepjgay = 0-2V for 8 =), =0.2V for © Blecne) ‘Theory says under satura Teopa, under the saturation region ic. Itis the leakage current passing from collétor to base with emitter Ef etoted is abo caled emitter cut-off current of the transistor, At low frequencies [cso At high frequencies [Tceo = Ico + Surface Current) . Where surface current is due to skin effect. Skin effect appears only at high frequencies. Surface current is independent of temperature and depends upon only applied voltage. It increases with frequency. BIPOLAR JUNCTION TRANSISTORSle = leeo As [f= Bl, ++ Bylo Since base is open circuited, s0 I, = 0; = leap = (+ B) leo : oso = 1+ BY Igo = 222 fi88 injascending order then In saturation region; J. So P, is minimum In active region; |, ~ medium, Vix = medium So, maximum power consumed by the transistor when it is biased under active region, Diode Equipment Circuit of A Transistor: lca Voce = Venn (9) PNP transistor © A transistor is represented as two diodes connected back to back, © When two diodes are connected as shown in the figure. It can not replace the BIT practically because ‘There is no crystalline continuity in between the two diodes. ‘The base width will became very large and therefore transit time will be large and hence no charge carriers will be reaching the collector. BIPOLAR JUNCTION TRANSISTORSEarly Effect: = Asthe voltage applied across the CB junction increases, the transition region penetrates deeper into the collector and base. Since doping in the base is ordinarily substantially smaller than that of collector, the penetration of the transition region into the base is much larger than into the collector. As aresult the electrical base width of the transistor is reduced in comparison to metallurgical base width. This ‘modulation of the effective base width by the collector voltage is known as the early effect after JM. arly, who first interpreted it Merial base with a we Ps a + Thedecrease in base wid consequences. «Theirs less chance for ipcreases with increasing Weg | « — Theconcentration gradient of minor e ; since the hole current injected across the emitter mal li r sts at emitter junction, then A, « _ Forextremely large voltages, base width may be reduced to zero causing voltage breakdown in the transistor. This phenomenon is known as punch through or reach through Quiescent Point: ange = Itis a point on de load line, which represent the value of |, and Vc, that exist ina transistor circuit ‘when no input signal is applied. Ven Itis also known as the DC operating point on working point. The best position of this point is midway 1 between cut-off and saturation point where [fe = 2¥ec| life point D. ‘Transistor Biasing: . The proper flow of zero signal coliector current and the maintenance of proper Vo, during the passage of signal is known as transistor biasing BIPOLAR JUNCTION TRANSISTORSFor faithful amplification, a transistor amplifier must satisfy three basic condition Proper zero signal collector current. Proper Vig at any instant. «Proper Veg at any instant. Stabitization: « Theprovess of making operating paint independent of temperature changes or variations in transistor parameter is known as stablization. Need for Stablization: + Temperature dependence of f, «Individual variations + Thermal runway Stability Factor + Therate of change of collector curent I, [Link] the collector leakage currett [og at constant B and I, is called stability factor. Differentiating ooh fees i par di, poe ie di, digg tle ey flee a, Oe I= Procedure to derive stability factor $ by any given circuit: «Apply KVL to the input mesh of the given circuit. © Put emitter current 1, =1+ fy aad simplify the equation Differentiate the above equation Watt. I, and keeping Vy, and Pas constant, + Find oe from the above equation and substitute in general equation of S Ie Pier i s a 1-p= 44 [Emaet?ic] Method of Transistor Biasing: © Base resistor method (fixed bias), S= B +1 © Biasing with feedback resistor, $< +1 + Voltage divided bias: S10 BIPOLAR JUNCTION TRANSISTORSNote: i Fixed Biasing: Potential Divider or Self Biasing: The stability factor indica ‘echne current loo: Tnorder to achieve greater thera: stability. Itis desirable to have as low Sebilty factor as possible. Steps for determining Q-Point: Assume BIT is in active, Vig, = Apply KVL in base emitter loop. Determining the Io Igtie) * Bla L Ve Vee(sat) Coan” RR, [Link] TE eeainey ~ Hoyas ‘Then BIT is in active mode otherwise BIT is in saturation mode. [Properties CE Bo Tce _| 5 cB CC Voltage gain High High mI Current gain High |__»b0.98 | ‘High Phase shift 180° | °. ° Input Impedance (Zi) | “Medium Lowest__| Highest Olp Impedance (Z,) Medium Highest Lowest | Application | Besse oF High Power gan | Usedas constant | Impedance “ used as an amplifier current source | matching BIPOLAR JUNCTION TRANSISTORSSoln. Soin, gS Solved Example on BJT Cheek this transistor is in saturation of not, (Vg sa = 0-8V, Vg, uy = 0-2V). Apply KVL in BE loop 5 ~50ly- Vise = 0, 5 ~ 50g, - 0.8 = 0 a oer 7 t= Sox Yan 84ud) In CE loop, 10 = is4x10%m4 >> ma 50x3 Given, Vpgy active = 0.7, Vag sg, 0.8, Veg at = Ifthe transfer isin active mode, then what is the value of I, V,? Apply KVL in BE loop Von = IpRy + Vp, active + (Ig +1) Rp or 5 = Tl, + 0.7 + 0.5 (Ip * I) 43=75 |p +05 Ty 43=75 |y + 0.5 * 100g 43=5751, 43 = gpg 7 OOTATMA = 74d = Je = Bly =100%0.747=7.47mA =, Apply KVL in CE loop Voo=!Re* Vor + Up + IRE BIPOLAR JUNCTION TRANSISTORSSoin. a 'V,, means potential of collector point warto ground [Mo=VorVes if Re=0 [ooh te ifR, #0 Vee = TeRe + Ver + Ue + Ip)Ry, (VY, or V,) => Vo = Veo TRe = 10-3 * 7.47 mA = 10 ~ 22.41 =-12.41 volt Negative sign indicates that transistor is not in active mode. Calculate value of V, Vos =2V Vy =-5 40.3% 5= => 50.5 1, + 0.51, py KVL in CE loop -1R, Vee - 0.5 Oy ei) Seon = 48 Solving equation (1) and (3), we get Ig = 0.015 mA; Ip = 0.87-mA We have I, = I, = 0.015mA oo Jo _ 087 Also Ina = = Tog = 0.0087mA “17, [Link] Therefore transfer i in leew ca Now, Vy +5 =1Re = Vp 20.87 X55 = 435 — $= -0.65 volt The BIT amplifier of figure below has Hy, = 100 Vg = 0.7V, Igy = 0. Calculate the values of R, and R,, such that its I, = ImA and Veg Hee" SV FR. R, 10K 0.3K. BIPOLAR JUNCTION TRANSISTORSSoln, Thevenin equivalent of base ground terminal Soln. =r Re ®) Ree 5 Y, 10R, RR, 5 g-e_p, = iQ Yous” Ra10" RrR M4 Roe TOrR RAR Let us consider BIT is in active region by applying KVL around the base-emitter loop, then we get, V, Ip Ry — Vop— (ly + 1,)03 = 0. . 50 10R, - 0.7 =1,(101)x03 R+10 * (ee melo SAQDNOS The 50 (Rx10 R+10 (10+R,) 4 500-R, = [or fio suo +19 300 - R, = 10R, + 100 LR, = 400 [R, | Applying KVL in collector emitter loop 5 =IRo~ Veg - (lp + 1903 = 0 5~2,5-0.303 R= 2.19870] Step-I: Assuming BJT is in active mode Vj. = 0.7V, for Si. Step-Il: Applying KVL in base emitter loop 5 — 1, * 100 x 10- Vy, = 0, 1, = 43 * 10° Step-IIl: | =6h, "43 * 105 x 100 = 4.3mA. 1c (active) BIPOLAR JUNCTION TRANSISTORS, neeSoln, Step-IV: Applying KVL in collector emitter 1o0P f0F le sauptan Voo= 2 * 10 Te= Veg. ‘ce = 0.2N, this isthe typically value in saturation . 5-0.2=2% 10 I, 1 =24 mA Le (saturation) Step-V! Te (ace) > Me (saraton) BIT is in saturation region PIM [earn 24 4, Vex p= O.2V1 Find out Q-point? 4 Wee=5V Ro= 1k 330k. — 5V Is Step-I: Assume BIT is Step-II: Apply KVL in bs 5-330 x 10° I, 43 = 330 * 10° Ty + 1 £10) Gd, Hg) 43 = I, (330 * 105 + 100.104) 1,=10nA Step-IIE: 1, Step-IV: Apply KVL in collector eriitter loop for I, 5 = 1g * 10° — Veg ayy Hy X 10" 0 5~0.2=1,% 10 + (I, + Ig) x 10° 4.8 = 1, (2 * 10°) Hota = 24 mA WwWy StEP-V = Io(scive) ~ Fessturaton) BIT is in active mode Step-VIE Mog." Vec~ Te Re + R,) = 50.99 « 10% (2 x 103) 5 — 1.98 = 3.02 Qepoint = gene) = 0-99MA, V, cectivo) = 3.02) CE (ctive) Find the collector mode for Si, (Uc = Bla) Uc = 9944) = Bly = 99 * 10 * 10° = 0.99mA \c(satuation) voltage V, if B = 100. BIPOLAR JUNCTION TRANSISTORSAssuming the transistor in active mode, KVL for the base circuit gives 27-07 Ty= Fog = O.02MA, 1, = Bl, = 2mA Vo-10, Ve KCL at the collector node yields “5+ nies Combining the last two equations, and solving for V.. yields [7~ = 37] 10V 10 +93 Ip, +075 Since fy, = Oly = op Hence Vo, = (10.7) Igy = Ip = 10.7 - 10 Ve positive indicates that Q, is in active region, Now, KVL for the base circuit of Q, yields Voy + Vag + (Vlg 10=0 0.7 + 0.74 (10) Igy — =O I= IMA = Ig =], Voq= 10 ~ (1k) (mA) VaQq= 9V So that V, Site Vogs =9-4 i ‘cnr is positive, Q, is in the active region. Therefore J, is ImA. + sy BR Rob fe Sik Te Determine the value of R, needed if V, = 2V. Use = 50 for the transistor. BIPOLAR JUNCTION TRANSISTORSa Soln, Writing a KVL in the collector base loop yields 8 + Rolly + I) +R, 1g +0.7=0 1, * Bly (the transistor is in active mode because Veg = V_ = 2V) i 43 IY SIRC+R, 5 fae 51(Re +1) Now, Vo =5—Re (Ie +I) = 5 -(R,)51 Ty [a= 2V, 43 Peo Re Ra 3kQ) Find stability factor 5" ofthe givenséh Sola. Apply KVL in (C-B) lop: -5 +R.G, +1.) +R, Ig +07 =0 1, = 1/B (assuming active mode) 438 AaB 4.38 lo~ RU+B)+R, 2.30+B)+51 5334238 ‘The silicon transistor have B = 100 Find V, if () V, = SV Gi V,= 0V BIPOLAR JUNCTION TRANSISTORSSoin, (a) The circuits called a differential amplifier. Let us assume Q, to be offand Q, in the active mode, based on the voltage given Tey = IMA, Loy =P / (+B) =0.99nd and Vig, = 12 ~ (Sk) (0.99nA) ~ 5 = 2.05V Since Veg, is positive, Q, is in active mode. Assuming V.., which means that Vp, ~ 2.5 - 4.3 = -1.8V Since Viye, is negative, our assumption of Q, being off is confirmed, As no curtent flows through Q, =0.7V, V,=5-0.7=43V, (b) Let us assume Q, to be off and Q, in active mode Jeg 7 IMA, Teg = 0.990. Vong = 12 ~ (Sk) (0.99nA) ~ 2.5 = 4.55 V ‘which confirmed that Q, is in active mode. cn 18V [Link] BIPOLAR JUNCTION TRANSISTORSAssignment on BJT The common emitter forward current gain of the transistor shown is B, = 100, lea +10V 1k. 270kQ; ko. lov’ ‘The transistor is operated in : (2) Saturation region (6) Cutoff region a (0) Reverse active region (@ Forward active region 2. Consider the circuit showin igure. the fof the transistorasAband rs is 20nA and the input voltage is +5V, the transis juld be operated in a (@) Saturation region (0) Cut offregion. (©) Active region (@ Break down region 3. The common emitter amplifier’ shown in the figure is biased using’a'InA ideal current source. The approximate base current value. WWW avOUrCcOm . R= ko . -+——V._, B=100 bk 8 ima (a) Opa (b) 10pA (© 100pA @ 1000pA. BIPOLAR JUNCTION TRANSISTORSGq Transistor circuit shown uses a silicon transistor with Vig = 0.7, Ip = Ip and a dc current gain of 100. The value of V, is 10K sox ve Lo0kn| @ 465 () 5V © 63V @ 7.239 Calculate the stablization factor for the below circuit. (b) 84 ©4@ > @NOT Ifthe transistor shown befow is operating at saturation region, then the base current will be (@) 48 +10V ww @ 1, = 2004 20mA —() I, > 20mA 50K 10k @ ov ) Vv (@-08V @ -02v BIPOLAR JUNCTION TRANSISTORS10. uw 2 B. Calculate the current gain () in the circuit given below (Give Vi, =1¥). 20 SO { 2mA 10K Lv 45K (a) 20 (145 (49 @ 30 Input and output resistance respectively are fow for which of the following amplifier (a) Common base and common collector (b) Common collector and common base (©) Common base and common emitter (@ Common emitter and common collector Find base voltage V, with respect to ground given (I, = 1.8mA, Vig =—10¥, Ve, = 10V) (@ 101v (b) 827 19: 2 @) NOT, ‘The DC current gain (B) of a BJT is 50, assuiing that the base transport factor is ee (2) 0.980 (6) 0.985 ~ ©0990 (@) 0.995 For the BJT circuit shown, assume that the of the transistor is very large and Vy, = 0.7. The mode of operation of the BIT is ee ter injection efficiency is 0.995, the 19k. aVOUr, @ Cutoff (6) Saturation (©) Nomalactive _(d) Reverse active ‘The circuit using a BIT with | = 50 and V,,~ 0.7V is shown in the figure, The base current I, and collector voltage V,, are respectively (@) 3uA and 114 V (b) 402A and 16 volts (©) 4524 and 11V (@) SOBA and 10V BIPOLAR JUNCTION TRANSISTORS