2017 7th IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2017), 24–26 November 2017,

Penang, Malaysia

Design of FPGA Based AFM Controller for

Undergraduate Study
Wei Jie Cheah, Siu Hong Loh
Faculty of Engineering and Green Technology
Universiti Tunku Abdul Rahman
Kampar, Malaysia
weijie92@[Link], lohsh@[Link]

Abstract—The main features of an atomic force microscopy of college laboratories [10]. By using common electronic
(AFM) that determines the performance of the system includes components, the optical beam deflection (OBD) system is
the accuracy or precision in the surface image generated as well developed and tested [11], and later on implemented as the
as the time required in which a scan can be completed. In this method to detect cantilever deflection in the AFM setup, with
study, a Field Programmable Gate Array (FPGA) is implemented
an NI ELVIS board as the controller for the control and
in the developed low-cost AFM system in order to improve the
scanning speed of the AFM system. In the paper, the effects of feedback mechanism. Albeit utilizing cost effective
using an FPGA for the control and feedback mechanism in an components found in college laboratories, the developed AFM
AFM system is reported by performing a comparison on the system with the OBD system used as the cantilever deflection
quality of the topographic image and speed of an AFM scan detection method is capable of imaging samples at the
where the presence of the FPGA is the manipulating variable. submicron level, with the system running in constant-force
mode. Performing one complete scan with this AFM system
Index Terms—FPGA, OBD, AFM. requires approximately 18 minutes.
In this paper, an FPGA is implemented and used as the
I. INTRODUCTION controller in the developed AFM system in [10] to shorten the
The history of AFM started in 1986, where Binning, Quate time required for the system to perform a scan on the sample.
and Gerber invented the first atomic force microscope in order The imaging results from two AFM setups are compared. The
to carry out studies on surface of samples at the nanometer first setup uses NI ELVIS board as the controller while the
level [1]. Since the discovery of the AFM, nanotechnology second setup uses FPGA board as the controller.
slowly moved into the limelight. To be able to accommodate The organization of the paper is as follows: Section 2
different research areas and samples, various types of AFMs discusses the differences in the setups between the AFM
including customized AFM to cater for specific studies are system with FPGA as the controller and the AFM system with
developed in the past 30 years. Some examples include AFMs NI ELVIS as the controller. The design of the control and
that are able to perform scans under liquid environment [2][3], feedback mechanism for both systems is included in Section 3.
making it possible to conduct scans on a solid-liquid interface; In Section 4, topographic images obtained from AFM systems,
specialized AFMs capable of measuring elasticity [4], friction both with and without the FPGA, are presented and compared.
[5], and hardness [6] of the sample at the surface level. The paper ends with a conclusion in Section 5.
Despite the advancement in technology and the focus being
II. IMPLEMENTING FPGA IN AFM SYSTEM
put into nanoscience and technology, AFMs that are readily
available in the market is very expensive, and may cost up to An FPGA is a silicon chip or integrated circuit that can be
100,000 USD. The costly price tag on commercial AFMs reprogrammed to performed different tasks. As the name
refrains many educational institutions from purchasing this implies, the FPGA is made up of an array of programmable
piece of nanotechnology equipment. To counter to this logic blocks, where intricate combinational functions can be
problem, many researchers have been working on LEGO® carried out by the FPGA by configuring and reconfiguring
AFM [7], which is a conceptual AFM constructed using these logic blocks, making it capable of achieving custom
LEGO® bricks; macroscopic model AFM [8] made up of large hardware functionality without manually connecting and
wooden blocks; as well as low-cost AFMs [9] implementing soldering of electronic components. The similarities between
off the shelf parts to be use as teaching equipment in secondary an FPGA and Application Specific Integrated Circuits
schools or in colleges, to allow exposure of nanotechnology to (ASICs) are high where hardware description language (HDL)
students in the secondary and tertiary education level. is used in wiring the circuits, however, FPGAs have been
In another study, a low-cost AFM system developed as gaining popularity over ASICs as well as processes used in
teaching equipment in an undergraduate engineering laboratory applications that require control and signal processing due to
is built using existing components that are available in majority various advantages displayed by the FPGAs. Some of the

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 2017 7th IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2017), 24–26 November 2017, Penang, Malaysia

advantages of adopting the FPGA include its performance.

Being capable of hardware parallelism, the processing speed
of the FPGA is much faster than that of digital signal
processors (DSP). Apart from that, FPGAs are also more
reliable than other processor-based systems. This is because in
in the latter systems, resources are shared among multiple
processes and also having numerous levels of abstraction in
the scheduling of task. On the contrary, FPGAs which does
not operate on an operating system, uses parallel execution
and deterministic hardware devoted to each process. A picture
of the board level FPGA implemented in the AFM system is
shown in Figure 1.

Fig 2: Block diagram showing the connections between modules of AFM

system using FPGA as the controller.

III. CONTROL AND FEEDBACK MECHANISM OF THE AFM

SYSTEM
This section discusses the coding for the control and
feedback mechanism of the AFM systems. The replacement of
the NI ELVIS with an FPGA board in the AFM system
requires a new code to be developed. Using the similar idea
and concept as in [10], another set of code is developed for the
Fig 1: Board-level FPGA by National Instruments adopted in the design. control and feedback mechanism with an FPGA board as the
controller.
In order to reduce the scanning time of the AFM system
proposed by Loh and Cheah [10], an FPGA is implemented in A. Control System of AFM Setup using NI ELVIS
the design. In the original design, a National Instruments In the previous design of the AFM system by Loh et al.
Educational Laboratory Virtual Instrumentation Suite (NI [10], one input channel is used to take in the deflection signals
ELVIS) is used as the controller for the control and feedback produced by the difference in light intensity on the position-
mechanism of the AFM system. In this study, instead of using sensitive photodetector. The input signal is then sent to be
the NI ELVIS, an FPGA board is used in the place of the NI processed, resulting in three output signals to the piezoelectric
ELVIS as the controller. In other words, an FPGA is controller as shown in Figure 2, which determines the
introduced to the AFM system which takes cares of the movement of the piezoelectric stage in the X, Y and Z direction
processing of deflection signals acquired from the electronic respectively.
modules as well as the output signals used in the control of the Once the input and output channels are initialized, a pair of
piezoelectric stage for maintaining a constant force between the two-dimension array for the recording of height values
cantilever tip and the sample during scans. The control corresponding to the X and Y coordinates, are created. The size
algorithm is realized in the Xilinx Spartan-6 LX45 chip on the of the array as well as the distant between the points (step size)
NI sbRIO-9636 board. This board has a 400 MHz processor in each axis are calculated from data values such as the number
and comes with 512 MB of non-volatile storage and 256 MB of of scan points (number of pixels scanned in the X-direction),
DRAM which is used in deterministic control and analysis. number of scan lines (number of pixels scanned in the Y-
Figure 2 shows the block diagram of the connections between direction) as well as the area to be scanned, where the user will
the AFM and the control systems, where the input signal from be required to key in the mentioned parameters before
the electronic modules proposed in [11] enters the controller to performing a scan.
be processed. The controller then sends three output signals to These arrays are then fed into a nested for-loop with the
the piezo-electric controller, which in turn controls the scanning parameters for the X-axis located in the inner loop,
movement of the piezo stage. Traditionally, FPGA-based whereas the scanning parameters in the Y-direction are placed
system requires the use of hardware description languages in the outer loop. Each number of iterations in the for-loops is
(HDL). However, we can use graphical programming approach determined by the number of pixels to be scanned in their
with NI FPGA board. Using LabVIEW coding, this greatly respective directions. By doing so, when a scanned is carried
simplifies the task of producing control algorithm for the AFM out with the AFM system, the image will be scanned from the
controller. left to right (trace scan) in the X-axis, before returning to the
initial point (retrace scan) at the same line. At each pixel, the
height value, which is calculated based on the movement of the

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 2017 7th IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2017), 24–26 November 2017, Penang, Malaysia

Z-piezo, is recorded in the arrays as mentioned earlier. Once a having a parallel loop running alongside the scanning
trace and retrace scan is carried out, the scan proceeds to the algorithm, the feedback mechanism is incorporated in the
next line where the process repeats again, and this continues nested for-loops together with the scanning algorithm. In the
until the last line is scanned. case of the NI ELVIS board, the processing speed is not
Running in parallel with the scanning algorithm, which are sufficient to cater for the control algorithm as well as the PID
the nested for-loops, the code for the feedback mechanism uses controller, and since it is imperative that the PID controller to
the PID controller in order to maintain a constant force be running in real time in order to maintain a constant force
between the cantilever tip and the sample surface. As the between the cantilever and the sample surface, the processing
cantilever tip moves across the sample, the terrain of the load is shared with the computer, allowing the NI ELVIS to
sample surface will result in the bending of the cantilever, thus focus on the control algorithm whereas the computer being
generating a deflection signal. This deflection signal, which is responsible for the PID controller in the feedback mechanism.
the process variable, is compared with a set-point defined by The downside is that when splitting the job between the NI
the user. With the appropriate proportional, integral, and ELVIS and the computer, the operating frequencies for both
derivative values, the controller will send a signal to the Z- machines might not be in sync, especially when there are
piezo such that the cantilever is able to mirror the terrain of the multiple programs running in the computer.
sample surface. The movement of the piezo is the manipulated Unlike the NI ELVIS, the FPGA board is capable of
variable. In the LabVIEW code, the values of PID controller handling the control algorithm as well as the PID controller
gains are chosen arbitrary initially and are fine-tuned in the used in the feedback mechanism, without having to rely on the
later stage. To allow sufficient time for the PID controller to computer’s processor. By using the FPGA as the controller,
settle down before recording the height of the sample at a the PID controller can be placed in the nested for-loops,
particular point, a delay is implemented in the scanning eliminating the need for a parallel loop specially designed for
algorithm. Figure 3 shows the concept used in the design of the the PID controller. Figure 4 shows the concept behind the
control and feedback mechanism with the NI ELVIS board as design of the codes for the AFM system using FPGA board in
the controller. place of the NI ELVIS.

IV. RESULTS AND DISCUSSION

With the newly developed codes, scans are carried out with
the FPGA incorporated AFM system. The same sample, which
is a single strand of hair, as used previously in the design
where the NI ELVIS board is the controller for the system is
re-used in this experiment to allow the comparison between
the results of the scans obtained using different setups.
With the AFM running in contact mode in both setups,
topographic images of trace scans and retrace scans of the
sample surface image are collected. The dimension of the scan
size is 20 μm × 20 μm, with all of the images having 150 scan
lines as well as 150 scan points (150 × 150 pixels). Figure 5
shows the images obtained from a surface scan using the AFM
system with the NI ELVIS as the controller.
Fig 3: Schematic of the simplified design of the program for the control and In the case of the NI ELVIS controller, the amount of time
feedback mechanism of the AFM system with NI ELVIS board as the required to complete each set of data, which covers the trace
controller, with the nested for-loops on the top handling the scanning algorithm
and the feedback loop at the bottom running in parallel with the scanning scan as well as the retrace scan of the samples, is
algorithm. approximately 18 minutes. Although the scanning time can be
reduced by decreasing the feedback delay of the system, the
B. Control System of AFM setup using FPGA
outcome of the scans will be compromised as the system will
A similar concept mentioned in the previous section is not react fast enough, causing the cantilever to not be able to
applied in the design of software for the AFM system where map the terrain of the sample surface as it moves across the
an FPGA is used in the place of the NI ELVIS board as the sample.
controller for the control and feedback mechanism of the By replacing the NI ELVIS board with an FPGA board, the
system. After initializing the input channel and the three new AFM system takes only approximately a quarter of the
output channels, the same input parameters for the scan total time required of the NI ELVIS controlled AFM system.
acquired from the user are used to create the array for the A mere 5 minutes is required for the FPGA controlled AFM
scanning voltages in the X and Y axis. Again, the scanning system to produce a trace and retrace scan on the sample with
algorithm is implemented through nested for-loops to cater for the same pixel density and scan size as in the results displayed
the scan lines and scan points. in Figure 6.
There are some slight changes however, on the design on
the codes for the AFM with FPGA as the controller. Instead of

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 2017 7th IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2017), 24–26 November 2017, Penang, Malaysia

Fig 4: Schematic of the simplified design of the program for the control and feedback mechanism of the AFM system with the FPGA board as the controller.

Fig 5: Surface images of sample obtained using AFM system with NI Fig 6: Surface images of sample obtained using AFM system with FPGA
ELVIS as the controller. (a) Trace image of sample with dimensions of 20 as the controller. (a) Trace image of sample with dimensions of 20 μm × 20
μm × 20 μm; (b) Retrace image of sample with dimensions of 20 μm × 20 μm; (b) Retrace image of sample with dimensions of 20 μm × 20 μm; (c)
μm; (c) 3D surface plot of (a); (d) 3D surface plot of (b). 3D surface plot of (a); (d) 3D surface plot of (b).

By using the same sample, the images obtained with the

V. CONCLUSION
improved AFM system are displayed in Figure 6. Results
showed that the AFM system using an FPGA board is An optical beam deflection based AFM were proposed
capable of generating images with quality comparable to [10] and the developed prototype is capable of generating
those obtained with the AFM setup with NI ELVIS board, surface images of samples at the submicron level. The time
but at a much faster rate. The other advantage of the required for each scan to be completed however, has a lot of
improved AFM system is that the cost to build an FPGA space for improvement. Since the scanning speed of an
controlled AFM system is lower due to the lower cost of the AFM system is heavily affected by the processing power of
FPGA board as compared to the NI ELVIS board. the type of controller used in the system, an FPGA board is
used in place of the NI ELVIS board in this study such that
the effects of the type of controller used on different aspects
can be studied by comparing imaging results obtained from

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 2017 7th IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2017), 24–26 November 2017, Penang, Malaysia

each AFM system. The results showed that the improved [5] M. Reinstädtler et al., “On the Nanoscale Measurement of
version is able to produce images of comparable precision at Friction using Atomic Force Microscope Cantilever Torsional
a much faster rate and at a lower cost. Resonances,” Applied Physics Letters, vol. 82, no. 16, 2003,
pp. 2604-2606.
ACKNOWLEDGEMENT [6] B. Bhushan and V.N. Koinkar, “Nanoindentation Hardness
Measurements using Atomic Force Microscopy,” Applied
The authors are thankful for the financial support from
Physics Letters, vol. 64, no. 13, 1994, pp. 5741-5746.
UTAR Research Fund [Grant Number:
IPSR/RMC/UTARRF/2014-C2/L13]. [7] T.H. Hsieh, Y.C. Tsai, C.J. Kao, Y.M. Chang, and Y.W. Lu,
“A Conceptual Atomic Force Microscope using LEGO for
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