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CISC vs RISC: Instruction Set Comparison

Cisc Vs Risk differences

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41 views9 pages

CISC vs RISC: Instruction Set Comparison

Cisc Vs Risk differences

Uploaded by

boonvalour4
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd

CISC vs RISC

• Consider i486 instruction set format shown in


fig 1.
• It can be noted that each time an instruction is
fetched the various sub-sections of the format
need to be decoded for effective execution of
that instruction
• The fields are similar to those of i86 but
complicated since other fields are added like ss,
index, base, sreg2, sreg3, mn
Drawbacks
Drawbacks
Of
CISC
Complex, irregular, and suffers from the legacy of some
bad irreversible design decisions made in the past.

Lack of orthogonality is disturbing

Variable length instructions: 1 to 17 bytes. It makes the


control unit complicated.
RISC
•Compared to the long, complex, and many
addressing modes of CISC formats, RISC processors
have very simple and short instructions.
•RISC instructions are fixed in length (usually 32 bit)
and have simple formats and stored in memory
aligned in a double word boundary
•The formats are simply decoded and hence
shortening the overall instruction cycle.
•Any operation simple or complex can be
synthesized using these simple instructions.
Microprocessors without Interlocked Pipelined Stages

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