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HUAWEI
Switch KPI
=100* sum(succ_page)/sum(attempt_p
=100-(CM30) * 100/
(K3003)
=100-100*(CM33)/K3013A+((CH323+CH343)-(CH313+CH333)))
=100*(CH313+CH333+CH303)/(CH311+CH331+CH301)
=100-100*(K3001)/(K3000)
=100-100*(CA312/CA310)
RX Quality DL (0-5)
=100*
((SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS412E+NC
S412F+NCS414A+NCS414B+NCS414C+NCS414D+NCS414E+N
CS414F))/SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS
412E+NCS412F+NCS412G+NCS412H+NCS414A+NCS414B+NC
S414C+NCS414D+NCS414E+NCS414F+NCS414G+NCS414H))
RA301G: CELL_RANDOM_ACCESS_SUCC_RATE
=Period_Duration*Traffic/Call_Dro
=((SUM(L9302)*22+SUM(L9303)*28+SUM(L9304)*37+SUM(L9305
)*44+SUM(L9306)*56+SUM(L9307)*74+SUM(L9308)*56+SUM(L93
09)*68+SUM(L9310)*74)*8)/(1024*SUM(L9336))
=((SUM(L9102)*23+SUM(L9103)*34+SUM(L9104)*40+SUM(L9105
)*54)*8)/(1024*SUM(L9121))
=(A9102+A9002+A9302+A9202)*100/(A9101+A9001+A9301+
A9201)
=100*((S9319*1+S9320*2+S9321*3+S9322*4+S9323*1+S9324*2+
S9325*3+S9326*1+S9327*2+S9328*1))
/(S9319*4+S9320*4+S9321*4+S9322*4+S9323*3+S9324*3
+S9325*3+S9326*2+S9327*2+S9328)
ALU
ZTE
=100-{([MC138+MC137] / [MC01 +
MC02])*100}
100-{(C11605/C10114)*100}
=100100*((MC736+MC14C+MC739+MC921C)/(MC7
18+(MC652+MC642)-(MC656+MC646)))
=100-((C11622+C11623)/(C11614-C11669)*100)
=(MC656+MC646+MC662)/(MC660+MC650+M
C871)*100
=(C10903+C10910+C10982)/(C10902+C10909+C1
0981)*100
Pending
=100-{(C11604)/(C11603)*100}
'=(C10321+C10421)/(C10320+C10420)*100
=((C116122+C116123+C116124+C116125+C11612
6+C116127)/(C116122+C116123+C116124+C1161
25+C116126+C116127+C116128+C116129))*100
=(C11626/C11625)*100
=Period_Duration*Traffic/Call_Drop
Pending
Pending
((C70043+C70057+C70071+C70042+C70055+C700
69)/(C70041+C70040))*100
Pending
Revised Bench
KPIs
Network Level RADIO KPIs
SDCCH Completion Rate (NBH)
Minimum Target
City Cells
Non City
Cells
Maximum Target
City Cells
Non City
Cells
98.50
100.00
98.00
100.00
6.50
5.00
97.00
100.00
4.00
99.00
100.00
4.50
98.00
100.00
4.50
2.00
Weightage
0.00
3.00
97.00
100.00
99.95
99.50
100.00
95.00
90.00
100.00
95.00
90.00
100.00
8.00
7.00
95.00
90.00
100.00
3.00
95.00
90.00
100.00
5.50
95.00
4.00
5.00
90.00
100.00
5.00
95.00
100.00
90.00
3.00
95.00
90.00
100.00
95.00
90.00
100.00
98.00
3.00
3.00
100.00
6.00
92.00
100.00
99.99
100.00
40.00
20.00
90.00
45.00
100
4.00
4.00
4.00
54
27.00
36
93.00
100.00
2.00
2.00
2.00
95.00
DL Multislot Assignment Success (DBH)
Total
100.00
2.00
100.00
(Actual-Minimum/MaximumMinimum)*Weightage
Min(Weightage, ((ActualMinimum/MaximumMinimum)*Weightage))
NQI Formula
100-ZTR304A: CELL_RATE_TCH_CALL_DROP_EXCLUDE_HO
100 -(K3001:CELL_KPI_SD_CONGEST)*100/(K3000:CELL_KPI_SD_REQ)
=100*
((SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS412E+NCS412F+NCS414A+NCS414B+NCS414C+NCS414D+NCS414E+NCS414F
))/SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS412E+NCS412F+NCS412G+NCS412H+NCS414A+NCS414B+NCS414C+NCS414
D+NCS414E+NCS414F+NCS414G+NCS414H))
100-ZTR304A: CELL_RATE_TCH_CALL_DROP_EXCLUDE_HO
100 -(K3001:CELL_KPI_SD_CONGEST)*100/(K3000:CELL_KPI_SD_REQ)
[(K3021:CELL_KPI_TCH_CONG_SIG+K3011A:CELL_KPI_TCH_ASS_CONG_TRAF+K3011B:CELL_KPI_TCH_HO_CONGEST_TRAF)*10
0
/(K3020:CELL_KPI_TCH_REQ_SIG+K3010A:CELL_KPI_TCH_ASS_REQ_TRAF+K3010B:CELL_KPI_TCH_HO_REQ_TRAF)]
=100*
((SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS412E+NCS412F+NCS414A+NCS414B+NCS414C+NCS414D+NCS414E+NCS414F
))/SUM(NCS412A+NCS412B+NCS412C+NCS412D+NCS412E+NCS412F+NCS412G+NCS412H+NCS414A+NCS414B+NCS414C+NCS414
D+NCS414E+NCS414F+NCS414G+NCS414H))
RA301G: CELL_RANDOM_ACCESS_SUCC_RATE
ALU
([MC656+MC646]/[MC660+MC650])*100
MC718 / [ MC140a-(MC142e+MC142f)*100
([MC656+MC646]/[MC660+MC650])*100
MC718 / [ MC140a-(MC142e+MC142f)*100
( (P90a) + (P90b) + (P90c) + (P90d) + (P90e) + (P90f) + (P30a) + (P30b) + (P30c) / (P91a) +
(P91b) + (P91c) + (P91d) + (P91e) + (P91f) + (P62a) + (P62b) + (P62c) - (P438c))
MOTOROLA
ZTE
100-(RF_LOSSES_SD)*100/ (ALLOC_SDCCHCHAN_REQ_MS_FAIL_SDCCH_ROLL)
100-{(C11605/C10114)*100}
100-((RF_LOSSES_TCH_ROLL
/MA_COMPLETE_TO_MSC)*100)
100-{(C11615*100)/(C11609C11696(C11610+C11654+C11658C11697-C116101-C116133))}
(O_INTER_BSS_HO_SUC+O_INTRA_BSS_HO_S
UC+INTRA_CELL_HO_SUC)/
C11669 * 100 / (C11668 +
(O_INTER_BSS_HO_ATM+O_INTRA_BSS_HO_A
C11676)
TM+INTRA_CEL_HO_ATM_F_F+INTRA_CEL_HO
_ATM_H_H+INTRA_CEL_HO_ATM_H_F+INTRA_
CEL_HO_ATM_F_H)*100
100{(C11644/C11644+C11645)*100
((ALLOC_SDCCH_FAIL/ALLOC_SDCCH_FAIL+A
}
LLOC_SDCCH)*100)
{(C11609-C11696) (MA_COMPLETE_TO_MSC) /
(C11610+C11654+C11658(MA_REQ_FROM_MSC)*100
C11697-C116101-C116133)} *
100 / (C11609-C11696)
ALOC_TCH_FAIL/(ALLOC_TCH+
ALLOC_TCH_FAIL)*100
=100*((SUM(ber_bin0_ts0 + ber_bin0_ts1 +
ber_bin0_ts2 + ber_bin0_ts3 + ber_bin0_ts4 +
ber_bin0_ts5 + ber_bin0_ts6 + ber_bin0_ts7 +
ber_bin1_ts0 + ber_bin1_ts1 + ber_bin1_ts2 +
ber_bin1_ts3 + ber_bin1_ts4 + ber_bin1_ts5 +
ber_bin1_ts6 + ber_bin1_ts7 + ber_bin2_ts0 +
ber_bin2_ts1 + ber_bin2_ts2 + ber_bin2_ts3 +
ber_bin2_ts4 + ber_bin2_ts5 + ber_bin2_ts6 +
ber_bin2_ts7 + ber_bin3_ts0 + ber_bin3_ts1 +
ber_bin3_ts2 + ber_bin3_ts3 + ber_bin3_ts4 +
ber_bin3_ts5 + ber_bin3_ts6 + ber_bin3_ts7 +
ber_bin4_ts0 + ber_bin4_ts1 + ber_bin4_ts2 +
ber_bin4_ts3 + ber_bin4_ts4 + ber_bin4_ts5 +
ber_bin4_ts6 + ber_bin4_ts7 + ber_bin5_ts0 +
ber_bin5_ts1 + ber_bin5_ts2 + ber_bin5_ts3 +
ber_bin5_ts4 + ber_bin5_ts5 + ber_bin5_ts6 +
ber_bin5_ts7))/(SUM(ber_bin0_ts0 +
ber_bin0_ts1 + ber_bin0_ts2 + ber_bin0_ts3 +
ber_bin0_ts4 + ber_bin0_ts5 + ber_bin0_ts6 +
ber_bin0_ts7 + ber_bin1_ts0 + ber_bin1_ts1 +
ber_bin1_ts2 + ber_bin1_ts3 + ber_bin1_ts4 +
ber_bin1_ts5 + ber_bin1_ts6 + ber_bin1_ts7 +
ber_bin2_ts0 + ber_bin2_ts1 + ber_bin2_ts2 +
ber_bin2_ts3 + ber_bin2_ts4 + ber_bin2_ts5 +
ber_bin2_ts6 + ber_bin2_ts7 + ber_bin3_ts0 +
ber_bin3_ts1 + ber_bin3_ts2 + ber_bin3_ts3 +
ber_bin3_ts4 + ber_bin3_ts5 + ber_bin3_ts6 +
ber_bin3_ts7 + ber_bin4_ts0 + ber_bin4_ts1 +
ber_bin4_ts2 + ber_bin4_ts3 + ber_bin4_ts4 +
ber_bin4_ts5 + ber_bin4_ts6 + ber_bin4_ts7 +
ber_bin5_ts0 + ber_bin5_ts1 + ber_bin5_ts2 +
ber_bin5_ts3 + ber_bin5_ts4 + ber_bin5_ts5 +
ber_bin5_ts6 + ber_bin5_ts7 + ber_bin6_ts0 +
ber_bin6_ts1 + ber_bin6_ts2 + ber_bin6_ts3 +
((C116122+C116123+C116124
+C116125+C116126+C116127/(
C116122+C116123+C116124+
C116125+C116126+C116127+
C116128+C116129))*100
100-(RF_LOSSES_SD)*100/ (ALLOC_SDCCHCHAN_REQ_MS_FAIL_SDCCH_ROLL)
100-{(C11605/C10114)*100}
100-((RF_LOSSES_TCH_ROLL
/MA_COMPLETE_TO_MSC)*100)
100-{(C11615*100)/(C11609C11696(C11610+C11654+C11658C11697-C116101-C116133))}
(O_INTER_BSS_HO_SUC+O_INTRA_BSS_HO_S
UC+INTRA_CELL_HO_SUC)/
C11669 * 100 / (C11668 +
(O_INTER_BSS_HO_ATM+O_INTRA_BSS_HO_A
C11676)
TM+INTRA_CEL_HO_ATM_F_F+INTRA_CEL_HO
_ATM_H_H+INTRA_CEL_HO_ATM_H_F+INTRA_
CEL_HO_ATM_F_H)*100
100{(C11644/C11644+C11645)*100
((ALLOC_SDCCH_FAIL/ALLOC_SDCCH_FAIL+A
}
LLOC_SDCCH)*100)
{(C11609-C11696) (MA_COMPLETE_TO_MSC) /
(C11610+C11654+C11658(MA_REQ_FROM_MSC)*100
C11697-C116101-C116133)} *
100 / (C11609-C11696)
ALOC_TCH_FAIL/(ALLOC_TCH+
ALLOC_TCH_FAIL)*100
=100*((SUM(ber_bin0_ts0 + ber_bin0_ts1 +
ber_bin0_ts2 + ber_bin0_ts3 + ber_bin0_ts4 +
ber_bin0_ts5 + ber_bin0_ts6 + ber_bin0_ts7 +
ber_bin1_ts0 + ber_bin1_ts1 + ber_bin1_ts2 +
ber_bin1_ts3 + ber_bin1_ts4 + ber_bin1_ts5 +
ber_bin1_ts6 + ber_bin1_ts7 + ber_bin2_ts0 +
ber_bin2_ts1 + ber_bin2_ts2 + ber_bin2_ts3 +
ber_bin2_ts4 + ber_bin2_ts5 + ber_bin2_ts6 +
ber_bin2_ts7 + ber_bin3_ts0 + ber_bin3_ts1 +
ber_bin3_ts2 + ber_bin3_ts3 + ber_bin3_ts4 +
ber_bin3_ts5 + ber_bin3_ts6 + ber_bin3_ts7 +
ber_bin4_ts0 + ber_bin4_ts1 + ber_bin4_ts2 +
ber_bin4_ts3 + ber_bin4_ts4 + ber_bin4_ts5 +
ber_bin4_ts6 + ber_bin4_ts7 + ber_bin5_ts0 +
ber_bin5_ts1 + ber_bin5_ts2 + ber_bin5_ts3 +
ber_bin5_ts4 + ber_bin5_ts5 + ber_bin5_ts6 +
ber_bin5_ts7))/(SUM(ber_bin0_ts0 +
ber_bin0_ts1 + ber_bin0_ts2 + ber_bin0_ts3 +
ber_bin0_ts4 + ber_bin0_ts5 + ber_bin0_ts6 +
ber_bin0_ts7 + ber_bin1_ts0 + ber_bin1_ts1 +
ber_bin1_ts2 + ber_bin1_ts3 + ber_bin1_ts4 +
ber_bin1_ts5 + ber_bin1_ts6 + ber_bin1_ts7 +
ber_bin2_ts0 + ber_bin2_ts1 + ber_bin2_ts2 +
ber_bin2_ts3 + ber_bin2_ts4 + ber_bin2_ts5 +
ber_bin2_ts6 + ber_bin2_ts7 + ber_bin3_ts0 +
ber_bin3_ts1 + ber_bin3_ts2 + ber_bin3_ts3 +
ber_bin3_ts4 + ber_bin3_ts5 + ber_bin3_ts6 +
ber_bin3_ts7 + ber_bin4_ts0 + ber_bin4_ts1 +
ber_bin4_ts2 + ber_bin4_ts3 + ber_bin4_ts4 +
ber_bin4_ts5 + ber_bin4_ts6 + ber_bin4_ts7 +
ber_bin5_ts0 + ber_bin5_ts1 + ber_bin5_ts2 +
ber_bin5_ts3 + ber_bin5_ts4 + ber_bin5_ts5 +
ber_bin5_ts6 + ber_bin5_ts7 + ber_bin6_ts0 +
ber_bin6_ts1 + ber_bin6_ts2 + ber_bin6_ts3 +
-
((C116122+C116123+C116124
+C116125+C116126+C116127/(
C116122+C116123+C116124+
C116125+C116126+C116127+
C116128+C116129))*100
(C11626/C11625)*100
(dl_pdtch_seizure)*100/( tbf_dl_asgn_pacch +
imm_assgn_cse_6+ imm_assgn_cse_8)
((C70043+C70057+C70071+C7
0042+C70055+C70069)/(C7004
1+C70040))*100