NI Vision for Power Electronics

Inverter Technology Applications

Brian MacCleery Principal Product Manager for Clean Energy Technology, National Instruments, Member IEEE
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Power Electronics
The Cylinder and Piston of the Digital Energy Revolution

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Power Electronics
The Cylinder and Piston of the Digital Energy Revolution

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The Digital Energy Revolution

Digitized and digitally controlled Networked Field reconfigurable Modeled and simulated Improving at exponential rates

Today, approximately 30 percent of all power generation utilizes power electronics between the point of generation and consumption. By 2030, it is expected that up to 80 percent of all generated electricity will utilize power electronics. US Dept. of Energy Join the developer community at ni.com/powerdev

2020 compared to 2000

Processing performance is 113 thousand times cheaper per dollar A power converter controls 27 times more power for its size Lithion-Ion batteries deliver 29 times more energy storage (kWh) per dollar Typical inverters are 99.5% efficient (3.4 times less waste heat) Solar module cost is 110 times cheaper per watt, solar installed cost is 24 times cheaper per watt

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Top NI Applications in Digital Energy

A. B. C. D. E. F. G.

Solar/PV Wind turbines Motor drives, pumps, compressors Rail auxiliary power buses, traction control Uninterruptable Power Supplies (UPS) Electric & hybrid vehicles (including commercial/ agricultural vehicles) Other: Grid Storage, Flexible AC Transmission Systems (FACTS), etc.
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Cost per Watt = 14.26*(ANNUAL_PRODUCTION_GW*1000)^(-1.205)*ANNUAL_PRODUCTION_GW*1000

The Power Electronics Renaissance

The Power Electronics Renaissance

The Power Electronics Renaissance

The Power Electronics Renaissance

Since the industrial revolution I do not know of a single financial push towards a solitary focus as large as renewable energy outside of war.- Glenn A. Knierim, Ph.D. of Infinity Physics

260% Growth 500 kW+, 156,000, 6% 190% Growth of units 100 to 500 kW, 416,000, 16% of units 160% Growth 10 to 100 kW, 728,000, 28% of units

90% Growth < 10 kW, 1,300,000, 50% of units

2010 INVERTER UNITS AND GROWTH RATE BY INVERTER SIZE (kW)

INVERTER SHIPMENTS (MWp)

Data Source: http://www.frc.ri.cmu.edu/~hpm/book97/ch3/processor.list

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Modern Hybrid DSP-FPGA

RECONFIGURABLE LOGIC

I/O BLOCK

Source: Xilinx

HARD CORE DSP SLICE

Modern Field Programmable Gate Array (FPGA)

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Modern hybrid FPGAs offer higher performance than traditional DSPs

Million MACS per Chip Million MACS per Watt Million MACS per Dollar

Dual-Core Spartan-6 Performance Ratio DSP LX45 FPGA (FPGA/DSP) 600 14,500 24 571 5,897 10 7 279 40

MACS = Multiply-accumulate operations per second (measure of DSP performance) ni.com | NI CONFIDENTIAL
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LabVIEW FPGA vs

VHDL

66 Pages ~4000 lines

Counter
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Analog I/O
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Streaming

Levels of Hardware Abstraction

NI Vision:
To do for digital energy what the PC did for the desktop
Standard HW architectures, modular blocks, software defined, field programmable

The software is the inverter

Inverter Power Stack w/ Controller Abstraction Power Stack (Level 2) Intelligent Power Modules IGBT Modules IGBT

NI sbRIO GPIC

System Complexity
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NI Single-Board RIO General Purpose Inverter Controller (GPIC)

NI Single-Board RIO General Purpose Inverter Controller (NI GPIC)

Industry-proven NI LabVIEW RIO architecture and cutting-edge cosimulation tools Deployment-ready for high volume commercial applications Multicore FPGA delivers 40x higher performance per dollar than traditional DSPs

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Design Flow with the NI GPIC

1. Co-Simulation, 2. Interface Board Design, 3. Commercial Deployment
1.

2.

3.

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Customer Defined Interface Board

1. NI Single-Board RIO sbRIO-9606 2. NI GPIC 9683 RIO Mezzanine Card (bottom orientation connectors) 3. Custom interface or gate drive PCB (not provided by NI)

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GPIC Mating PCB Design

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GPIC Mating PCB Design

Semikron SKiiP 3 connector

Break-out connector for GPIC inputs

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SmartPower Stack Inverter

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The System (What is a Stack)

Inside the Stack (diagram)

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Power Electronics Design Goals & Tradeoffs

Optimize for multiple design goals simultaneously, including:

Energy efficiency Cost Component lifetime Systematic reliability Regulatory compliance Smart grid ready Differentiated features

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NI Vision for Power Electronics

GraphicalCoSimulation (Multisim,LabVIEWFPGA)

Click to navigate
PowerElectronicsTesting (BloomyEnergy,PXI) Design Test Cells

Prototype RapidControlPrototyping (MulticoreCompactRIO,SIT)

HIL Testing

DigitalDynamometers &GridSimulators

Deploy

RealTimeHILSimulation (StateSpaceandFEABased)

CommercialDeployment (GeneralPurposeInverterController)

UtilityNetworking (IEC61850,DNP3,)

The Evolution of System Level Design

Traditional Methodology
Plant Model (Analog) Circuit Design & PCB Layout Mechanical Design Magnetic & Thermal Analysis
Closed Loop Simulation

Proposed Methodology
Plant Model (Analog) Circuit Design & PCB Layout Mechanical Design Magnetic & Thermal Analysis FPGA SW Cost I/O Algorithm (90%)
39 Chip-On-Board with I/O Support Closed Loop Simulation

Software Model (Analog) Continuous to Discrete Time Float to FixedPoint Math

Graphical Implementation Code (Discrete-Time, Fixed Point)

Simulation Context

System Level to Register Level Code

Automatic Synthesis

Deployment Context

FPGA SW Cost AlgoI/O rithm (70%)

Full-Custom

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NI Multisim Analog Simulation

Integrated schematic capture & simulation environment 22,000+ components from leading device manufacturers Power device simulation for transformers, SMPS, IGBTs etc Customizable simulation analyses & instruments NI LabVIEW FPGA and Control Design & Simulation Module integration

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NI LabVIEW FPGA

NI Multisim

NATIONAL INSTRUMENTS

GRAPHICAL CO-SIMULATION WITH NI LABVIEW FPGA & MULTISIM (AUTO-VARIABLE TIMESTEP CO-SIMULATION)

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Auto-Variable Timestep FPGA Co-Simulation

Motor Load

Power MOSFETs

Traditional system design requires separate analog and digital simulation

Accurate, cycle-accurate, closed loop simulation requires co-ordination -> Auto-Variable Timestep Co-Simulation

Effectively creates a continuous time simulation involving both LabVIEW and Multisim

SMPS, FET and transistor performance best characterized in SPICE Algorithm development with graphical system design (LabVIEW) Co-simulation possible due to LabVIEW and Multisim nodes
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Demo:BuckConverterCoSimulationwithMathScript

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Open Source Back-to-Back Inverter Research Board

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Screaming Circuits Back-to-Back 3-Phase Inverter Kit

(Does not include NI sbRIO GPIC)

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Demo: 3 Phase Grid-Tied Inverter Control

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Co-Simulation of FPGA-based Control System with Comparison to Experimental Results

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New data on LabVIEW graphical system design approach

Wilson Research Study
NI Embedded Customers (2012)1 Average Development Team Size (HW, SW, Firmware Engineers) Average Months to Complete Project Average Person-Months to Complete Project Average Development Cost (assuming $100k/person/year with overhead) Percent of Projects Completed On or Ahead of Schedule Percent of Projects Completed Behind Schedule/Late EETimes Overall Embedded Market (2012)2 11.5 12.5 144 $1,198,000 Ratio

4.8 6.2 30 $248,000

2.4 2.0 4.8 (average of 114 personmonth savings per design) 4.8 (average $950,000 cost savings per design) 0.7 1.4

58% of NI customers 38% of NI customers

42% of embedded market 55% of embedded market

NOTE1: The overall embedded market study was a global Email/web study including over 1,700 responses from embedded engineers from Americas, Europe and Asia NOTE2: The study of NI embedded customers was a global Email/web study including over 1,100 responses NI embedded customers from Americas, Europe and Asia

Dynapower Case Study

"The key to this design was the ability for our power engineers to directly program their product without a software engineer in the middle. This new platform and method of development changed our development time from 72 weeks to 24 weeks.These tools take design to the next level. We can have a 90 percent confidence factor in a first design and minimize hardware iterations during the prototype stage.

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NI Vision for Power Electronics

GraphicalCoSimulation (Multisim,LabVIEWFPGA)

Click to navigate
PowerElectronicsTesting (BloomyEnergy,PXI) Design Test Cells

Prototype RapidControlPrototyping (MulticoreCompactRIO,SIT)

HIL Testing

DigitalDynamometers &GridSimulators

Deploy

RealTimeHILSimulation (StateSpaceandFEABased)

CommercialDeployment (GeneralPurposeInverterController)

UtilityNetworking (IEC61850,DNP3,)

Hardware-In-the-Loop (HIL) Simulation of Power Electronics

Setpoint Error Controller Control Output Kp Plant Feedback

Keys to success for power electronics simulations: High fidelity models

Non-linear Time varying

Sub 1us timing High speed I/O (1-10x the loop rate)
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Hardware-In-the-Loop (HIL) Simulation of Power Electronics

Setpoint Error Control Output Kp Plant
Actual Digital Inverter Controller Simulated Switched-Mode Power System

Feedback

Keys to success for power electronics simulations: High fidelity models

Non-linear Time varying

Sub 1us timing High speed I/O (1-10x the loop rate)
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What is a power electronics HIL test system?

Real-Time Power Simulation
(Cracked ECU or Full Power Simulator)
BatteryStack, SolarArray

DC
Transformer Converter/Rectifier

DC DC

Management System

Inverter/Drive

GRID DC Physical Control Board

PowerSystem Control System Inverter/Converter/Drive Motor/Generator

AC

AC

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53 HIL = Hardware-In-the-Loop

Whensimulatingswitchmodepowersystems, speedmatters!

For negligible error, the simulation timestep should be 100 times faster than the PWM switching frequency

Image courtesy Prof. Reza Iravani, University of Toronto

GraphicalSystemDesign
Graphical Programmin g DesktopCo Simulation Auto Compilatio n Auto Synthesis Auto Place& Route Deploymen t

HARDCOREDSPSLICE

LabVIEWFPGA

HybridDSPFPGA

Open Source FPGA-based Real-Time HIL Simulator

System Parameters IGBTs: SEMIKRON SKM 50 GB 123D, 600 V, 80 A DC link voltage: Vdc = 400 V Fundamental Freq = 60 Hz PWM (carrier) Freq = 3 KHz Output Filter: Lf = 800 H Cf = 500 F Load: Lload = 2 mH Rload = 5

Simulation loop rate of 3.57 MHz (0.28 s) > 3000X Acceleration vs. Processor
Reference: MCBRYDE, JAMES. Inverter Efficiency Simulation and Measurement for Various Modern Switching Devices.

JMAGFiniteElementAnalysis(FEA)Based FPGARealTimeSimulator
PMSM Sinusoidal Flux Model* (DQ Reference Frame) JMAG FEA Model

Low Fidelity Model Assumptions: Uniform air-gap No slot harmonics No stator saturation Sinusoidally distributed windings No zero phase sequence (system is balanced)

High Fidelity Model Assumptions: Complex geometry Magnetic materials Permanent magnets Nonlinear inductance Saturation effects Coil winding Copper and iron losses* Efficiency* *Post processing

ModifiedNodalAnalysisBased FPGARealTimeSimulator

ModifiedNodalAnalysisBased FPGARealTimeSimulator

SET Electric Motor Emulator (EME)

Phase Emulation MotorModel

Interface

Sensor Emulation

Inverter

Power Stage

Sensor Interface

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NI Power Electronics RCP & HIL System

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NEXT STEP

JOIN THE DEVELOPER COMMUNITY AT

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IEEE Spectrum
Smart Grid Power Electronics Webcast Series

Real-Time HIL Simulation of Grid-Tied Switched-Mode Power Systems A New System-Level Design Methodology and Platform for FPGA-based Power Electronics Control Modernist Circuit Topologies & Transistors for Smart Grid Power Electronics Power Converter Controller Design for Smart Grid Power Electronics Accelerating Development of Smart Grid Power Electronics Control Systems with RCP and HIL Techniques Developing PMU Technology for Dynamic Conditions in Distribution Under the Hood of the Smart Grid: Smart Sensing and Analytics Smart-Grid Control Systems: Moving Towards a Self-Healing Grid Top 10 Clean Energy Business Opportunities
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