Question: Convert binary 111111110010 to hexadecimal. A.EE216 B.FF216 C.2FE16D.

FD216 Answer:B

 Question: Convert the binary number 1001.00102 to decimal. A.90.125 B.9.125 C.125 D.12.5 Answer:B

Question: How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate to go HIGH? A. any one of the inputs B. any two of the inputs C. any three of the inputs D. all four inputs Answer :d

Question: If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be? A. All inputs must be LOW B.All inputs must be HIGH. C.At least one input must be LOW. D.At least one input must be HIGH. Answer:c

Question: How many 3-line-to-8-line decoders are required for a 1-of-32 decoder? A.1 B.2 C.4 D.8 Answer:C

Question: Which of the circuits in figure (a to d) is the sum-ofproducts implementation of figure (e)? A. a B. b C. c D. d Answer:D

Question: A full subtracter circuit requires ________. A. two inputs and two outputs B.two inputs and three outputs C. three inputs and one output D. three inputs and two outputs Answer:D

Question: What is the function of an enable input on a multiplexer chip? A. to apply Vcc B. to connect ground C. to active the entire chip D. to active one half of the chip Answer:C

Question: The expansion inputs to a comparator are used for expansion to a(n): A.4-bit system B.8-bit system C.BCD system D. counter system Answer:B

Question: A basic multiplexer principle can be demonstrated through the use of a: A. single-pole relay B.DPDT switch C. rotary switch D. linear stepper Answer:C

Question: For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output? A.LOW B.HIGH C. Don't Care D. Cannot be determined Answer: A

Question: For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be HIGH. What is the status of the Y output? A.LOW B.HIGH C. Don't Care D. Cannot be determined Answer:A

Question: A principle regarding most IC decoders is that when the correct input is present, the related output will switch: A. active-HIGH B. to a high impedance C. to an open D. active-LOW Answer:D

Question: What control signals may be necessary to operate a 1-line-to-16 line decoder? A. flasher circuit control signal B .a LOW on all gate enable inputs C. input from a hexadecimal counter D. a HIGH on all gate enable circuits Answer:B

Question: One multiplexer can take the place of: A. several SSI logic gates B. combinational logic circuits C. several Ex-NOR gates D. several SSI logic gates or combinational logic circuits Answer:D

Question: How many inputs are required for a 1-of-10 BCD decoder? A.4 B.8 C.10 D.1 Answer: A

Question: Convert 59.7210 to BCD. A.111011 B.01011001.01110010 C.1110.11 D.0101100101110010 Answer:B

Question: Which is typically the longest: bit, byte, nibble, word? A. Bit B. Byte C. Nibble D. Word Answer:D

Question: Assign the proper odd parity bit to the code 111001. A.1111011 B.1111001 C.0111111 D.0011111 Answer:B

Question: Select the statement that best describes the parity method of error detection: A. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. B. Parity checking is not suitable for detecting single-bit errors in transmitted codes. C. Parity checking is best suited for detecting single-bit errors in transmitted codes. D. Parity checking is capable of detecting and correcting errors in transmitted codes. Answer:C

Question: Identify the type of gate below from the equation A. Ex-NOR gate B.OR gate C. Ex-OR gate D.NAND gate Answer:C

Question: How is odd parity generated differently from even parity? A. The first output is inverted. B. The last output is inverted. Answer:B

Question: The difference between a PLA and a PAL is: A. The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane. B. The PAL has a programmable OR plane and a programmable AND plane, while the PLA only has a programmable AND plane. C. The PAL has more possible product terms than the PLA. D. PALs and PLAs are the same thing.

Answer: A

Question: Parity systems are defined as either________ or ________ and will add an extra ________ to the digital information being transmitted. A. positive, negative, byte B. odd, even, bit C. upper, lower, digit D. on, off, decimal Answer:B

Question: Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. A. Using A as the control, when A = 0, X is the same as B. When A = 1, X is the same as B. B. Using A as the control, when A = 0, X is the same as B. When A = 1, X is the inverse of B. C. Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the same as B. D. Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the inverse of B. Answer:B

Question: How many flip-flops are required to make a MOD-32 binary counter? A.3 B.45 C.5 D.6 Answer:C

Question: Which statement BEST describes the operation of a negative-edge-triggered D flipflop? A. The logic level at the D input is transferred to Q on NGT of CLK. B. The Q output is ALWAYS identical to the CLK input if the D input is HIGH. C. The Q output is ALWAYS identical to the D input when CLK = PGT. D. The Q output is ALWAYS identical to the D input. Answer:A

Question: How is a J-K flip-flop made to toggle? A.J = 0, K = 0 B.J = 1, K = 0 C.J = 0, K = 1 D.J = 1, K = 1 Answer:D

Question: Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then: A. the polarity fuse is restored B. sent to an inverter for output C. sent immediately to an output pin D. passed to the AND function for output Answer:B

Question:________ are used at the inputs of PAL/GAL devices in order to prevent input loading from a large number of AND gates. A. Simplified AND gates B. Fuses C. Buffers D. Latches Answer:C

Question: Determine odd parity for each of the following data words: 1011101 11110111 1001101 A.P = 1, P = 1, P = 0 B.P = 0, P = 0, P = 0 C.P = 1, P = 1, P = 1 D.P = 0, P = 0, P = 1 Answer:D

Question: Integrated-circuit counter chips are used in numerous applications including: A. timing operations, counting operations, sequencing, and frequency multiplication B. timing operations, counting operations, sequencing, and frequency division C. timing operations, decoding operations, sequencing, and frequency multiplication D. data generation, counting operations, sequencing, and frequency multiplication Answer:B

Question: Synchronous counters eliminate the delay problems encountered with asynchronous counters because the: A. input clock pulses are applied only to the first and last stages B. input clock pulses are applied only to the last stage C. input clock pulses are not used to activate any of the counter stages D. input clock pulses are applied simultaneously to each stage Answer:D

Question: What is the difference between combinational logic and sequential logic? A .Combinational circuits are not triggered by timing pulses, sequential circuits are triggered by timing pulses. B. Combinational and sequential circuits are both triggered by timing pulses. C. Neither circuit is triggered by timing pulses. Answer:A

Question: Convert the following binary number to octal. 0101111002 A.1728 B.2728 C.1748 D.2748 Answer:D

Question: How many binary digits are required to count to 10010? A.7 B.2 C.3 D.100 Answer:A

Question: The binary number for octal 458 is ________. A.100010 B.100101 C.110101 D.100100 Answer:B

Question: Which of the figures in figure (a to d) is equivalent to figure (e)? A. a B.b C. c D. d Answer:B

Question: How many data select lines are required for selecting eight inputs? A.1 B.2 C.3 D.4 Answer:C

Question: Most demultiplexers facilitate which type of conversion? A. decimal-to-hexadecimal B. single input, multiple outputs C. ac to dc D. odd parity to even parity Answer:B

Question: Why can a CMOS IC be used as both a multiplexer and a demultiplexer? A. It cannot be used as both. B.CMOS uses bidirectional switches. Answer:B

Question:A flip-flop has ________. A. one stable state B. no stable states C. two stable states D. none of the above Answer:C

Question: The primary use for Gray code is: A. coded representation of a shaft's mechanical position B. turning on/off software switches C. to represent the correct ASCII code to indicate the angular position of a shaft on rotating machinery D. to convert the angular position of a shaft on rotating machinery into hexadecimal code Answer:A

Question: Convert the fractional binary number 0000.1010 to decimal. A.0.625 B.0.50 C.0.55 D.0.10 Answer:A

Question: The simplest equation which implements the Kmap shown below is: A. B. C. D.

Question: A binary code that progresses such that only one bit changes between two successive codes is: A. nine's-complement code B.8421 code C.excess-3 code D. Gray code Answer:D

Question: Which of the following statements accurately represents the two BEST methods of logic circuit simplification? A. Boolean algebra and Karnaugh mapping B. Karnaugh mapping and circuit waveform analysis C. Actual circuit trial and error evaluation and waveform analysis D. Boolean algebra and actual circuit trial and error evaluation Answer:A

Question: The sum of 11101 + 10111 equals ________. A.110011 B.100001 C.110100 D.100100 Answer:C

Question: A binary number's value changes most drastically when the ________ is changed. A.MSB B. frequency C.LSB D. duty cycle Answer:A

Question: What is an analog-to-digital converter? A. It makes digital signals B. It takes analog signals and puts them in digital format. C. It allows the use of digital signals in everyday life. D. It stores information on a CD. Answer:B

Question: Which of the following is an important feature of the sum-of-products form of expressions? A. All logic circuits are reduced to nothing more than simple AND and OR operations. B. The delay times are greatly reduced over other forms. C. No signal must pass through more than two gates, not including inverters. D. The maximum number of gates that any signal must pass through is reduced by a factor of two. Answer:A

Question: On a master-slave flip-flop, when is the master enabled? A. when the gate is LOW B. when the gate is HIGH C. both of the above D. neither of the above Answer:B

Question: What type of register is shown below? A. Parallel in/parallel out register B. Serial in/parallel out register C. Serial/parallel-in parallel-out register D. Parallel-access shift register Answer:D

Question: The Ex-NOR is sometimes called the ________. A. parity gate B. equality gate C. inverted OR D. parity gate or the equality gate Answer:B

Question: What is another name for digital circuitry called sequential logic? A. logic macrocell B. logic array C. flip-flop memory circuitry D. Inverter Answer:C

Question: When did the first PLD appear? A. More than 10 years ago B. More than 20 years ago C. More than 30 years ago D. More than 40 years ago Answer:C

Question: The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels? A.A > B = 1, A < B = 0, A < B = 1 B.A > B = 0, A < B = 1, A = B = 0 C.A > B = 1, A < B = 0, A = B = 0 D.A > B = 0, A < B = 1, A = B = 1 Answer:C

Question: Each "1" entry in a K-map square represents: A. a HIGH for each input truth table condition that produces a HIGH output. B. a HIGH output on the truth table for all LOW input combinations. C. a LOW output for all possible HIGH input conditions. D. a DON'T CARE condition for all possible input truth table combinations. Answer:A

Question:Looping on a K-map always results in the elimination of: A .variables within the loop that appear only in their complemented form. B. variables that remain unchanged within the loop. C. variables within the loop that appear in both complemented and uncomplemented form. D.variables within the loop that appear only in their uncomplemented form. Answer:C

Question: Which of the following is not a weighted value positional numbering system: A. hexadecimal B. binary-coded decimal C. binary D. Octal Answer:B