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Memory
instruction data
Input unit
Output unit
Levels of Parallelism
Within arithmetic logic circuits Multiple instructions execute per clock cycle Overlap of memory operations with computation More than one processor Multiple jobs run in parallel on SMP
Levels of Parallelism
Bit Level Parallelism
Within arithmetic logic circuits
Levels of Parallelism
Instruction Level Parallelism (ILP)
Multiple instructions execute per clock cycle
Levels of Parallelism
Memory System Parallelism
Overlap of memory operations with computation
Levels of Parallelism
Operating System Parallelism
There are more than one processor Multiple jobs run in parallel on SMP
Flynns Taxonomy
Single Instruction stream - Single Data stream (SISD) Single Instruction stream - Multiple Data stream (SIMD) Multiple Instruction stream - Single Data stream (MISD) Multiple Instruction stream - Multiple Data stream (MIMD)
Memory
instruction data
CU
ALU
Processor
Flynns Taxonomy
Single Instruction stream - Single Data stream (SISD) Single Instruction stream - Multiple Data stream (SIMD) Multiple Instruction stream - Single Data stream (MISD) Multiple Instruction stream - Multiple Data stream (MIMD)
PE
data
Instructions of the program are broadcast to more than one processor Each processor executes the same instruction synchronously, but using different data
Memory
instruction CU
PE
data
PE
data
PE
data
instruction
Flynns Taxonomy
Single Instruction stream - Single Data stream (SISD) Single Instruction stream - Multiple Data stream (SIMD) Multiple Instruction stream - Single Data stream (MISD) Multiple Instruction stream - Multiple Data stream (MIMD)
Shared memory
Distributed memory
M
P
M
P
M
P
Distributed memory
Network
Each processor has its own local memory Message-passing is used to exchange data between processors
Shared memory
P Bus
Memory
Single address space All processes have access to the pool of shared memory
Distributed Memory
M P NI M P NI M P NI M P NI
Processors cannot directly access another processors memory Each node has a network interface (NI) for communication and synchronization
Network
Distributed Memory
M
instr data
CU
PE
data
data
instr data
CU
PE Network
instr data
data
CU
PE
instr data
data
CU
PE
Shared Memory
CU PE
data
data
data
CU
PE
data
CU
PE
instruction
Memory
CU
PE
Shared Memory
P P
Bus Memory
P Bus
P Bus
Memory Network
Memory
Time for memory access depends on the location of data Local access is faster than nonlocal access Easier to scale than SMPs
Making the main memory of a cluster of computers look as if it is a single memory with a single address space Shared memory programming techniques can be used
Distributed Systems
Clusters
Grid