SEMINAR ON RISC & CISC

Presented by

Intramantra Global Solution PVT LTD, Indore

http://intramantra.com
INTRODUCTION

RISC & CISC

Performance Equation

RISC VS. CISC

 INTRODUCTION

About Micro-processor
About Instruction & Instruction Set

About Registers
 RISC & CISC

Why it is called RISC & CISC ?

What is RISC & CISC ?

To be continue…………….
 1 2 3 4
1
2
3 Main Memory
4
5
6

Registers

Execution Unit
In CISC Approach

MULT 2:3 , 5:2

Compiler do very little

work to translate
 1 2 3 4
1
2
3 Main Memory
4
5
6

Registers

Execution Unit
In RISC Approach

LOAD A , 2:3
LOAD B , 5:2
PROD A , B
STORE 2:3, A
 Performance Equation

time time cycles instructions

program
=
cycle
* instruction
* program
 CISC vs. RISC

Emphasis on Emphasis on
Hardware Software
Complex Reduced
instruction instruction

Small code Large code size

sizes
Memory- to- Register-to-
Memory Register
THANKS

Presented By :-
Sarvendra Purohit