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Class Notes Digital Lec27

Class Notes Digital Lec27

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Published by: Sazzad Hossain Lemon on Mar 21, 2011
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03/21/2011

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September 28, 2010
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Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
BCD Adder:
 A BCD adder is used to perform addition of BCD numbers. A BCD adder circuit must be able to do the following –1) Add two four-bit BCD code groups, using straight binary addition.2) Determine if the sum of this addition is greater than 1001
2
=9
10
. If it is, add 0110 (decimal 6) to this sum andgenerate a carry to the next decimal position.If the two BCD code groups represented by A
3
A
2
A
1
A
0
and B
3
B
2
B
1
B
0
are applied to a four-bit parallel adder, the adder will perform the following operation –A
3
A
2
A
1
A
0
 
BCD code group+ B
3
B
2
B
1
B
0
 
BCD code groupS
4
S
3
S
2
S
1
S
0
 
straight binary sumS
4
is actually C
4
, the carry out of the MSB.The sum outputs S
4
S
3
S
2
S
1
S
0
can range anywhere from 00000 to 10010. These cases where the sum is greater than01001 are listed below.Let’s define X as a logic output that will go HIGH only when the sum is greater than 01001. Therefore, X will be HIGHfor either of the following conditions –(I) whenever S
4
=1, sums greater than 15.(II) whenever S
3
=1 and either S
2
or S
1
or both are 1, sums are between 10 to 15.This can be expressed as –X=S
4
+S
3
(S
2
+S
1
)Whenever X=1, it is necessary to add the correction 0110 to the sum bits and to generate a carry. Figure belowshows the complete circuitry for a BCD adder including the logic circuit implementation for X.The circuit consists of three basic parts –(I) The two code groups A
3
A
2
A
1
A
0
and B
3
B
2
B
1
B
0
are added together in the upper four-bit adder to produce thesum S
4
S
3
S
2
S
1
S
0
.(II) The logic gates implement the expression for X.(III) The lower four-bit adder will add the correction 0110 to the sum bits only when X=1, producing the finalBCD sum output represented by Σ
3
Σ
2
Σ
1
Σ
0
.X is also the carry output that is produced when the sum is greater than 01001.When X=0, there is no carry and no addition of 0110 and Σ
3
Σ
2
Σ
1
Σ
0
=S
3
S
2
S
1
S
0
.S
4
S
3
S
2
S
1
S
0
0 1 0 1 0 (10)0 1 0 1 1 (11)0 1 1 0 0 (12)0 1 1 0 1 (13)0 1 1 1 0 (14)0 1 1 1 1 (15)1 0 0 0 0 (16)1 0 0 0 1 (17)1 0 0 1 0 (18)
Lec-27, Pg-01
 
September 28, 2010
`~ivjvcbx twc,G,we,G·, 9661920-73/4980
 
dwjZ c`v_© weÁvb, B‡jKUªwb· 
I
 KwgDwb‡Kkb BwÄwbqvwis wefvM 
XvKv wek¦we`¨vjq 
XvKv-1000, evsjv‡`k 
 
Telephone :PABX : 9661920-73/4980
DEPT. OF APPLIED PHYSICS, ELECTRONICS &COMMUNICATION ENGINEERING
UNIVERSITY OF DHAKA
 
DHAKA-1000, BANGLADESHFAX: 880-2-8615583E-MAIL: APECE@
univdhaka.edu
 
Ref. No............................ Dated, the………………………….
In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)
Fig.: A BCD adder contains two four-bit adders and a correction-decoder circuit.Fig.: Cascading BCD adders to add two three-digit decimal numbers.When decimal numbers with several digits are to be added together, it is necessary to use a separate BCD adder for each digit position. The above figure shows a block diagram of a circuit for the addition of two three-digit decimalnumbers.The A register contains 12 bits, which are the three BCD code groups for one of the three-digit decimal numbers.The B register contains the BCD representation of the other three-digit decimal number.
BCD adder A
11
A
10
A
9
A
8
Σ
11
Σ
10
Σ
9
Σ
8
CARRYB
11
B
10
B
9
B
8
BCD adder A
7
A
6
A
5
A
4
Σ
7
Σ
6
Σ
5
Σ
4
CARRYB
7
B
6
B
5
B
4
BCD adder A
3
A
2
A
1
A
0
Σ
3
Σ
2
Σ
1
Σ
0
CARRYB
3
B
2
B
1
B
0
CARRY INBCD codes for 3-digit number LSDMSDBCD codes for 3-digit number 74HC3274HC084-bit parallel adder 74HC283A
3
A
2
A
1
A
0
B
3
B
2
B
1
B
0
Σ
3
Σ
2
Σ
1
Σ
0
C
0
, carry from lower position adder C
4
 (not used)BCD code groupCarry to nextBCD adder BCD sumBCD code group4-bit parallel adder 74HC283A
3
A
2
A
1
A
0
B
3
B
2
B
1
B
0
C
0
=074HC32S
3
S
2
S
1
S
0
XCorrectionadder Correction logicLec-27, Pg-02

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