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OverviewofthePIC16Series AnArchitectureOverviewofthe16F84A The16F84AMemoryOrganization MemoryAddressing SomeIssuesofTiming PowerupandReset The16F84AOnchipResetCircuit
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OverviewofthePIC16Series
ThePIC16seriesisclassifiedasamidrange microcontroller Theserieshasdifferentmembersallbuiltaround thesamecoreandinstructionset,butwith differentmemory,I/Ofeatures,andpackagesize
AnArchitectureOverviewofthe 16F84A
AnArchitectureOverviewofthe16F84A
ThePIC16F84AMemoryandRegisters
ProgramRelated
ThePIC16F84AMemoryandRegisters
ProgramMemory
1Kx14Bits Addressrange0000H 03FFH Flash(nonvolatile) 10000erase/writecycles Location0000H isreservedfortheresetvector Location0004HisreservedfortheInterruptVector ProgramCounter Holdstheaddressofthenextinstructiontobeexecuted Stack 8levels(eachis13bits) SRAM(volatile) UsedtostorethereturnaddresswithinstructionlikeCALL, RETURN,RETFIE,andRETLW(interruptsandprocedures)
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InstructionRegister Holdstheinstructionbeingexecuted
ThePIC16F84AMemoryandRegisters
TheConfigurationWord
Aspecialpartoftheprogrammemory Allowstheusertoconfiguredifferentfeaturesofthemicrocontrollerat thetimeofprogramdownload Isnotaccessiblewithintheprogramorwhileitisrunning
ThePIC16F84AMemoryandRegisters
DataMemoryandSpecialFunction Registers(SFRs) SRAM(volatile) Bankedaddressingtoreduce addressbussize SpecialFunctionRegistersSFRs
Locations01H0BHinbank0and 81H 8BH inbank1 UsedtocommunicatewithI/Oand controlthemicrocontrolleroperation SomeofthemholdI/Odata
GeneralPurposeRegisters
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ThePIC16F84AMemoryandRegisters
SpecialFunctionRegisters(SFRs)
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ThePIC16F84AMemoryandRegisters
SpecialFunctionRegisters(SFRs)interactingwith peripherals
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ThePIC16F84AMemoryandRegisters
TheWorkingRegister
InsidetheCPU HoldstheresultofthelastinstructionexecutedbytheCPU
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ThePIC16F84AMemoryandRegisters
DataMemoryAddressing
ForPIC16F84A,weneedtoselectoneoftwobanks(1bit) and7bitstoselectonofthelocations Bankselectionisdonethroughusingbits5and6ofthe STATUSregisters(RP0andRP1) Forthe16F84A,onlyRP0isneededsincewehavetwo banks Ingeneral,twoformstoaddresstheRAM(FileRegisters)
Directaddressing the7bitaddressispartoftheinstruction Indirectaddressing the7bitaddressisloadedinFileSelect Register (FSR,04H)
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ThePIC16F84AMemoryandRegisters
DataMemoryAddressing
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ThePIC16F84AMemoryandRegisters
TheSTATUSRegister(03H,83H)
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ThePIC16F84AMemoryandRegisters
DataRelated
EEPROMDataMemory
64bytesNonvolatile 10000000erase/writecycles Usedtostoredatathatislikelytobeneededforlongterm OperationiscontrolledthroughEEDATA(08H),EEADR(09H),EECON1 (88H),andEECON2(89H) SFRs Toreadalocation storetheaddressinEEADRandsettheRDbitinEECON1 dataiscopiedtoEEDATAregister Towritetoalocation dataandaddressareplacedinEEDATAandEEADR,respectively enablewritingbysettingtheWREN bitinEECON1SFR store55HthenAAHinEECON2 commitwritingbyenablingtheWRbit Oncethewriteisdone,theEEIFflagissetinEECON1.
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ThePIC16F84AMemoryandRegisters
TheEECON1Register(88H)
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SomeIssuesofTiming
TheClock
Themicrocontrollerismadeupofcombinationalandsequentiallogic. Thus,itrequiresaclock! Clock acontinuouslyrunningfixedfrequencylogicsquarewave Timers,counters,serialcommunicationfunctionsarealsodependent ontheclock Operatingfrequencyhasdirectimpactonpowerconsumption Everymicrocontrollerhasarangeforitsclock
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SomeIssuesofTiming
InstructionCycle
Themainclockisdividedbyafixedvalue(4inthe16 series)intoalowerfrequencysignal Thecycletimeofthissignaliscalledtheinstructioncycle Theprimaryunitoftimeintheactionofprocessor
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SomeIssuesofTiming
Pipelining
Everyinstructioninthecomputerhastobefetchedfrommemoryand thenexecuted.Thesestepsareusuallyperformedoneafteranother TheCPUcanbedesignedtofetchthenextinstructionwhileexecuting thecurrentinstruction.Thisimprovesperformancesignificantly! ThisiscalledPipelining AllPICmicrocontrollersimplementpipelining(RISC+Harvardmakeit easy)
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PowerupandReset
Onpowerup,themicrocontrollermuststarttoexecuteprogram storedintheprogrammemoryfromitsbeginning(address0000H) Aspecializedcircuitinsidethemicrocontrollerdetectsthisandis responsibleforputtingthemicrocontrollerintheresetstate:
theprogramcounterissettozero theSFRsaresetsuchthattheperipheralsareinsafeanddisabled
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The16F84AonChipResetCircuit
Logic 1 on this activates the Reset Signal
Logic 1 on this input deactivates the Reset Signal and causes the microcontroller to exit the reset state 23
The16F84AonChipResetCircuit
ExampleonresettimingwhenMCLRisconnectedtoVDD
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Summary
ThePIC16F84Aseriesisadiverseandcosteffective familyofmicrocontrollers ThePIC16F84AispipelinedRISCprocessorwith Harvardarchitecture ThePIC16F84Ahasthreedifferentmemorytypes AnimportantmemoryareaistheSpecialFunction RegisterareawhichactaslinkbetweentheCPUand peripherals Resetoperationmustbeunderstoodforproper operationofthemicrocontroller
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