Control Loop Design for GSM mobile phone applications

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Control of output power level on GSM mobile phones

Why do we need to control the output power level of
Mobile phones? There are a number of very good reasons:
to prevent inter modulation of Base Station receivers,
to prevent intermodulation with other Mobile phones,
and to minimize power consumption depending on the
distance between mobile and base station.
The 3GPP GSM standards body defines GSM specifica-
tions in the TS 45.005 Radio Transmission and Reception
technical specification. This document specifies the
nominal output power levels and accepted tolerance of
GSM Mobile transmitters under nominal and extreme
conditions. The nominal conditions refer to ambient
temperature with nominal voltage supply and the latter
refers to a combination of extreme values of voltage and
temperature. The Radio Transceiver operating voltage for
most components in the current mobile phone technol-
ogy is 2.8 V, which is set by the use of voltage regulators
supplied directly by the mobile phone battery. However,
the PA needs to be connected directly to the battery,
as a higher level of DC current is required to deliver the
necessary output power. Therefore it is battery response
that determines the PA extreme voltage conditions. As an
example, GSM TS specifies that three NiCd battery cells
with a nominal 3.6 V should have a minimum tolerance
of -0.36 V. With regards to temperature variations, GSM TS
specifies extreme conditions between –20 to +55°C.
Control of output power level is done in 2 dB steps. The
normal maximum output levels for GSM handset mobile
station are 33 dBm for GSM 850/900 MHz and 30 dBm for
1800/1900 MHz. Dynamic range of power control is 28 dB
for the 850/900 MHz band and 30 dB for the 1800/1900
MHz band. See the table below for power levels and char-
acteristic tolerance values.

GSM Standard: 3GPP TS45.005 Mobile station output power specification

Tolerance (dB) for Conditions
Power Control Level (dBm) Nominal Output Power (dBm) Normal Extreme
900/850 1800 1900 900/850 1800 1900 900/850 1800 1900 900/850 1800 1900
29 22-29 36 Reserved ±2 Reserved ±2,5 Reserved
0-2 30 30 39 34 33 ±2 ±3 ±2 dB ±2,5 ±4 ±2,5 dB
3 31 31 37 32 32 ±3 ±3 ±2 dB ±4 ±4 ±2,5 dB
4 0 0 35 30 30 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
5 1 1 33 28 28 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
6 2 2 31 26 26 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
7 3 3 29 24 24 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
8 4 4 27 22 22 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
9 5 5 25 20 20 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
10 6 6 23 18 18 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
11 7 7 21 16 16 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
12 8 8 19 14 14 ±3 ±3 ±3 dB ±4 ±4 ±4 dB
13 9 9 17 12 12 ±3 ±4 ±4 dB ±4 ±5 ±5 dB
14 10 10 15 10 10 ±3 ±4 ±4 dB ±4 ±5 ±5 dB
15 11 11 13 8 8 ±3 ±4 ±4 dB ±4 ±5 ±5 dB
16 12 12 11 6 6 ±5 ±4 ±4 dB ±6 ±5 ±5 dB
17 13 13 9 4 4 ±5 ±4 ±4 dB ±6 ±5 ±5 dB
18 14 14 7 2 2 ±5 ±5 ±5 dB ±6 ±6 ±6 dB
19-31 15-28 15 5 0 0 ±5 ±5 ±5 dB ±6 ±6 ±6 dB
How the PA output power level is determined
Mobile phone manufacturers, in order to comply with
specific network operator demands, may tighten up their
internal system specifications for power control. Also the
requirement for longer battery life-time drives mobile
phone designers to keep output power levels as close as
possible to the nominal values.
Different system specifications like Noise performance and
Gain need to be partitioned and assigned to the different
components of the transmitter chain. With the current
transmit architecture and technology; the front end of
a transmitter will have a minimum loss of around 1.5 dB
with an additional 0.5 dB of mismatch loss at the antenna.
It is therefore assumed that the PA needs to increase its
output power level specifications 2 dB over the system
reference requirements in order to compensate for the
loss between the PA and the antenna.
The required mobile output signal strength is determined
by the distance between the mobile and the base station
and to a certain degree by the environmental conditions.
Signal strength information is sent by the Base Station to
the mobile using the BCH (Broadcast channel) and the
phone controller determines the required output power
level required at its location. The mobile output power
level is set by a voltage controlled variable gain power
amplifier. The mobile controller checks required output
power level against a look up table containing the corre-
sponding PA voltage levels that are written into the look
up table at the alignment stage of the phone manufactur-
ing process. Based on the data taken during alignment,
different voltage levels are sent by a DAC to the Voltage
controlled PA. Voltage values are fixed at this stage for
nominal conditions.
Theoretically, enough statistical knowledge of the
extreme condition performance of the transceiver might
enable DSP processing to compensate for the extreme
conditions. Accurate operating temperature sensing and
battery voltage degradation, minimal performance varia-
tions between component batches and a good under-
standing of the degradation of component performance
during the lifetime of the transceiver would allow such
compensation from the DSP routines to be programmed
into the phone software.
However, mobile phone R&D design is a very fast paced,
evolving environment where components with better
performance are continuously being introduced. This
makes it almost impossible to compile enough statistical
knowledge to build DSP algorithms to compensate for all
possible variations. Consequently, software alone cannot
possibly control the output power level in extreme condi-
tions and compensate for different transmitter component
tolerances. Specifically voltage controlled Power amplifiers,
have even under typical operating conditions, significant
2
differences between units in their response to voltage
control level. The generalised solution is to achieve output
power control using feedback hardware circuitry. In order
to do to do this, we first need to have good understanding
of how a GSM radio transmitter works.
How a GSM transmitter works and how it is implemented
GSM system interface overview with characteristic figures of merit
GSM system frequency bands are divided in to 200 kHz
channels. EGSM Tx 890-915 MHz has 124 channels, similarly
with Rx 935-960 MHz. Each carrier is therefore comprised
of a Tx and Rx 200 kHz channel spaced at 45 MHz. It is a time
division multiple access (TDMA) system, where the data in
every channel is packed in successive frames lasting for
4.615 ms. Each frame is divided in to eight time slots which
can be used by up to eight different mobiles, with each
of the mobiles using one out of the eight available time
slots in the frame. It is not a full duplex system, meaning
that the transmit and receive signals do not happen at
the same time. The allocation of timeslots to the different
Mobile Station, is done making sure that Tx and Rx do not
overlap on the same channel. Frequency hopping enables
consecutive time slots or ‘bursts’ of the same mobile to
be carried in different RF carriers. With the implementa-
tion of GPRS, one mobile communication may use a larger
number of timeslots in its channel. The system will enable
different numbers of timeslots to be used for each mobile
on the up link and down link channels, greatly increasing
the capacity of the system.
Every time slot lasts for one-eighth of the duration of the
frame. This is approximately 577 Ps. Each time slot in the
traffic channel frame contains user data bits and extra
bits for synchronization, control, guard time etc, making
for an overhead of around 27%. The data bit rate of the
system is 270.833 kb/s using a Gaussian Minimum Shift
Keying, GMSK, modulation scheme. This scheme is a type
of FSK where the peak frequency deviation (“mod index” x
“modulation frequency”) is one-fourth of the data bit rate,
hence the modulation will shift the frequency carrier in
270.833/4=67.708 kHz above and below carrier frequency.
As the fundamental frequency of a binary square wave is
equal to one-half of the bit rate, this is will be achieved
by having a mod index of 0.5 rad. Under these condi-
tions with the modulator sampling phase at the bit rate,
the frequency shift can be represented as a phase shift
of ±S/2. Every symbol in the polar diagram can be rep-
resented by one transition bit only. A phase shift of +90
degrees on the carrier represents data bit ‘1’ and a phase
shift of –90 degrees represents data bit ‘0’. In order to limit
the broad signal spectrum generated by fast phase transi-
tions, GSM uses a Gaussian Pre Modulation Filter with BT
index 0.3 (BWxT=0.3: filter BW is 0.3/T = 0.3xBr = 0.3x270.8
= 81.25 kHz). A screen capture of the polar diagram of
GMSK modulation signal is shown.

Speech and signaling data is encoded and interleaved
before being assembled into the timeslots and frames.
However it is the speech sampling speed (linked to the
codec voice compression and error correction system:
data mode MCS-4 with data rate 17.6 kbps) and frame
configuration overhead (27%) what determines the
limiting factor of the system capacity to send informa-
tion, this is a effective bit rate of 13 kbs. It is also relevant
to mention that effective data rate and channel BW and
are not the only factors that determine the capacity of a
cellular mobile communications system. Its performance
will also be dependent of required C/I (carrier-to-interfer-
ence) ratio for required system BER (Bit Error Rate) and the
cellular system frequency reuse factor of the network.
dB
+4
+1
-1
-6
- 30
(147 bits)
10 Ps 8 Ps 10 Ps 542.8 Ps
Time mask for normal duration bursts at GMSK modulation.
3
GSM Transmit signal characteristic
Every timeslot or ‘normal burst’ needs to fit in the
following time/power mask, with its controlled amplitude
level ranging between +5 to 33 dBm, at EGSM bands.
Therefore, the requirement is for 28 dB of effective
dynamic range at the different output power levels,
and the spectrum of the signal within its BW referred
to the noise floor or residual output power should be
of –59 dBc or –54 dBm, whichever is the greater.
GSM Transmiter architecture: Offset Phase Locked Loop (OPLL)
The GSMK constant envelope modulation scheme
enables, together with the use of saturated more efficient
power amplifiers, the use of a relatively simple offset PLL
Transmit architecture. The carrier frequency is modulated
without the need for an up conversion mixer. Modulation
information is on the phase content of the IQ modulator
output. The phase detector output of the Offset Phase
Locked Loop is a phase modulated constant amplitude
signal with a fixed offset voltage (corresponding to the
VCO RF carrier frequency). This signal contains the phase
modulation information and drives the TX VCO. Input to
the PA is a noise ‘clean’ signal from the low phase noise
VCO. The noise floor of the system is therefore determined
by the intrinsic PA noise performance. Noise limiting band
pass filtering at the PA input or output is not required.
This allows the use of a low-loss post PA output archi-
tecture, the only filtering requirement is for a LPF to stop
harmonics affecting receivers in nearby mobile phones. A
block diagram of an OPLL circuit is shown below.
t
10 Ps 8 Ps 10 Ps
The output of the TxVCO will typically have a tolerance
of ±2 dB with also typical nominal output power level of
around 5 dBm. At this stage the RF carrier with the modu-
lation information is ready to be amplified by the PA. With
a PA input power level of around 0 dBm, the power control
loop requirement is to control that power level following
the GSM specified power level steps from output power
of +5 to +33 dBm.
Voltage controlled PA
In order to illustrate the response of a GSM PA, we have
plotted the actual response of the Avago ACPM-7891
Tri-Band PA for the GSM, DCS and PCS bands versus control
voltage. The input to the PA would be a GMSK modulated
RF carrier of constant power level of 0 dBm and the PA
maximum output level is of around 35 dBm. Input RF
carrier and Vapc are both pulsed following the GSM TDMA
characteristic response. This is a period of 4.615 ms with
a duty cycle of 12.5% for standard GSM (1/8). The graphs
clearly reflect the characteristic output power with “output
power response of the PA against voltage control with a
steeper slope at lower power levels and flat gain response
when the PA gets into saturation.
ACPM-7891 response
40
35
30
25
OUTPUT POWER (dBm)
A relevant characteristic of the ACPM-7891 is the dynamic
range of approx 0.8 V between 0 to 35 dBm of output
power level. Any control loop system will require a high
level of discrimination in Vapc in order to accurately set
the correct output power level. This is a challenge for the
design of the power control loop as a few millivolts may
well represent a change of power level. Furthermore, at
low power levels the discrimination of Schottky diode
power detectors is at its lowest, making the resolution
even smaller.
Control loop theory
Automatic gain control (AGC)
AGC is widely used in communication systems to maintain
constant signal strength. As mentioned previously,
changes in performance of each individual PA, tolerances
in different components of the transmitter chain, supply
voltage variations and changes in performance across
frequency, are all intrinsic to the system at nominal tem-
perature. Some of them will be taken into account at the
phone alignment stage of the manufacturing process.
However, the main purpose of the alignment is to set a
look up table voltage values corresponding to different
controlled power levels. Generally changes of power level
across supply voltage and frequency range will not be cal-
ibrated in the phone alignment during the manufacturing

process. Mobile phone power level performance under

20 extreme conditions of voltage and temperature is left to
15
10
guaranteed component tolerances and to the automatic
5 gain control loop circuitry.
0
-5
-10
-15
-20
0 0.2 0.4 0.6 0.7 1 1.2 1.4 1.6 1.8 2 2.2 2.4
Vcontrol (V)

Modulator

Q(t)
Q(t)cos (2Sft + I)
Phase detector Loop filter Tx VCO PA

S/2 Tx IF Tx RF
6 I
BPF
Tx IF
I(t) I(t)sin (2Sft + I)

sin (2Sft + I)
/N /P Vcontrol

Offset mixer
VCO

4
Gain Control loop theory
A typical AGC loop is a feedback system comprising a
forward gain stage (A), feedback gain (E) and a signal
comparison stage that generates a differential error
signal. AGC loop is analyzed in terms of its closed loop
gain (forward transfer function) and open loop gain. R(s)
is the input amplitude and C(s) represents the output
amplitude.
Vref
R(s) E(s) C(s)
6 A
(+)
( )
B(s)
E function is what determines its type. Poles are values
Control loop relevant equations are:
Close loop gain: C(s)/R(s) = A/(1+AE)
Open loop gain: B(s)/R(s) = AE
Characteristic equation: 1/(1+AE)
Response of an AGC loop to the system output amplitude
fluctuations –changes in C(s) value- depends on its closed
loop transfer function as the R(s) reference signal will be
fixed (fix characterized value at every output power level
of the mobile phone system). Variations in the forward gain
value (A) due to voltage supply, operating temperature or
drive reasons, is what will originate those amplitude fluc-
tuations at the output C(s). Control loop feedback gain (E)
has to be designed to respond to those amplitude fluc-
tuations and correct them in order to obtain a constant
steady state output signal C(s).
The question for the loop designer is to obtain a model of
the response of A in order to determine E so the system
keeps C(s) constant while meeting control loop stability
criteria (those criteria are discussed later).
All real amplifiers have a number of internally compen-
sated poles so that they can be represented as having a
single pole close above the higher operating frequencies.
The power amplifier in the loop can therefore be modeled
as having a transfer function with variable gain and a
dominant pole at frequencies above those operating fre-
quencies. This would be somewhere above 1 GHz in the
case of a GSM power amplifier.
Typical PA gain in the frequency domain:
Vs(Z) A(Vapc)jZ
= with its pole at Z = Za.
Ve (Z) Z ;
1+ j
Za
5
The design of E, in addition of the linear gain required to
optimize the response of the different components used
in the control loop (GSM systems will require an attenu-
ator, comparator and reference voltage source) might
require an integrator depending on the loop type. Each
integrator within the loop will add a pole:
In the frequency domain:
Vs(s) 1 1
= = ;
Ve(s) 1+ RCs 1+ RCjZ
j
with its pole at Z =
RC
In control theory, the number of poles of the transfer
of ‘s’ (jZ) that make the denominator of the closed loop
transfer function equal to ‘0’ (notice that this would be the
same as making the open loop transfer function equal to
‘-1’). The loop Type refers to the order of the open loop
transfer function pole. The number of poles required in
the open loop transfer function (AE) to obtain constant
output signal will be determined by the way the output
signal amplitude changes, it can generally follow a step,
ramp or parabolic function.
A loop with an amplitude variation following a step function
is of type 0 and needs no integrator in the open loop
transfer function. Amplitude variations following a ramp
function will characterize a loop type 1 which needs one in-
tegrator in the open loop transfer function and amplitude
variations following a parabolic function will characterize a
loop type 2 which would need two integrators.
It is important to note that with a non-continuous (due to
the characteristic TDMA time multiplexing) fast response
control loop, all changes in amplitude in the control loop
input can be regarded as instantaneous, hencethe control
loop is of type 0. In such cases, no integrator is required in
the feedback transfer function (E).
The loop design exercise will then be mainly about the
implementation of the comparator. Once the transfer
function of the comparator is determined, the adequate
op-amp implementation can be selected to meet the
characteristic loop gain and speed requirements.
Basic stability theory
Stability theory will be discussed only at a very elemen-
tary level. It is not the purpose of this paper to take this
complex issue into any real depth. However some basic
principles are highlighted below.
Control theory uses the root locus plane to represent the
zeros and poles of the open loop transfer function AE: it
can be represented as module and phase components AE
=(V + jZ). Vector positions across the frequency spectrum
will determine whether the system is potentially unstable
at any frequency. The control loop system will be unstable
when the following conditions are met:
_V_ > 1
I#S }
; I = arctn (Z/V)
+jZ
potentially
unstable
|AE|
I Power Sampling in a GSM mobile phone control loop
V
-1
-jZ
Graphically represented in the locus plane
The criterion for unconditional stability is that the
magnitude of the open loop gain AE must be less than unity
(0 dB) when the phase of the open loop gain is equal to S.
This is the Nyquist stability criterion. However it is difficult
to obtain reflect transfer function of non-linear elements
susc as power amplifiers and power detectors. We may
get S21 figures of a PA at a certain Vapc, but a mathemati-
cal model of gain against frequency can only be obtained
by mathematical curve fitting models. Traditional control
loop analysis is therefore somewhat unpractical.
Bode diagrams are used in telecommunications in order
to determine how close a system is to being unstable. This
represents the logarithmic magnitude and phase against
frequency of the open loop transfer function by giving a
graphical representation of Phase and Gain Margins.
Phase Margin (PM) = S + I (Z0)
Gain Margin (GM) = -20 log |AE (I=S)|
6
Stability requires PM > 0 and GM > 1. It is generally accepted
that any system needs to be designed in principle with
a minimum GM = 10 dB and PM = 45 degrees. In Type 1
control loops, the presence of two poles in the transfer
function with no zeros compensating each pole phase
shift, will add two S/2 degrees of phase shift. At certain
frequencies the PM will therefore be ±S and make the
system unstable. It has to be remembered that although
the mobile phone control loop is of Type 0, the presence
of a LPF to limit the loop BW will add an integrator to the
system. Stability needs therefore to be monitored as the
power amplifier transfer function may have phase shift
across some specific frequencies that could potentially
cause instability.
It is possible to represent S21 magnitude and phase values
across frequency and to determine graphically the phase
margin at GM=1. Values below S/4 will indicate that in
higher frequencies the system is potentially unstable.
Control loop design issues need to be linked to a specific
mobile transmitter radio design architecture. The first
step therefore should be to identify the ideal control loop
model with the components of the radio transmitter used
in mobile phone applications. There are three main factors
than need to be taken into account:
a) Output and feedback signals are at radio frequencies
but the voltage reference signal is DC. (Feedback
monitoring signals can be also obtained by PA current
sampling, which should be proportional to the PA
output power level. Those models are not discussed in
this document.)
b) The control loop system requires a mechanism to
convert the RF feedback into a DC signal to be compared
against the reference. Typical power sampling schemes
use Diode detectors that are intrinsically non-linear
(other linear detector techniques like logarithmic
detection can also be used with added complexity).
c) Gain non-linearity of the Power Amplifier under
different Vreference control conditions, and Schottky
Diode detector non-linear characteristic performance.
The block diagram below identifies the ideal control loop
components with those used on a mobile phone. There
is a Gain stage in the comparator (G in diagram) and tem-
perature compensation at the Detector diode stage (T in
diagram) for the diode detector Vf variation against tem-
perature.
Loop gain and bandwidth
The objective of the loop is to compensate for any varia-
tions at the Power Amplifier (A) due to changes in perfor-
mance, temperature or voltage supply under the presence
of a fixed voltage reference level ensuring that the output
power level C(s) is constant. This has to be achieved for a
number of power steps or fixed Vref levels. The non-linear
PA and Detector Diode response causes a variation of the
close loop gain C(s)/R(s) at different output power levels:
from a factor of 1 for output power level of 5 dBm to a
factor of 6 for output power level of 33 dBm. Those non-
linearities of detector and power amplifier dictate a high
level of discrimination at Vref for high power levels and
a very low level of discrimination for lower power levels.
The accuracy of the Vref voltage control source (DAC on
the mobile phone controller) needs to be enough for the
system to meet the tolerance requirements in GSM output
power level specifications. The GSM standards have taken
this into account and the tolerance at low power levels in
extreme conditions is approximately ±6 dB.
We have previously seen that another requirement of
GSM systems is for the carrier to meet a certain time mask.
The rising and falling envelope of any radio frequency
carrier will generate a transient spurious response.
Those need to be kept under certain limits, hence it is
necessary to ‘shape’ those profiles in order to minimize
the spurious emissions. The Vout reference DAC output
splits the 28 Ps of allocated time for the profiles into
a number of amplitude ‘towers’ or registers. Common
number of registers is sixteen, lasting for 1.75 μs each.
Therefore the system will require a BW of approximate-
ly twice the sampling speed of 571 kHz. Loop BW of
1–1.2 MHz are commonly accepted. This needs to be
taken into account by the loop design because there is a
need for limiting the loop BW and consequently reducing
feedback signals to the PA control input. A loop filter will
therefore be added to the system.
Comparator Power amplifier
Vref
R(s) E(s)
Output Power (dBm)
6
C 15
(+)
-10
-15
-20
(- ) Α 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4
Diode detector &
temperature compensation
Vout
B(s)
T
E Pinput
7
Control loop components
The required dynamic range of the control loop, wide
non-linearity of the response at block level (PA and power
detector) and variation with temperature of Vf at the diode
detector, make the control loop design an interesting
challenge. Three elements need to be correctly specified:
x Diode detector
To maximize its dynamic range to cover the input power
level, proper selection of its biasing conditions and input
power level needs to be made. Selection of the best-suited
coupler-coupling factor and adequate RF 50 : termina-
tion needs to be provided at the diode input. The output
load should guarantee the diode optimum functionality
by setting its through current. RF de-coupling capacitors
at the diode output will remove any RF signal and its
harmonics.
x Temperature compensation
There is a strong dependency with temperature of the
detector diode junction resistance (Rj) and consequently
with the forward voltage drop (Vf ). This difference of
voltage drop with temperature may add up to the rectified
RF signal with the consequent detection of the wrong
power level. The solution is to use an identical diode
working in the same way as the one used for RF detection,
and it should be biased in an identical way. Temperature
compensation of the offset term (RF detected) is obtained
if the bias current of each diode is equal. Different com-
pensation schemes circuits can be used with the diodes,
but the basic concept for compensation is to use the
identical Vf variation in temperature of one diode to com-
pensate for the variation in the other diode.
Two different temperature compensation schemes have
been used experimentally in an Avago control loop dem-
onstration board. One control loop uses a differential
model (900 MHz control loop) and the other one use a
feedback model (1800 MHz control loop). Both tempera-
ture compensation schemes worked well maintaining the
maximum variation from nominal condition below ±1 dB
at maximum power levels and meeting also the extreme
condition specifications at power level 17–19.
40
ACPM-7891 response
35
30
C(s)
25
20
10
5
0
-5
Vcontrol (V)
Coupler
x Comparator stage SAMPLE_#1
Frequency = 000 MHz
The desired response of the comparator can be easily Nominal Vbatt = 3.6 V
understood by using a graphic example. For a given Vref Feedback temperature compensation design
and three possible Comparator Voltage input signals, the
Pout (dBm)
output wanted signals should correspond one to each Max dB
Temp Vbatt: 3 V Vbatt: 3.6 V Vbatt: 4.2 V variation
other as per the diagram:
33.1 34 34.22 0.9
+55 25 25.15 25.24 0.15
9 9.7 10.2 0.7
24.8 24.94 25.01 0.14
+25 33.22 34.01 34.18 0.79
7.8 7.4 9 1.6
33.36 33.97 34.09 0.61
-20 24.3 24.44 24.52 0.14
3.5 4.7 5.3 1.2

Vref Vinput Voutput SAMPLE_#1

Frequency = 1800 MHz
The linear expression that corresponds to that wanted Nominal Vbatt = 3.6 V
response can be obtained by using an inverting op-amp Differential temperature compensation design
with non-inverting positive reference. Its transfer function
Pout (dBm)
is: Temp Vbatt: 3 V Vbatt: 3.6 V Vbatt: 4.2 V Max dB
variation
Vout = (Vref * Rf/Rn) + Vref – (Vinput * Rf/Rn). 30.14 30.91 31.2 0.77
+55 21.96 21.91 21.98 0.07
Appropriate values are given to Rf and Rn to achieve the 2.2 4.1 4.7 1.9
22 21.98 22.05 0.07
required signal gain. Below is a proposed design for a GSM +25 30.24 31.04 31.35 0.8
comparator used in a discrete control loop demoboard 2.9 4.6 5.1 1.7
30.38 31.33 31.69 0.95
designed at Avago. -20 22.07 22.02 22.1 0.08
3.2 4.9 5.4 1.7
33K
Conclusion
0R 100pF GSM transmitter system has been explained together
with a description of gain control closed loop theory and
VDETOUT
820R VCONTROL practical implementation of a power control circuitry of
-
4.7K a mobile phone transmitter. Loop type, gain, bandwidth
33pF + and stability have been discussed linked with a number of
180pF
10K specific mobile radio design considerations. The proposed
VBBREF 68pF
control loop design has been implemented with excellent
results using Avago E-pHEMT Power Amplifier, ACPM-
7891. Output power is controlled in 2 dB steps across the
required range and power level variations under extreme
conditions are well within specified tolerances.
The following tables summarise the results under nominal
and extreme conditions.

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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved.
AV02-2414EN - March 25, 2010