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Voltage Divider
Voltage Divider
**** 03/12/12 22:14:09 ******* PSpice Lite (April 2011) ******* ID# 10813 ****
CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "AJk.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT
SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_16.5_Lite\tools\PSpice\PSpice.ini file:
.lib "nomd.lib"
*Analysis directives: .TRAN 0 1000ns 0
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
**** INCLUDING SCHEMATIC1.net ****
* source AJ106
V_V1
N00067 0 20V
R_R1
R_R2
NODE VOLTAGE
NODE VOLTAGE
NODE VOLTAGE
NODE VOLTAGE
CURRENT
-1.333E-03 TOTAL POWER DISSIPATION 2.67E-02 WATTS
JOB CONCLUDE
**** 03/12/12 22:14:09 ******* PSpice Lite (April 2011) ******* ID# 10813 **** ** Profile:
"SCHEMATIC1-AJk" [ C:\OrCAD\OrCAD_16.5_Lite\tools\capture\AJ106PSpiceFiles\SCHEMATIC1\AJk.sim ]
****
******************************************************************************
Total job time (using Solver 1) =
.02
CIRCUIT DIAGRAM :
R1
5k
V1
20.00V
13.33V
20V
R2
10k
0
0V