An Improved Multiplicative Spread Spectrum Embedding Scheme for Data Hiding

Abstract
This work presents an improved multiplicative spread spectrum (IMSS) embedding scheme for data hiding. We first analyze the error probability of the conventional multiplicative spread spectrum (MSS) scheme and derive the corresponding channel capacity and security level. It is noted that the interference effect of the host signal causes the distribution leakage and contributes to the decoding performance degradation. Since the host signal and the decoder structure information are available at the encoder side, the proposed IMSS scheme exploits both the correlation between the host signal and the watermark signal and the decoder structure in embedding the bit information to reduce the host interference effect. We can show that, compared with MSS, the proposed IMSS maintains the simple decoder structure and does not require additional information for decoding. We also analyze the decoding performances of MSS and IMSS in the presence of additional Gaussian noise.

Aim
To design Improved Multiplicative Spread Spectrum Embedding Scheme using FPGA

Objective
The objectives of this works are, 1. Design of Improved Multiplicative Spread Spectrum Embedding Scheme using VHDL 2. Functional verification of Improved Multiplicative Spread Spectrum Embedding Scheme 3. Result analysis in terms of a. Area b. Power c. Speed

Tools to be used:
For functional simulation For synthesis and implementation Mentor Graphics ModelSim 6.5 or later Xilinx Incs Xilinx ISE 13.1or later version

For FPGA based implementation, the FPGA Details are,

Manufacturer Family FPGA Series Xilinx Spartan 3/Spartan 3E XC3S400PQ208/XC3S250EPQ208

For CPLD based implementation, the CPLD Details are,

Manufacturer Family CPLD Series Xilinx XC9500 XC9572-XL

HDL to be used:
VHDL/Verilog HDL

Project Report Details:

Soft copy of documents referred by our guide to do the project will be given to prepare the report.