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Goals
Understand how the von Neumann architecture is constructed. Understand how the von Neumann architecture works. Understand how to program in basic a assembly language.
Ladder of Abstraction
It is worth reminding ourselves how we got here:
Climbing up the ladder of abstraction, the process is to take the functional units of one level, combine them, and move this combined unit to the next unit of abstraction As we move to this new level, the level of subcomponents, we need to remember that this level is built from the components of previous levels
Sub-Components
At the onset, computers required hardware changes to work on new problems; some historians say that this early stage of programming was wiring. Clearly, requiring hardware changes with each new programming operation was timeconsuming, error-prone, and costly If you recall from the movie The Machine That Changed the World, one of the key contributors to computer evolution was John von Neumann
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Four Sub-Components
There are four sub-components in von Neumann architecture:
Memory Input/Output (called IO) Arithmetic-Logic Unit Control Unit
While only 4 sub-components are called out, there is a 5th, key player in this operation: a bus, or wire, that connects the components together and over which data flows from one sub-component to another Lets look at each sub-component in more detail
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Memory
As you already know, there are several different flavors of memory Why isnt just one kind used? Each type of memory represents cost/benefit tradeoffs between capability and cost
Memory Operations
Two basic operations occur within this subcomponent: a fetch operation, and a store. The fetch operation:
A cell address is loaded into the MAR. The address is decoded, which means that thru circuitry, a specific cell is located. The data contents contained within that cell is copied into another special register, called a Machine Data Register (MDR). Note that this operation is non-destructive that is, the data contents are copied, but not destroyed.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Memory Operations
The second memory operation is called a store.
The fetch is like a read operation; the store is like a write operation In the store, the address of the cell into which data is going to be stored is moved to the MAR and decoded. Contents from yet another special register, called an accumulator, are copied into the cell location (held in the MAR). This operation is destructive, meaning that whatever data was originally contained at that memory location is overwritten by the value copied from the accumulator.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Input and output devices are the least standardized of the various sub-components, which means that you have to pay extra special attention to make certain that your input or output devices are compatible with your machine.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
The ALU
The third component in the von Neumann architecture is called the Arithmetic Logic Unit. This is the subcomponent that performs the arithmetic and logic operations for which we have been building parts. The ALU is the brain of the computer.
The ALU
It houses the special memory locations, called registers, of which we have already considered. The ALU is important enough that we will come back to it later, For now, just realize that it contains the circuitry to perform addition, subtraction,multiplication and division, as well as logical comparisons (less than, equal to and greater than).
Control Unit
The last of the four subcomponents is the Control Unit. The control unit is the work horse that drives the fetch and execute cycle. Remember we said that in memory, a cell address is loaded into the MAR it is the control unit that figures out which address is loaded, and what operation is to be performed with the data moved to the MDR. We will come back and look in detail at how the Control Unit performs this task.
Engineering Needs
We indicated that for cost/benefit reasons, data and program instructions are translated into binary form and stored in RAM. As the information is needed, it is moved to the high speed, costlier registers where it is processed. This process occurs in a cycle: fetch information to the registers, and execute it there, fetch the next information from the registers, and execute it, etc. The cycle is referred to as the fetch execute cycle.
Engineering Needs
Once we know on which data we should be working, we know how to build circuitry to perform processing operations. (We can add, subtract, divide and compare). One of the things we glossed over in our first discussion, however, is how we figure out what data to be working on, and exactly which operation to perform Specifically, this is what we need to be able to do: Build a circuit that will allow us to take whatever number is in the MAR, and use this number to access a specific memory cell. Build a circuit that will allow us to choose which data results should be placed in the MDR.
Decoder Circuits
The MAR is connected to a decoder circuit. This circuitry will identify the correct memory cell. Lets figure out how this works
Decoder Circuits
Initially, think about the decoder circuit as a black box. Going into the black box are N input lines, (which emerge from the MAR). Going out of the black box are 2n output lines (with each output line connecting to a specific memory cell in RAM).
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
d0
d1
d2
d3
0
0 1 1
0
1 0 1
1
0 0 0
0
1 0 0
0
0 1 0
0
0 0 1
d2
d3 a
MAR
d2
d3 a
MAR
4 * 16 decoder
Scaling Issue
We have built a viable decoder circuit, and illustrated how this control circuit could perform in translating between the address label contained in the MAR and obtaining contents of the referenced location. At some point, however, the model isnt scaleable too much space required for a linear layout. Computers utilize a 2-dimensional approach in decoder operation, using a row/column MAR addressing scheme to identify specific address locations. A 2-D grid is illustrated on the next slide
Multiplexor Circuits
Remember, we said that the ALU actually performs all operational processing on 2 given inputs. Thus, if the inputs are 4 and 2, calculations for 4 + 2, 4 * 2, 4-2, 4 >= 2, etc. are all performed in parallel. What we need to be able to do is to select the correct answer from among all those calculated.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Multiplexor Circuits
A multiplexor is a circuit with 2n input lines and 1 output line. The function is serves is to select exactly one of its input lines and copy the binary value on that input line to its single output line.
Multiplexor Magic
The multiplexor chooses the correct input line to pass thru to the output line by using a second set of N lines called selector lines. So, the total number of input lines in a multiplexor are 2n + N. The first set of input lines are numbered from 0 to 2n-1, while the selector lines are numbered from 0 to N, such that there is exactly one selector line for each input line. Each selector line can be set to either a 1 or a 0. Thus, the binary number that appears on the selector lines can be interpreted as the identification number of the input line to be passed thru.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Multiplexor Circuit
Toolset
Lets look at the toolset first, and then how it is deployed Special Memory Registers
The Control Unit must keep track of where it is within a program, and what it should do next Two special registers are used to accomplish this:
A program counter, typically referred to as a PC, holds the address of the NEXT instruction to be executed An instruction register, typically referred to as an IR, holds an instruction fetched from memory
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Toolset (Two)
Along with the special registers, the Control Unit utilizes special circuitry, called an instruction decoder The instruction decoder is a typical decoder circuit, and its purpose is to read an instruction from the IR, and activate the appropriate circuit line
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Sample Instructions
Instructions fall into several main categories: data transfer, arithmetic, comparisons, and branching Some typical instructions might include: Load Storeh Move Add Compare Branch Halt Each of these instructions would be given a unique code, such as 000, 001, 010, etc.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Interpreting an Instruction
Imagine a machine with an instruction set of 8 individual instructions, numbered from 000 to 111. Our IR would need to be 3 bits big. More realistically, a modern pc today is likely to have 30-50 instructions,but we will keep our model simple.
N301: Fundamental Computer Science Concepts
Copyright 2004 Department of Computer & Information Science
Typical Instructions
Imagine the following instruction
100 01010 10011
Lets say the 100 means to perform an ADD operation. The 01010 would refer to the address location of the first data element to be added. The 10011 would refer to the address location of the second data element to be added. So this instruction would mean: Add the contents of address location 01010 to 10011.
Completing a Program
When one instruction has been executed, the fetch execute cycle moves to the next address It can do this because the PC was incremented to reflect the address location of the next executable address In this way, a series of machine level instructions can be executed, one at a time
Questions?