Professional Documents
Culture Documents
Compal Confidential
2
2006-04-05
REV: 1.0
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cover Page
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
of
43
Compal Confidential
Thermal Sensor
F75383M
Yonah
Fan Control
page 35
Clock Generator
ICS951413
page 4
uPGA-478 Package
page 12
page 4,5
1
H_A#(3..31)
LCD Conn.
page 18
PSB
533/667MHz
H_D#(0..63)
page 19
Memory BUS(DDRII)
LVDS
ATI RC410MB/D/E
Single Channel
PCI-Express
BANK 0, 1, 2, 3
page 10,11
uFCBGA-1466
Mini card
200pin DDRII-SO-DIMM X2
page 7,8,9
page 25
Alink
USB conn x4
Bluetooth
Conn page
page 26
PCI BUS
3.3V 33 MHz
IDSEL:AD18
(PIRQF/H#,
GNT#3,
REQ#3)
IDSEL:AD22
(PIRQG#,
GNT#1,
REQ#1)
Mini PCI
socket
ATI SB460M
3.3V ATA-100
CardBus
RTL8100/8110
ENE CB714
page 13~~17
HD Audio
IDE
S-ATA
PIDE-HDD
Conn.
page 21
page 23
31
USB port1
3.3V 48MHz
3.3V 24.576MHz/48Mhz
IDSEL:AD20
(PIRQE#/B#,
GNT#2,
REQ#2)
LAN (100/1000)
(WLAN)
(TV-Tuner)
SIDE-ODD
page 20
page 20
MDC 1.5
Conn
HDA Codec
ALC883
page 31
page 33
page 25
RJ45
Slot 0
page 24
page 22
S-ATA HDD
Conn.
6 in 1
socket
page 15
page 22
Audio AMP
LPC BUS
page 34
RTC CKT.
Super I/O
ENE KB910Q
page 13
page 32
page 34
SMsC LPC47N207
page 29
Phone Jack x3
page 28
Switch/B Conn.
USB port4, 6
page 31
Touch Pad
page 32
Int.KBD
FIR
page 30
TFDU6102-TR3
CD-PLAY/B Conn.
page 31
page 28
EC I/O Buffer
page 30
BIOS
page 30
MEDIA/B Conn.
page 31
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
of
43
SIGNAL
STATE
Voltage Rails
Full ON
+VALW
+V
+VS
Clock
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
Power Plane
Description
S1
S3
S5
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
VIN
N/A
N/A
N/A
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
B+
N/A
N/A
N/A
+CPU_CORE
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
+0.9VS
ON
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
+1.05VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
Vcc
Ra/Rc/Re
+3VALW
ON
ON
ON*
Board ID
+3VS
ON
OFF
OFF
+5VALW
ON
ON
ON*
+5VS
ON
OFF
OFF
+VSB
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
0
1
2
3
4
5
6
7
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
IDSEL#
CardBus(SD)
AD20
PIRQE/PIRQH
1394
AD16
PIRQA
LAN(10/100)
AD22
PIRQG
AD18
PIRQF/PORQH
Mini-PCI(WLAN/TV-Tuner)
EC SM Bus1 address
3
Device
Address
Smart Battery
0001 011X b
REQ#/GNT#
Interrupts
EC SM Bus2 address
SKU ID
0
1
2
3
4
5
6
7
1001 100X b
1001 101X b
Address
Clock Generator
(ICS951413)
1101 001Xb
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
0.2
0.2
BOM Structure
8100C@
8110S@
FIR@
MINI1@
SATA@
4IN1@
SKU ID Table
Address
Device
Fintek F75383M
BTO Item
LAN(10/100)
LAN(GIGA)
FIR
MINI CARD1
SATA HDD
CardReader
PCB Revision
Board ID
0
1
2
3
4
5
6
7
BOARD ID Table
SKU
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Notes List
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
of
43
H_RS#[0..2]
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_TRDY#
C
(13) H_PWRGOOD
(14) H_CPUSLP#
@ R20
2
2
1K_0402_5%
1
1 R22
51_0402_1%
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
F3
F4
G3
G2
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
BPM0#
BPM1#
BPM2#
BPM3#
ITP_DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
T2
PAD
T3
PAD
PROCHOT#
C20
E1
B5
E5
D24
AC2
AC1
D21
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
D6
D7
AC5
AA6
AB3
C26
D25
AB5
AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
THERMDA
THERMDC
A24
A25
C7
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
MISC
H23
M24
W24
AD23
G22
N25
Y25
AE24
THERMAL
DIODE
A6
A5
C4
B3
C6
B4
STPCLK#
SMI#
D5
A3
LEGACY CPU
THERMDA
THERMDC
THERMTRIP#
EC_SMB_CK2 (28)
D+
SDATA
EC_SMB_DA2 (28)
THERMDC
D-
ALERT#
GND
+1.05VS +CPU_CORE
R1
R2
47K_0402_5%
@ 47K_0402_5%
C3
1
@
THERM#
F75383M_MSOP8
MAINPWON (14,36,37,39)
C
Q1
2
B
E
0.1U_0603_25V7K
2SC2411K_SC59
56_0402_5%
1
2
R4
+1.05VS
H_THERMTRIP#
+3VALW
1
+1.05VS
+1.05VS
1K_0402_5%
R5
R9 0_0402_5%
1
R8
56_0402_5%
75_0402_1%
H_PROCHOT# (14,42)
R10 470_0402_5%
2
1
2
B
2SC2411K_SC59
Q3
Q2
PMBT3904_SOT23
2
B
DPRSLPVR (13,42)
E
PROCHOT#
C
+1.05VS
@ 2
H_DPRSTP#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
(7)
(7)
(7)
(7)
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DSTBP#[0..3] (7)
H_A20M# (13)
H_FERR# (13)
H_IGNNE# (13)
H_INIT#
(13)
H_INTR
(13)
H_NMI
H_STPCLK# (13)
H_SMI#
(13)
FOX_PZ47903-2741-42_YONAH
1 @
ITP_TMS
R13
ITP_TDO
R15
2
R14
2
H_BR0#
R16
2 200_0402_5%
H_IERR#
R17
1 56_0402_5%
54.9_0402_1%
40.2_0402_1%
(13)
+3VALW
2 180P_0402_50V8J
H_INIT#
R18
2 @ 390_0402_5%
2 180P_0402_50V8J
H_A20M#
R19
2 @ 390_0402_5%
C6
2 180P_0402_50V8J
H_CPUSLP#
R23
2 200_0402_5%
C7
2 180P_0402_50V8J
H_INTR
R24
2 @ 390_0402_5%
C8
2 180P_0402_50V8J
H_NMI
R26
2 @ 390_0402_5%
ITP_TRST#
C9
2 180P_0402_50V8J
H_SMI#
R28
2 @ 390_0402_5%
ITP_TCK
C10
2 180P_0402_50V8J
H_STPCLK#
R30
2 @ 390_0402_5%
C11
2 180P_0402_50V8J
H_IGNNE#
R31
2 @ 390_0402_5%
C12
2 180P_0402_50V8J
H_PWRGOOD
R32
1 332_0402_1%
C13
2 180P_0402_50V8J
H_FERR#
R33
1 56_0402_5%
H_DPSLP#
R34
2 200_0402_5%
ITP_DBRESET#
2006/11/30
Deciphered Date
2
R21
R27
R29
1
150_0402_5%
Title
27.4_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
2
680_0402_5%
1
150_0402_5%
1 @ 54.9_0402_1%
+1.05VS
C5
Security Classification
56_0402_5%
C4
Issued Date
R11
R12
H_DSTBN#[0..3] (7)
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
0_0402_5%
2
1 H_NMI
R25
H_STPCLK#
H_SMI#
H_RESET#
ITP_TDI
H_THERMTRIP#
R7
H_DPRSTP# 2
R6
470_0402_5%
ADM1032ARMZ-2REEL_MSOP8
SCLK
J26
M26
V23
AC20
CONTROL
VDD
THERMDA
DINV0#
DINV1#
DINV2#
DINV3#
HOST CLK
BCLK0
BCLK1
AD4
AD3
AD1
AC4
(7)
H_DBSY#
(13,14) H_DPSLP#
(42) H_DPRSTP#
(7) H_DPWR#
A22
A21
2200P_0402_50V7K
U1
ADSTB0#
ADSTB1#
DATA GROUP
C2
L2
V4
ADDR GROUP
C1
0.1U_0402_16V4Z
1
2
H_ADSTB#0
H_ADSTB#1
+3VS
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
(7)
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
(7)
H_LOCK#
(7,13) H_RESET#
(7)
K3
H2
K2
J3
L5
CLK_CPU_BCLK
CLK_CPU_BCLK#
(12) CLK_CPU_BCLK
(12) CLK_CPU_BCLK#
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
YONAH
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_ADSTB#0
H_ADSTB#1
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
(7)
(7)
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
(7) H_REQ#[0..4]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_D#[0..63] (7)
JCPU1A
H_A#[3..31]
(7)
Sheet
1
Rev
0.4
4
of
43
VCCSENSE
VSSENSE
R35 1
R36 1
AF7
AE7
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
H_PSI#
AE6
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
20mils
+1.5VS
+1.05VS
+1.05VS
C14
10U_0805_10V4Z
R_A
C15
0.01U_0402_16V7K
R37
1K_0402_1%
+GTL_REF0
R_B
2K_0402_1%
R38
(42)
(42)
(42)
(42)
(42)
(42)
(42)
(42)
H_PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD26
+GTL_REF0
(12) CPU_BSEL0
(8,12) CPU_BSEL1
(12) CPU_BSEL2
R39
R40
R41
R42
CPU_BSEL
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
133
166
1
1
1
1
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
+CPU_CORE
JCPU1C
JCPU1B
2 100_0402_1%
2 100_0402_1%
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
YONAH
(42) VCCSENSE
(42) VSSENSE
+CPU_CORE
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
YONAH
POWER, GROUND
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
FOX_PZ47903-2741-42_YONAH
FOX_PZ47903-2741-42_YONAH
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
5
Sheet
1
Rev
0.4
5
of
43
+CPU_CORE
1
C16
22U_0805_6.3V6M
1
C17
22U_0805_6.3V6M
1
C18
22U_0805_6.3V6M
1
C19
22U_0805_6.3V6M
1
C20
22U_0805_6.3V6M
1
C21
22U_0805_6.3V6M
1
C22
22U_0805_6.3V6M
1
C23
22U_0805_6.3V6M
1
C24
22U_0805_6.3V6M
C25
22U_0805_6.3V6M
+CPU_CORE
1
C26
22U_0805_6.3V6M
1
C27
22U_0805_6.3V6M
1
C28
22U_0805_6.3V6M
1
C29
22U_0805_6.3V6M
1
C30
22U_0805_6.3V6M
1
C31
22U_0805_6.3V6M
1
C32
22U_0805_6.3V6M
1
C33
22U_0805_6.3V6M
1
C34
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
+CPU_CORE
1
C36
22U_0805_6.3V6M
1
C37
22U_0805_6.3V6M
1
C38
22U_0805_6.3V6M
1
C39
22U_0805_6.3V6M
1
C40
22U_0805_6.3V6M
C41
22U_0805_6.3V6M
+CPU_CORE
1
C
1
C42
22U_0805_6.3V6M
1
C43
22U_0805_6.3V6M
1
C44
22U_0805_6.3V6M
1
C45
22U_0805_6.3V6M
1
C46
22U_0805_6.3V6M
C47
22U_0805_6.3V6M
+ C50
2
9mOhm
7343
PS CAP
2006/02/13
1
+ C51
@
2
330U_D2E_2.5VM_R9
+ C49
330U_D2E_2.5VM_R9
+ C48
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
+CPU_CORE
1
+ C52
@
2
H=1.9mm
1
+ C53
H=1.9mm
C54
330U_D2E_2.5VM_R9
+1.05VS
1
+
2
C55
2 0.1U_0402_16V4Z
C56
2 0.1U_0402_16V4Z
C57
2 0.1U_0402_16V4Z
C58
2 0.1U_0402_16V4Z
C59
2 0.1U_0402_16V4Z
C60
0.1U_0402_16V4Z
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
5
Rev
0.4
Sheet
1
of
43
H_D#[0..63] (4)
H_DINV#[0..3] (4)
H_DSTBN#[0..3] (4)
H_DSTBP#[0..3] (4)
(4)
H_A#[3..31]
(4) H_REQ#[0..4]
(4)
H_RS#[0..2]
H_ADSTB#1
(4)
(4)
(4)
(4)
(4)
(4)
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
F25
F24
E23
E25
G24
F23
CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
(4)
H_LOCK#
E27
CPU_LOCK#
C11
D23
G23
E26
CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#
F22
D26
E24
CPU_TRDY#
CPU_HIT#
CPU_HITM#
(4,13) H_RESET#
(4)
(4)
(4)
H_RS#2
H_RS#1
H_RS#0
H_TRDY#
H_HIT#
H_HITM#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#
C19
C23
C20
C22
B22
B23
C21
B24
E21
B21
B20
G19
F21
B19
E20
D21
A21
D22
E22
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DINV#1
H_DSTBN#1
H_DSTBP#1
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#
C18
F19
E19
A18
D19
B18
C17
B17
E17
B16
C15
A15
B15
F16
G18
F18
C16
D18
E18
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DINV#2
H_DSTBN#2
H_DSTBP#2
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#
E16
D16
C14
B14
E15
D15
C13
E14
F13
B13
A12
C12
E12
D13
D12
B12
E13
F15
G15
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DINV#3
H_DSTBN#3
H_DSTBP#3
CPU_COMP_P
H22
CPU_VREF
D25
E11
G22
RESERVED0
RESERVED1
CPU_DPWR#
Place C close
to Ball H22
DATA
GROUP 3
C69
220P_0402_50V7K
MISC.
+CPU_VREF
1
216CPP4AKA21HK_BGA707
(4)
H_BR0#
(4)
H_DPWR#
GFX_RX1N
GFX_RX1P
GFX_TX1N
GFX_TX1P
R2
P2
L5
L6
GFX_RX2N
GFX_RX2P
GFX_TX2N
GFX_TX2P
T1
R1
M4
M5
GFX_RX3N
GFX_RX3P
GFX_TX3N
GFX_TX3P
U2
T2
P4
N4
GFX_RX4N
GFX_RX4P
GFX_TX4N
GFX_TX4P
V1
V2
P5
P6
GFX_RX5N
GFX_RX5P
GFX_TX5N
GFX_TX5P
W2
W1
R4
R5
GFX_RX6N
GFX_RX6P
GFX_TX6N
GFX_TX6P
AA2
Y2
T3
T4
GFX_RX7N
GFX_RX7P
GFX_TX7N
GFX_TX7P
AB1
AA1
U5
U6
GFX_RX8N
GFX_RX8P
GFX_TX8N
GFX_TX8P
AC2
AB2
V4
V5
GFX_RX9N
GFX_RX9P
GFX_TX9N
GFX_TX9P
AD1
AD2
W3
W4
GFX_RX10N
GFX_RX10P
GFX_TX10N
GFX_TX10P
AE2
AE1
Y5
Y6
GFX_RX11N
GFX_RX11P
GFX_TX11N
GFX_TX11P
AG2
AF2
AA4
AA5
GFX_RX12N
GFX_RX12P
GFX_TX12N
GFX_TX12P
AH1
AG1
AB3
AB4
GFX_RX13N
GFX_RX13P
GFX_TX13N
GFX_TX13P
AJ2
AH2
AC5
AC6
GFX_RX14N
GFX_RX14P
GFX_TX14N
GFX_TX14P
AJ4
AJ3
AD4
AD5
GFX_RX15N
GFX_RX15P
GFX_TX15N
GFX_TX15P
AJ5
AK4
10 mils
10 mils
10 mils
10 mils
GFX_CLKN
GFX_CLKP
M1
M2
AJ12
AK13
AG12
AH12
PCE_ISET
PCE_TXISET
PCE_NCAL
PCE_PCAL
NB_A_TXN0
NB_A_TXP0
NB_A_TXN1
NB_A_TXP1
AJ11
AJ10
AK10
AK9
SB_TX0N
SB_TX0P
SB_TX1N
SB_TX1P
AG10
AG9
AF10
AE9
SB_RX0N
SB_RX0P
SB_RX1N
SB_RX1P
L2
K2
SB_CLKN
SB_CLKP
Place R
Close to Ball
+1.2VS
10K_0402_1% 2
8.25K_0402_1%2
82.5_0402_1% 2
150_0402_1% 2
SB_A_RXN0
SB_A_RXP0
SB_A_RXN1
SB_A_RXP1
C64
C66
C67
C68
1
1
1
1
1
1
1
1
R43
R44
R45
R46
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCE_RXISET
PCE_TXISET
PCE_NCAL
PCE_PCAL
NB_A_RXN0
NB_A_RXP0
NB_A_RXN1
NB_A_RXP1
(12) CLK_NB_ALINK#
(12) CLK_NB_ALINK
GPP_TX0N/SB_TX2N
GPP_TX0P/SB_TX2P
GPP_TX1N/SB_TX3N
GPP_TX1P/SB_TX3P
GPP_TX2N
GPP_TX2P
GPP_TX3N
GPP_TX3P
GPP_RX0N/SB_RX2N
GPP_RX0P/SB_RX2P
GPP_RX1N/SB_RX3N
GPP_RX1P/SB_RX3P
GPP_RX2N
GPP_RX2P
GPP_RX3N
GPP_RX3P
AJ9
AJ8
AF6
AE6
AK6
AJ6
AF4
AE4
AG8
AF8
AG7
AG6
AJ7
AK7
AH4
AG4
NB_A_TXN2 0.1U_0402_16V7K
NB_A_TXP2 0.1U_0402_16V7K
NB_A_TXN3 0.1U_0402_16V7K
NB_A_TXP3 0.1U_0402_16V7K
PCIE_WLAN_TX_N1
PCIE_WLAN_TX_P1
NB_A_RXN2
NB_A_RXP2
NB_A_RXN3
NB_A_RXP3
PCIE_WLAN_C_RX_N1
PCIE_WLAN_C_RX_P1
2
2
2
2
1
1
1
1
C61
C62
C63
C65
CPU_VREF
Trace=12Mil
Space=15Mil
PCIE_WLAN_C_RX_N1 (25)
PCIE_WLAN_C_RX_P1 (25)
3
216CPP4AKA21HK_BGA707
SB_A_RXN[0..3]
SB_A_RXP[0..3]
SB_A_RXN[0..3] (13)
SB_A_RXP[0..3] (13)
NB_A_RXN[0..3]
NB_A_RXP[0..3]
NB_A_RXN[0..3] (13)
NB_A_RXP[0..3] (13)
PCIE_WLAN_TX_N1
C70
2 0.1U_0402_16V7K
PCIE_WLAN_C_TX_N1
PCIE_WLAN_TX_P1
C71
2 0.1U_0402_16V7K
PCIE_WLAN_C_TX_P1
PCIE_WLAN_C_TX_N1 (25)
PCIE_WLAN_C_TX_P1 (25)
R49
49.9_0402_1%
1U_0402_6.3V4Z
+CPU_VREF
R50
100_0402_1%
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
A
SB_A_RXN2
SB_A_RXP2
SB_A_RXN3
SB_A_RXP3
To SB A-PCIE Link
+1.05VS
C72
L4
K4
B11
49.9_0402_1%
N2
N1
CPU_COMP_N
GFX_TX0N
GFX_TX0P
D11
GFX_RX0N
GFX_RX0P
+1.05VS
2
1 R47 HSCOMP
24.9_0402_1%
2
1 R48 HRCOMP
J4
J5
PCI EXPRESS
I/F
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DINV#0
H_DSTBN#0
H_DSTBP#0
PART 3 OF
6
DATA GROUP
0
DATA GROUP
1
PART 1 OF
6
E28
D28
D29
C29
D30
C30
B29
C28
C26
B25
B27
C25
A27
C24
A24
B26
C27
A28
B28
(4)
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#
A-LINK EXPRESS
I/F
M28
K29
K30
J26
L28
L29
M30
K27
M29
K26
N28
L26
N25
L25
N24
L27
DATA GROUP
2
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_ADSTB#0
U2C
ADDR.
GROUP 1
(4)
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#
CONTROL
G28
H26
G27
G30
G29
G26
H28
J28
H25
K28
H29
J29
K24
K25
F29
G25
F26
F28
E29
H27
ADDR.
GROUP 0
U2A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
Sheet
E
of
Rev
0.4
43
U2B
(11) EMC_DDR_CLK3#
(11) EMC_DDR_CLK3
MEM_CK3N
MEM_CK3P
+DDR_VREF
(11) EMC_DDR_CLK4#
(11) EMC_DDR_CLK4
AG17
AF17
MEM_CK4N
MEM_CK4P
W29
W28
AH20
AJ20
AE24
AE21
MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
AH29
AG29
AH28
AF29
AG30
AE28
AC30
Y30
AD28
AJ14
N30
AJ15
AE29
AB27
MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM_ODT0
MEM_ODT1
MEM_ODT2/RSV2
MEM_ODT3/RSV3
MEM_VMODE
MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
MEM_VREF
DDR_DQS#0
DDR_DQS0
AH17
AJ18
MEM_DQS0N
MEM_DQS0P
DDR_DQS#1
DDR_DQS1
AF15
AE14
MEM_DQS1N
MEM_DQS1P
DDR_DQS#2
DDR_DQS2
AE22
AF22
MEM_DQS2N
MEM_DQS2P
C75
(10)
(10)
(10,11)
(10,11)
DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3
DDR_SCS#0
DDR_SCS#0
DDR_SCS#1
DDR_SCS#1
DDR_SCS#2
DDR_SCS#2
DDR_SCS#3
DDR_SCS#3
DDR_ODT0
DDR_ODT0
DDR_ODT1
DDR_ODT1
DDR_ODT2
DDR_ODT2
DDR_ODT3
DDR_ODT3
R60
1
2 1K_0402_5%
+1.8V
MEM_CAP1
10mil
MEM_CAP2
10mil
MEM_VMODE: 1.8V: DDR2
MEM_COMPP
10mil
MEM_COMPN
10mil
+DDR_VREF
20mil
(10)
(10)
(10,11)
(10,11)
(10)
(10,11)
(10)
(10,11)
R62
C76
MEM_COMPN
MEM_COMPP
MEM_CAP1
MEM_CAP2
1
0.47U_0603_16V4Z
R67
0.47U_0603_16V4Z
C77
61.9_0603_1%
1
61.9_0603_1%
1
+1.8V
DDR_DQS#3
DDR_DQS3
AF26
AE25
MEM_DQS3N
MEM_DQS3P
DDR_DQS#4
DDR_DQS4
W26
W27
MEM_DQS4N
MEM_DQS4P
DDR_DQS#5
DDR_DQS5
AB30
AB29
MEM_DQS5N
MEM_DQS5P
DDR_DQS#6
DDR_DQS6
R25
P25
MEM_DQS6N
MEM_DQS6P
DDR_DQS#7
DDR_DQS7
R30
R29
MEM_DQS7N
MEM_DQS7P
AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28
RSET
1 R51
2
715_0402_1%
B10
15mil
NB_DDC_CLK
NB_DDC_DATA
(19) NB_DDC_CLK
(19) NB_DDC_DATA
1C73
@ 15P_0402_50V8D
R52 2
1NB_14M
10_0402_5%
DACHSYNC
DACVSYNC
RSET
B2
C2
DACSCL
DACSDA
G1
OSCIN
F1
OSCOUT
(12) EMC_CLK_NB_14M
1
R56
(12) EMC_CLK_NB_BCLK
(12) EMC_CLK_NB_BCLK#
R58
2
G2
10K_0402_5% TVCLKIN
J1 CPU_CLKP
K1 CPU_CLKN
NB_EDID_CLK
NB_EDID_DATA
NB_DVI_DDCDATA
STRP_DATA
TESTMODE
(18) NB_EDID_CLK
(18) NB_EDID_DATA
D2
C1
H3
D1
C4
AH13
AJ13
133MHZ
+3VS
21
NB_PWRGD (15)
BM_REQ# (13)
+1.8V
2006/03/31
NB_SUS_STAT# (14,29)
CH751H-40_SC76
D2
2
4.7K_0402_5%
NB_EDID_DATA
1 R64
2
1 NB_RST#
CH751H-40_SC76
1 R66
2
4.7K_0402_5%
3
U3A
3
O
B
ENBKL
(28)
7
+3VS
NB_PWRGD
+3VALW
4
LVDS_ENVDD
SB_PWRGD# (15)
U3B
O
NB_ENVDD (18)
4
SN74LVC08APW_TSSOP14
1
2
R72
2K_0402_1%
1
4.7K_0402_5%
R75
C
2 2
1 R77
B 4.7K_0402_5%
NB_RST# (13)
R59
2005/12/21
Q4
2SC2411K_SC59
4.7K_0402_5%
R74
+1.05VS
CPU_BSEL1 (5,12)
Security Classification
Issued Date
E
3
J2
2 @ 4.7K_0402_5%
2 @ 4.7K_0402_5%
10K_0402_5%
4.7K_0402_5%
NB_DVI_DDCDATA
1 R65
2
NB_DDC_CLK
+1.05VS
2 4.7K_0402_5%
2SC2411K_SC59
TMDS_HPD
2005/12/21
2 4.7K_0402_5%
R76 1
4.7K_0402_5%
Q5
BM_REQ#
SUS_STAT#
BMREQ#
H2
4.7K_0402_5%
NB_EDID_CLK
1 R63
2
4.7K_0402_5%
R68 1
2
4.7K_0402_5%
R69 1
2
STRP_DATA
1
1
EMC_NB_CRT_HSYNC
NB_RST#
SUS_STAT#
NB_PWRGD
EMC_NB_TXCLK- (18)
EMC_NB_TXCLK+ (18)
SN74LVC08APW_TSSOP14
R73 1
A3
AH14
E3
+3VS
EMC_NB_CRT_VSYNC
EMC_NB_TXCLKEMC_NB_TXCLK+
(18)
(18)
(18)
(18)
(18)
(18)
R71 1
EMC_NB_TXOUT0EMC_NB_TXOUT0+
EMC_NB_TXOUT1EMC_NB_TXOUT1+
EMC_NB_TXOUT2EMC_NB_TXOUT2+
216CPP4AKA21HK_BGA707
LVDS_ENBKL
BM_REQ#
2 4.7K_0402_5%
LVDS_ENBKL 1 R53
LVDS_ENVDD 1
R54
EMC_NB_TZCLK- (18)
EMC_NB_TZCLK+ (18)
R61
220K_0402_1%
D1
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
@
R70 1
G3
E2
F2
EMC_NB_TZCLKEMC_NB_TZCLK+
+3VALW
EMC_NB_CRT_VSYNC
1
0
LVDS_BLON
LVDS_DIGON
LVDS_BLEN
14
EMC_NB_CRT_HSYNC
0
0
EMC_NB_TXOUT0EMC_NB_TXOUT0+
EMC_NB_TXOUT1EMC_NB_TXOUT1+
EMC_NB_TXOUT2EMC_NB_TXOUT2+
SYSRESET#
SUS_STAT#
POWERGOOD
NB STRAPING PINS
166MHZ
E5
F5
D5
C5
E6
D6
E7
E8
G6
F6
I2C_CLK
I2C_DATA
DDC_DATA
STRP_DATA
TESTMODE
THERMALDIODE_P
THERMALDIODE_N
216CPP4AKA21HK_BGA707
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
+3VS
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
C3
B3
(19) EMC_NB_CRT_HSYNC
(19) EMC_NB_CRT_VSYNC
LVDS
BLUE
PART 4 OF
6
(19) EMC_NB_CRT_B
CRT &
TV I/F
GREEN
D10
(18)
(18)
(18)
(18)
(18)
(18)
MEM_CK2N
MEM_CK2P
E10
14
C74
RED
(19) EMC_NB_CRT_G
EMC_NB_TZOUT0EMC_NB_TZOUT0+
EMC_NB_TZOUT1EMC_NB_TZOUT1+
EMC_NB_TZOUT2EMC_NB_TZOUT2+
V29
V30
AC24
AC23
F10
EMC_NB_TZOUT0EMC_NB_TZOUT0+
EMC_NB_TZOUT1EMC_NB_TZOUT1+
EMC_NB_TZOUT2EMC_NB_TZOUT2+
MEM_CK1N
MEM_CK1P
COMP
(19) EMC_NB_CRT_R
B4
A4
B5
C6
B6
A6
B7
A7
F7
F8
AF16
AE16
E9
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
(10) EMC_DDR_CLK1#
(10) EMC_DDR_CLK1
MEM_CK0N
MEM_CK0P
D9
RC410MD
0.1U_0402_10V6K
AC26
AC25
F9
R57
(10) EMC_DDR_CLK0#
(10) EMC_DDR_CLK0
2
75_0402_1%
2
75_0402_1%
2
75_0402_1%
1K_0402_1%
2
1
R55
0.1U_0402_10V6K
1K_0402_1%
+1.8V
MEM_RAS#
MEM_CAS#
MEM_WE#
1
R262
1
R263
1
R264
CLK.
GEN.
(10,11) DDR_SRAS#
(10,11) DDR_SCAS#
(10,11) DDR_SWE#
AJ29
AG28
AH30
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
DDR_SMA[0..17] (10,11)
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
1.8K_0402_5%
DDR_SMA[0..17]
DATA
DDR_DM[0..7] (10,11)
U2D
PART 2
OF 6
DDR_DM[0..7]
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17
DDR_DQS#[0..7] (10,11)
AK27
AJ27
AH26
AJ26
AH25
AJ25
AH24
AH23
AJ24
AJ23
AH27
AH22
AJ22
AF28
AJ21
AG27
AJ28
AH21
ADDRESS
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SMA13
DDR_SMA14
DDR_SMA15
DDR_SMA16
DDR_SMA17
CLK
(10,11)
MISC
DDR_DQ[0..63]
DDR_DQS[0..7] (10,11)
DDR_DQS#[0..7]
DATA
DDR_DQ[0..63]
DDR_DQS[0..7]
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
C
Sheet
E
Rev
0.4
of
43
+1.2VS
1
C100
1
C102
1
C104
1
C106
1
C108
1
C110
1
C112
C118
C120
2
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
C122
1
C124
1
C127
1
C130
1
C132
1
C134
1
C136
1
C138
1
C144
1
C147
1
C150
1
C153
1
C156
5A
A10
F11
F12
F17
G11
G12
G13
G14
G16
G17
G20
H11
H12
H13
H14
H16
H17
H19
H23
H24
L23
L24
N23
P23
P24
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
L3
B8
D8
AVDDQ
AVDDDI
H21
AB26
CPVDD
MPVDD
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C173 C174
1
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
C165
C169
C170
22U_1206_6.3V6M 0.1U_0402_16V4Z
2
2
C189
C91
C93
C95
C97
C99
RC_VDD_18
AB22
AB9
J22
J9
1
C116
1
C119
1
C121
1
C123
1
C125
1
C128
AB7
AC7
AC8
AD9
H4
H5
J6
K6
L7
L8
M7
M8
P7
P8
T7
T8
W7
W8
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
1
1
1
1
1
1
1
1
C101
1
C103
1
C105
1
C107
1
C109
1
C111
1
C113
1
C114
1
C115
1
C117
+1.8VS
U2F
A13
A16
A19
A2
A22
A25
A29
A9
AA23
AA24
AA28
AC11
AC12
AC14
AC15
AC17
AC18
AC20
AC27
AD11
AD12
AD14
AD15
AD17
AD18
AD20
AE30
AF12
AF27
AG14
AG16
AG18
AG21
AG24
AG26
AH11
AJ1
AJ30
AK12
AK15
AK18
AK2
AK22
AK25
AK29
B1
B30
D14
D17
D20
D24
D27
D3
D4
F27
F3
F30
F4
G10
H15
H18
J23
J24
J27
J3
J30
K23
K8
M12
M14
M16
M18
M23
M24
M26
N13
N15
N17
N19
P12
P14
P16
P18
+1.2VS
2.25A
RC_VDDA_12
1
C140
1
C142
1
C145
1
C148
1
C151
1
C154
1
C157
AB8
AC10
AC9
AD10
AE11
AF11
AG11
U7
U8
Y7
Y8
G4
G5
J8
C7
H7
H8
H10
+VDDQ
1
2
L50 CHB2012U170_0805
1
2
L51 CHB2012U170_0805
L2
1
2
CHB1608U301_0603
RC_VDDA_18
0.75A
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
L1
1
2
CHB1608U301_0603
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
C126
C129
C131
C139
C141
C143
C146
C149
C152
+1.8VS
2
0.1U_0402_16V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
1
C161
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
470U_D2_2.5VM
20mils
+LPVDD
20mils
ATI recommend separate pure power
+PLLVDD
2006/01/23
20mils
+VDDQ
0.1U_0402_16V4Z
1
2
CHB2012U170_0805
C166
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1
C167
C171
2
+3VS
L4
2
CHB2012U170_0805
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C168
0.1U_0402_16V4Z
AA3
AA7
AA8
AB5
AB6
AC3
AD3
AD7
AD8
AE8
AF3
AF5
AF7
AF9
AG5
AH10
AH3
AH5
AH6
AH7
AH8
AH9
K5
L3
M3
N5
N6
N7
N8
P3
R3
R7
R8
T5
T6
U3
V3
V7
V8
W5
W6
Y3
AVSSN
AVSSQ
AVSSDI
LPVSS
LVSSR
LVSSR
LVSSR
PLLVSS
CPVSS
MPVSS
C10
B9
C8
J7
G7
G8
G9
H9
H20
AA27
+1.8VS
+MPVDD
+1.8VS
+PLLVDD
L7
+CPVDD
1
2
CHB2012U170_0805
1
+1.8VS
+1.8VS
2
C190
1U_0402_6.3V4Z
2
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
H=1.9mm
R13
R15
R17
R19
R23
R24
R27
T12
T14
T16
T18
T30
U13
U15
U17
U19
U23
U24
V12
V14
V16
V18
V27
V28
W13
W15
W17
W19
W23
W30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
216CPP4AKA21HK_BGA707
220U_D2_4VM
L10
1
C87
C89
2A
+3VS
L5
1
C188
10U_0805_10V4Z
C187
0.1U_0402_16V4Z
C186
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
+AVDD
+LPVDD
4
AB23
AB24
AC13
AC16
AC19
AC21
AC22
AD13
AD16
AD19
AD21
AD22
AD23
AK21
AK24
AK28
T23
T24
V23
V24
Y23
Y24
0.1A
1U_0402_6.3V4Z
C84
216CPP4AKA21HK_BGA707
+
1
VDD_18
VDD_18
VDD_18
VDD_18
VDDR3
VDDR3
LPVDD
LVDDR18D
LVDDR18A
LVDDR18A
PLLVDD
+AVDDDI
L6
1
2
CHB1608U301_0603 1
C172
0.1U_0402_16V4Z
2
+CPVDD
C163 C164+MPVDD
1U_0402_6.3V4Z
0.1U_0402_16V4Z
+1.8VS
+AVDDDI
1
+1.8V
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
0.1A
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
AVDD
+AVDDQ
1
2
CHB1608U301_0603 1
C162
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
C9
+AVDD
+1.8VS
C81
PART 6 OF
6
M13
M15
M17
M19
N12
N14
N16
N18
P13
P15
P17
P19
R12
R14
R16
R18
T13
T15
T17
T19
U12
U14
U16
U18
V13
V15
V17
V19
W12
W14
W16
W18
+1.05VS
U2E
+1.05VS
1
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
RC410MD GOUND
+1.2VS
5A
1
+
C182
C191
470U_D2_2.5VM
+1.8VS
C175
C176
L9
1
C183
2
2
CHB1608U301_0603 1
C185
C184
0.1U_0402_16V4Z
2
2
1
1U_0402_6.3V4Z
C98
C86
2006/01/23
1U_0402_6.3V4Z
C96
2
470U_D2_2.5VM
10U_0805_10V4Z
C94
C83
C92
C80
CPU I/F
PWR
C90
+1.8V
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PART 5
OF 6
C88
2
2
2
2
2
2
RC410MD POWER
C85
1
C133 1
C135 1
C137 1
C155 1
C158 1
C159
1
C160
CORE
PWR
C82
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
C79
C78
2
CHB1608U301_0603
C178
C177
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C179
L8
1
2
CHB1608U301_0603 1
C180
C181
10U_0805_10V4Z
2
10U_0805_10V4Z
2
4
10U_0805_10V4Z
1U_0402_6.3V4Z
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
B
Sheet
E
Rev
0.4
9
of
43
DDR_DQ[0..63]
+1.8V
+1.8V
+DDR_VREF1
DDR_DQS#[0..7]
Layout Note:
Place near JDIM1
Trace=20mil
1
C192
0.1U_0402_16V4Z
1
2
DDR_DQ14
DDR_DQ11
DDR_DQS#0
DDR_DQS0
DDR_DQ0
DDR_DQ5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R79
1K_0402_1%
0.1U_0402_16V4Z
C206
0.1U_0402_16V4Z
C205
0.1U_0402_16V4Z
C204
0.1U_0402_16V4Z
C203
0.1U_0402_16V4Z
C202
0.1U_0402_16V4Z
C201
0.1U_0402_16V4Z
C200
0.1U_0402_16V4Z
C199
0.1U_0402_16V4Z
C198
0.1U_0402_16V4Z
C197
C196
C195
1
DDR_DQS#1
DDR_DQS1
C193
DDR_DQ8
DDR_DQ10
+DDR_VREF1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
+1.8V
DDR_DQ7
DDR_DQ2
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_DQ16
DDR_DQ20
DDR_DQS#2
DDR_DQS2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to V_DDR_MCH_REF
DDR_DQ23
DDR_DQ22
DDR_DQ25
DDR_DQ28
DDR_DM3
DDR_DQ31
DDR_DQ30
+0.9VS
2
DDR_SCKE0
(8) DDR_SCKE0
C208
C209
C210
C211
C212
C213
C214
C215
C216
C217
C218
C219
C220
C221
C222
C223
C224
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_1206_6.3V6M
22U_1206_6.3V6M
C207
1
DDR_SMA17
DDR_SMA12
DDR_SMA9
DDR_SMA8
DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10
DDR_SMA15
DDR_SWE#
(8,11) DDR_SWE#
DDR_SMA14
DDR_SMA11
1
2
DDR_SCKE3
(8,11) DDR_SCKE3
DDR_SCAS#
DDR_SCS#1
(8,11) DDR_SCAS#
(8) DDR_SCS#1
2006/01/23
Layout Note:
Every four parallel termination resistors with two caps,
one is connected to ground, the other one is connected
between +1.8V and +0.9VS. Need to place each parallel
resistor with one cap to GND and one cap between
+1.8V and +0.9VS
DDR_ODT2
(8) DDR_ODT2
+1.8V
+0.9VS
1
C225
1
C226
2
2
DDR_DQ36
DDR_DQ32
DDR_DQS#4
DDR_DQS4
@ 0.01U_0402_16V7K
@ 0.01U_0402_16V7K
56_0402_5%
R495 2 DDR_SCKE2
DDR_DQ39
DDR_DQ34
DDR_DQ41
DDR_DQ45
DDR_SCKE2 (8,11)
4 DDR_SMA6
3 DDR_SMA7
56_0404_4P2 R_5%
1
2
DDR_DM5
DDR_DQ42
DDR_DQ46
RP30
1
C227
1
C228
DDR_SMA5
DDR_SMA2
1
2
DDR_SMA12
DDR_SMA17
1
2
DDR_SMA10
DDR_SMA16
1
2
RP32
2
2
@ 0.01U_0402_16V7K
DDR_DM7
RP36
4
3
56_0404_4P2 R_5%
4 DDR_SCS#2
3 DDR_SMA15
56_0404_4P2 R_5%
1
2
2
+3VS
RP38
@ 0.01U_0402_16V7K
1
2
0.1U_0402_16V4Z
@ 0.01U_0402_16V7K
RP39
56_0404_4P2R _5%
4
3
1
2
DDR_ODT3 (8,11)
DDR_ODT1 (8,11)
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
DDR_SMA[0..17]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_DQ15
DDR_DQ12
DDR_DQ[0..63]
(8,11)
DDR_DQS[0..7]
(8,11)
DDR_DQS#[0..7]
DDR_DM[0..7]
DDR_SMA[0..17]
(8,11)
(8,11)
(8,11)
DDR_DM1
DDR_DQ9
DDR_DQ13
DDR_DQ1
DDR_DQ4
DDR_DM0
EMC_DDR_CLK1
EMC_DDR_CLK1#
EMC_DDR_CLK1 (8)
EMC_DDR_CLK1# (8)
DDR_DQ3
DDR_DQ6
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_DQ17
DDR_DQ21
DDR_DM2
DDR_DQ19
DDR_DQ18
DDR_DQ29
DDR_DQ24
DDR_DQS#3
DDR_DQS3
DDR_DQ26
DDR_DQ27
2
DDR_SCKE1
DDR_SCKE1 (8)
DDR_SMA14
DDR_SMA11
DDR_SMA7
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0
DDR_SMA16
DDR_SRAS#
DDR_SCS#0
DDR_SRAS# (8,11)
DDR_SCS#0 (8)
DDR_ODT0
DDR_SMA13
DDR_ODT0 (8)
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ35
DDR_DQ38
DDR_DQ44
DDR_DQ40
DDR_DQS#5
DDR_DQS5
DDR_DQ47
DDR_DQ43
DDR_DQ49
DDR_DQ52
EMC_DDR_CLK0
EMC_DDR_CLK0#
EMC_DDR_CLK0 (8)
EMC_DDR_CLK0# (8)
DDR_DM6
DDR_DQ54
DDR_DQ51
DDR_DQ56
DDR_DQ61
DDR_DQS#7
DDR_DQS7
DDR_DQ63
DDR_DQ59
+3VS
P-TWO_A56 92B-A0G16-P
DIMMA
Reverse H9.2
2006/03/27
RP41
2005/12/26
DDR_SCKE0
R491
DDR_SCKE1
R492
DDR_SCS#0
DDR_SCS#1
A
DDR_SCS#2 (8,11)
(11,12,14,25) SB_SMDATA
(11,12,14,25) SB_SMCLK
C234
DDR_DQ58
DDR_DQ62
56_0404_4P2 R_5%
4 DDR_SMA0
3 DDR_SMA1
10U_0805_10V6K
1
2
DDR_DQ50
DDR_DQ55
DDR_DQ60
DDR_DQ57
C233
DDR_SCS#3
DDR_SMA13
DDR_DQS#6
DDR_DQS6
4 DDR_SRAS#
3 DDR_SMA4
56_0404_4P2 R_5%
RP34
@ 0.01U_0402_16V7K
1
2
1
C231
1
C232
(8,11) DDR_SCS#3
56_0404_4P2 R_5%
4 DDR_SMA9
3 DDR_SMA8
1
2
1
C229
1
C230
56_0404_4P2R _5%
RP35
4
3
1
2
RP37
@ 0.01U_0402_16V7K
1
2
4
3
56_0404_4P2 R_5%
DDR_DQ53
DDR_DQ48
@ 0.01U_0402_16V7K
RP33
DDR_SWE#
DDR_SMA3
DDR_DM[0..7]
JP1
R78
1K_0402_1%
C194
470U_D2_2.5VM
DDR_DQS[0..7]
+1.8V
1
1
R493
R494
56_0402_5%
2
56_0402_5%
2
56_0402_5%
2
56_0402_5%
2
B
1
C235
Issued Date
DDR_ODT0
2
56_0402_5%
C
2005/11/01
2006/11/30
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R80
1
Security Classification
@ 0.01U_0402_16V7K
Title
DDRII-SODIMM2
Date:
G
Rev
0.4
Sheet
10
of
43
+1.8V
Layout Note:
Place near JDIM1
+1.8V
+DDR_VREF2
Trace=20mil
JP2
DDR_DQ36
DDR_DQ32
DDR_DQS#4
DDR_DQS4
DDR_DQ39
DDR_DQ34
DDR_DQ41
DDR_DQ45
DDR_DM5
DDR_DQ42
DDR_DQ46
DDR_DQ53
DDR_DQ48
DDR_DQS#6
DDR_DQS6
DDR_DQ50
DDR_DQ55
DDR_DQ60
DDR_DQ57
DDR_DM7
DDR_DQ58
DDR_DQ62
(10,12,14,25) SB_SMDATA
(10,12,14,25) SB_SMCLK
+3VS
DDR_DQ17
DDR_DQ21
DDR_DM2
+1.8V
DDR_DQ29
DDR_DQ24
R81
1K_0402_1%
DDR_DQS#3
DDR_DQS3
+DDR_VREF2
2
C250
0.1U_0402_16V4Z
DDR_DQ26
DDR_DQ27
DDR_SCKE3 (8,10)
DDR_SCKE3
DDR_DQ19
DDR_DQ18
R82
1K_0402_1%
DDR_SMA14
C251
0.1U_0402_16V4Z
DDR_SMA11
DDR_SMA7
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0
DDR_SMA16
DDR_SRAS#
DDR_SCS#2
DDR_ODT1
DDR_SMA13
DDR_SRAS# (8,10)
DDR_SCS#2 (8,10)
DDR_ODT1 (8,10)
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ35
DDR_DQ38
DDR_DQ44
DDR_DQ40
DDR_DQS#5
DDR_DQS5
DDR_DQ47
DDR_DQ43
DDR_DQ49
DDR_DQ52
EMC_DDR_CLK3
EMC_DDR_CLK3#
EMC_DDR_CLK3 (8)
EMC_DDR_CLK3# (8)
DDR_DM6
DDR_DQ54
DDR_DQ51
DDR_DQ56
DDR_DQ61
DDR_DQS#7
DDR_DQS7
DDR_DQ63
DDR_DQ59
4
+3VS
PTI_A5652D-A0G16-P
1
C253
C252
10U_0805_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(8,10) DDR_ODT3
C249
DDR_ODT3
0.1U_0402_16V4Z
DDR_SCAS#
DDR_SCS#3
(8,10) DDR_SCAS#
(8,10) DDR_SCS#3
C248
DDR_SMA10
DDR_SMA15
DDR_SWE#
(8,10) DDR_SWE#
0.1U_0402_16V4Z
DDR_SMA5
DDR_SMA3
DDR_SMA1
C247
DDR_SMA12
DDR_SMA9
DDR_SMA8
0.1U_0402_16V4Z
DDR_SMA17
C246
DDR_SCKE2
(8,10) DDR_SCKE2
0.1U_0402_16V4Z
DDR_DQ31
DDR_DQ30
C245
0.1U_0402_16V4Z
DDR_DM3
C244
DDR_DQ25
DDR_DQ28
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
0.1U_0402_16V4Z
DDR_DQ23
DDR_DQ22
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
C243
DDR_DQS#2
DDR_DQS2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
0.1U_0402_16V4Z
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_DQ16
DDR_DQ20
EMC_DDR_CLK4 (8)
EMC_DDR_CLK4# (8)
DDR_DQ3
DDR_DQ6
C242
DDR_DQ7
DDR_DQ2
DDR_DM0
EMC_DDR_CLK4
EMC_DDR_CLK4#
0.1U_0402_16V4Z
DDR_DQS#0
DDR_DQS0
C241
DDR_DQ0
DDR_DQ5
DDR_SMA[0..17]
0.1U_0402_16V4Z
(8,10) DDR_DM[0..7]
(8,10) DDR_SMA[0..17]
DDR_DQ1
DDR_DQ4
C240
DDR_DM[0..7]
1
+
C236
470U_D2_2.5VM
2
0.1U_0402_16V4Z
DDR_DQ14
DDR_DQ11
DDR_DM1
DDR_DQ9
DDR_DQ13
C239
(8,10) DDR_DQS#[0..7]
+1.8V
DDR_DQ15
DDR_DQ12
0.1U_0402_16V4Z
DDR_DQS#[0..7]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C238
DDR_DQS#1
DDR_DQS1
DDR_DQS[0..7]
(8,10) DDR_DQS[0..7]
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
(8,10) DDR_DQ[0..63]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C237
DDR_DQ[0..63]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_DQ8
DDR_DQ10
DIMMB
Reverse H5.6
2006/03/27
B
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
C
Rev
0.4
Sheet
11
of
43
4.7U_0805_10V4Z
+3VS
C262
0.1U_0402_16V4Z
1
C264
1
C267
(14,15)
1 R109
2
10K_0402_5%
Q6
CLK_OK
C266
R86
1
2
49.9_0402_1%
R85
1
2
49.9_0402_1%
1
1
1
1
2
2
2
2
SRCCLKT0
SRCCLKC0
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
SRCCLKT6
SRCCLKC6
SRCCLKT7
SRCCLKC7
34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13
SRCCLKT0
SRCCLKC0
R91
R92
1
1
2 33_0402_5%
2 33_0402_5%
CLK_SB_ALINK (13)
CLK_SB_ALINK# (13)
SRCCLKT3
SRCCLKC3
R93
R94
1
1
2 33_0402_5%
2 33_0402_5%
CLK_NB_ALINK (7)
CLK_NB_ALINK# (7)
SRCCLKT5
SRCCLKC5
R95
R96
1
1
2 33_0402_5%
2 33_0402_5%
CLKREQA#
CLKREQB#
10
11
6
48
CK410#/PCICLK0
VTT_PWRGD#/PD
USB_48MHZ
CPU_STOP#
50
7
8
FS_C
FS_B/REF1
FS_A/REF0
TEST_SEL/REF2
9
53
54
52
44
49
31
36
26
20
15
5
55
38
GNDCPU
GNDPCI
GNDATI
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND
GND
GNDA
XIN
XOUT
R103
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
R84
1
2
49.9_0402_1%
R83
1
2
49.9_0402_1%
R87
R88
R89
R90
R99 1
R102 1
CLK_PCIE_MINI1 (25)
CLK_PCIE_MINI1# (25)
2 49.9_0402_1%
2 49.9_0402_1%
EMC_CLK_NB_BCLK (8)
EMC_CLK_NB_BCLK# (8)
CLK_CPU_BCLK (4)
CLK_CPU_BCLK# (4)
Y1
EMC_XTALOUT_CLK
1
2
C268 14.31818MHZ_20P_6X1430004201
4.7K_0402_5% @ 2
+CLK_VDD1
2
G
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
1M_0402_5%
@
33P_0402_50V8J
+CLK_VDD1
CHB1608U301_0603
EMC_XTALIN_CLK
2
1
33P_0402_50V8J
R104 0_0402_5%
@ 1
2
CLK_EN#
C265
(42)
1
L13
0.1U_0402_16V4Z
2
47
46
43
42
41
40
VDDCPU
VDDPCI
VDDATI
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDREF
VDDA
R100
1
49.9_0402_1%
R101
2
1
49.9_0402_1%
R97
2
1
49.9_0402_1%
R98
2
1
49.9_0402_1%
C263
C259
2
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUCLKT2_ITP
CPUCLKC2_ITP
45
51
32
35
14
21
3
56
39
(13)
CPU_STP#
R113 4.7K_0402_5%
1 R111
2N7002_SOT23
2006/03/03
(10,11,14,25) SB_SMCLK
(10,11,14,25) SB_SMDATA
C725
33P_0402_50V8J
37
SCLK
SDATA
R105 1
10K_0402_5%
R108 1
R110 1
48M_SB
R112 1
R114 1
FS_C
R116 1
FS_B/REF1
R118 1
FS_A/REF0
TEST_SEL/REF2 R120 1
2 4.7K_0402_5%
2 4.7K_0402_5%
2 33_0402_5%
2 33_0402_5%
@
2 33_0402_5%
2 33_0402_5%
33_0402_5%
2
R106 2
10K_0402_5%
1
2
1
R107 0_0402_5%
MINI_CLKREQ#
+CLK_VDD1
+CLK_VDD1
MINI1_CLKREQ# (25)
+CLK_VDD1
R115 1
R117 1
R119 1
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
CLK_48M_SB (14)
CLK_SD_48M (21)
CPU_BSEL2 (5)
CPU_BSEL1 (5,8)
CPU_BSEL0 (5)
IREF
L14
1
2
CHB1608U301_0603
+3VS
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
1
2
CHB1608U301_0603
+3VS
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C260
C261
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
C257
C258
10U_0805_10V4Z
L12
U4
0.1U_0402_16V4Z
1
1
C255
C256
+CLK_VDD1
L11
1
2
+3VS
KC FBM-L11-201209-221LMAT_0805 1
C254
Clock Generator
R122
ICS951413CGLFT_TSSOP56
475_0402_1%
ICS951413
2
EMC_CLK_SB_14M (14)
EMC_CLK_NB_14M (8)
CLK_14M_SIO (27)
FS_C
1
0
0
FS_B
0
0
1
FS_A
1
1
1
CPU
100.00
133.33
166.66
SRC
100.00
100.00
100.00
PCI
33.33
33.33
33.33
REF
14.318
14.318
14.318
USB
48.000
48.000
48.000
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
A
Rev
0.4
Sheet
E
12
of
43
+3VS
RP14
8 PCI_GNT#0
7 PCI_REQ#2
6 PCI_PERR#
5
R155
8.2K_1206_8P4R_5%
1
RP15
20M_0603_5%
32.768KHZ_12.5P_1TJS125DJ2A073
2
2
2
2
2
2
2
2
2
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(12)
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
EMC_SB_32KH0
H_PWRGD
(4) H_PWRGOOD
(4)
H_INTR
(4)
H_NMI
(4)
H_INIT#
(4)
H_SMI#
CPU_STP#
CPU_STP#
(4)
(4)
(4)
(4)
H_IGNNE#
H_A20M#
H_FERR#
H_STPCLK#
H_A20M#
1
2
R148 0_0402_5%
(4,42) DPRSLPVR
(4,7) H_RESET#
1
2
R154 0_0402_5%
@
D2
X1
C1
X2
LAD0
CPU_PG
LAD1
LAD2
INTR/LINT0
LAD3
NMI/LINT1
LFRAME#
INIT#
LDRQ0#
SMI#
LDRQ1#
NC
IGNNE#
BMREQ#
SERIRQ
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
RTCCLK
CPU_STP#/DPSLP_3V#
RTC_IRQ#/ACPWR_STRAP
NC
DPRSLPVR
VBAT
RTC_GND
LDT_RST#/DPRSTP#/PROCHOT#
AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25
LPC
1
1
1
1
1
1
1
1
1
1
1
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
+PCIE_VDDR
EMC_SB_32KHI
C284
C285
C286
C287
C288
C289
C290
C291
C292
C293
C294
AD3
AF1
AF4
AF3
CPU
C298
L17
CHB2012U170_0805
1
1
15P_0402_50V8K
NC
C297
+1.8VS
C283 470U_D2_2.5VM
2
1
OUT
Y2
8.2K_1206_8P4R_5%
R158
20M_0603_5%
EMC_SB_32KHI
EMC_SB_32KH0
IN
PCI_REQ#3
PCI_REQ#0
PCI_GNT#2
PCI_REQ#4
NC
1
2
3
4
8
7
6
5
15P_0402_50V8K
1
2
3
4
218S4RASA11GS SB460_BGA549
14
(8)
2
G
12
2
C274
2
2N7002_SOT23
D36
Q42
U35F
SN74LVC14APWLE_TSSOP14
215K_0603_1%
R503 2
CPU_STP#
13
1
330P_0402_50V7K
CH751H-40_SC76
NB_RST#
1U_0402_6.3V4Z
10K_0402_5%
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
CLKOUT7
CLKOUT8
CKO1
CKO2
CKO3
CKO4
CKO5
CKO6
CKO7
2
6
7
10
11
14
15
16
R136
R138
R139
R140
R142
R143
R144
1
1
1
1
1
1
1
2
2
2
2
2
2
2
CLK_PCI_MINI
CLK_PCI_CB
CLK_PCI3
CLK_PCI_LAN
CLK_PCI_LPC
CLK_PCI_DB
CLK_PCI_SIO
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
+3VS
ASM3P623S00EF-16-TR_TSSOP16
R145
@
0.1U_0402_16V4Z
C282
1
2
1
U7
4
@
PCI_CBE#0 (21,23,25,31)
PCI_CBE#1 (21,23,25,31)
PCI_CBE#2 (21,23,25,31)
PCI_CBE#3 (21,23,25,31)
PCI_FRAME# (21,23,25,31)
PCI_DEVSEL# (21,23,25)
PCI_IRDY# (21,23,25)
PCI_TRDY# (21,23,25,31)
PCI_PAR (21,23,25)
PCI_STOP# (21,23,25)
PCI_PERR# (21,23,25)
PCI_SERR# (21,23,25)
PCI_RST# (15,21,23,25,27,28,31)
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
LPC_DRQ1#
D3
F5
RTC_CLK
E1
D1
+SB_VBAT
+3VS
LPC_DRQ0#
10K_1206_8P4R_5%
LPC_AD2
LPC_AD0
LPC_AD3
LPC_AD1
PM_CLKRUN# (23,25,27)
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
RP16
5
6
7
8
100K_1206_8P4R_5%
RP17
1
2
R152 4.7K_0402_5%
RTC Battery
BATT1
+RTCBATT
1+RTCBATT
D3
45@ RTCBATT
BM_REQ# (8)
SERIRQ
(21,27,28)
RTC_CLK (17)
AUTO_ON# (17)
+SB_VBAT
C295
Consider
--connect
RTC_CLK
to EC
4
3
2
1
4
3
2
1
PM_CLKRUN#
LPC_AD0 (27,28)
LPC_AD1 (27,28)
LPC_AD2 (27,28)
LPC_AD3 (27,28)
LPC_FRAME# (17,27,28)
LPC_DRQ0# (27)
SERIRQ
5
6
7
8
SERIRQ
LPC_DRQ1#
PCI_GNT#1 (23)
PCI_GNT#2 (21)
PCI_GNT#3 (25)
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
R147
8.2K_0402_5%
1
2
PCI_PAR
PCI_REQ#1 (23)
PCI_REQ#2 (21)
PCI_REQ#3 (25)
(21)
(25)
(23)
(21,25)
Close to SB
PIN A2
470_0603_5%
470_0603_5%
1 R156
2 +VBAT_JOP 1 R157
2
W=20mils
BAS40-04_SOT23
+RTCVCC
JOPEN1
@ JUMP_43X39
No short
C296
0.1U_0402_16V4Z
+CHGRTC
Layout Note:
1. Under BATT1 battery Body, no Trace and Via
2. BATT1 + - PIN keep out 80mil from other
component ,trace and via
Compal Secret Data
Security Classification
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
3
TC7SH08FU_SSOP5
2
1
R146 0_0402_5%
A_RST#
Issued Date
DLY CNTRL
CLKIN
VDD
VDD
SSON
SS%
GND
GND
PCI_PLTRST#
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
U37
TC7SH08FU_SSOP5
0.1U_0402_16V4Z
C726
1
2
H_DPSLP#
C281
(4,14) H_DPSLP#
+3VALW
SS_VDD
1 R141
2
10K_0402_5%
SS_DECT
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CLKRUN#
LOCK#
+3VS
2006/03/03
2006/03/09
U6
8
1
3
13
9
4
5
12
PCI_CLK3_R
8.2K_1206_8P4R_5%
C
R133
10K_0402_5%
L15
2006/03/03
0.1U_0402_10V6K
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
PCIE_VDDR_10
PCIE_VDDR_11
PCIE_VDDR_12
PCIE_VDDR_13
+3VS
10U_0805_10V4Z
C280 1
2
PCI_FRAME#
PCI_STOP#
PCI_GNT#3
PCI_TRDY#
F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29
+3VS
+PCIE_VDDR
NC
R132 1
2
8.2K_0402_5%
(17)
(17)
(17)
(17)
(17)
8
7
6
5
PCIE_PVDD
U28
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
C279 1
PCIE_CALI
CLK_PCI_DB (31)
CLK_PCI_LPC (28)
CLK_PCI_SIO (27)
SPDIF_OUT (17)
1U_0402_6.3V4Z
E27
U29
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
(14)
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CLK0_R (17)
PCI_CLK1_R (17)
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCIE_CALRP
PCIE_CALRN
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
CLKRUN#
LOCK#
PCI_CLK0_R
PCI_CLK1_R
C278 1
E29
E28
PCI_PLTRST#
CLK_PCI_MINI (25)
CLK_PCI_CB (21)
CLK_PCI_LAN (23)
CHB2012U170_0805
RP13
1
2
3
4
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
AJ9
CLK_PCI_MINI
CLK_PCI_CB
CLK_PCI_LAN
CLK_PCI3
CLK_PCI_DB
CLK_PCI_LPC
CLK_PCI_SIO
2 L16
RP12
T25
T26
T22
T23
M25
M26
M22
M23
PCIRST#
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
1U_0402_6.3V4Z
+1.8VS
SB_A_RXP0
SB_A_RXN0
SB_A_RXP1
SB_A_RXN1
SB_A_RXP2
SB_A_RXN2
SB_A_RXP3
SB_A_RXN3
150_0402_1%
R134 2
1
R135
2
1
+PCIE_VDDR
150_0402_1%
R137 1
2
4.12K_0402_1%
80mA
PCIE_PVDD
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
RTC
8.2K_1206_8P4R_5%
5
4 PCI_REQ#1
6
3 PCI_PIRQF#
7
2 PCI_GNT#1
8
1 PCI_GNT#4
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
8.2K_1206_8P4R_5%
SB_A_RXP0
SB_A_RXN0
SB_A_RXP1
SB_A_RXN1
SB_A_RXP2
SB_A_RXN2
SB_A_RXP3
SB_A_RXN3
P29
P28
M29
M28
K29
K28
H29
H28
1
1
1
1
1
1
1
1
@
@
@
@
1
1
1
1
1
1
1
8
7 LOCK#
PCI_PIRQH#
6
5 PCI_DEVSEL#
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
SB_A_TXP0
SB_A_TXN0
SB_A_TXP1
SB_A_TXN1
SB_A_TXP2
SB_A_TXN2
SB_A_TXP3
SB_A_TXN3
C269
C270
C271
C272
C273
C275
C276
C277
R124
R125
R127
R128
R130
R126
R129
RP11
1
2
3
4
NB_A_RXP0
NB_A_RXN0
NB_A_RXP1
NB_A_RXN1
NB_A_RXP2
NB_A_RXN2
NB_A_RXP3
NB_A_RXN3
PCI_CLK0_R
PCI_CLK1_R
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
SPDIF_OUT
RP10
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
U2
T2
U1
V2
W3
U3
V1
T1
XTAL
8.2K_1206_8P4R_5%
PCI_PIRQE#
5
4
PCI_IRDY#
6
3
PCI_PIRQG#
7
2
PCI_SERR#
8
1
Part 1 of 4
PCIE_RCLKP
PCIE_RCLKN
@
@
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/GPIO41
PCI CLKS
J24
J25
(12) CLK_SB_ALINK
(12) CLK_SB_ALINK#
PCI_AD[0..31]
(17,21,23,25,31) PCI_AD[0..31]
SB460
A_RST#
PCI INTERFACE
AG10
U5A
A_RST#
1219 DEL
FBM-L11-160808-800LMT_0603
R123
8.2K_0402_5%
1
2
Rev
0.4
Sheet
13
of
43
2005/12/22
RP18
A3
B2
F7
A5
E3
B5
1
2
B3
R166 0_0402_5%
F9
R167 1
2 10K_0402_5% E9
R168 1
2 10K_0402_5% G9
SB_GA20
AF26
SB_KBRST#
AG26
EC_PME#
D7
SIO_SMI#
C25
D9
MASTER_RST#
F4
PCIE_PME#
E7
GPM6#
C2
MAINPWON_R
G7
EC_RSMRST#
4.7K_1206_8P4R_5%
2 4.7K_0402_5%EC_SWI#
2 10K_0402_5% PM_SLP_S3#
2 4.7K_0402_5%MAINPWON_R
+3VS
(4,42) H_PROCHOT#
R173 1
R175 1
R176 1
R177 1
R178 1
R179 1
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2 2.2K_0402_5%
2 2.2K_0402_5%
AGP_BUSY#
SIO_SMI#
SB_GA20
SB_KBRST#
SB_SMCLK
SB_SMDATA
2
1
0_0402_5% R172
(25) MINI_WAKE#
(28) EC_RSMRST#
2 R174
1
0_0402_5%
(12) EMC_CLK_SB_14M
+3VS
10K_1206_8P4R_5%
5 SB_FANOUT0
6 SB_GPIO31
7 SB_GPIO13
8 SB_GPIO14
4
3
2
1
8 SBGPIO40
7 AZ_BITCLK
6 SBGPIO44
5 AZ_SDIN0_MDC
1
2
3
4
AGP_STP#
AGP_BUSY#
SPKR
SB_SMCLK
SB_SMDATA
(32)
SB_SPKR
(10,11,12,25) SB_SMCLK
(10,11,12,25) SB_SMDATA
SS_DECT (13)
RP21
(28,36)
D35
1
@
ACIN
ACIN
E2
C299
@ 15P_0402_50V8D
2
SB_INT_FLASH_SEL
(29) SB_INT_FLASH_SEL
(15)
SIDERST#
(12,15) CLK_OK
2006/02/07
RP28
1 SB_14M
SB_GPIO9
GPIO_M
LDT_PG
CH751H-40_SC76
2
10K_1206_8P4R_5%
4
3
2
1
2006/01/23
10K_1206_8P4R_5%
5 GPIO_M
6 LDT_PG
7 AZ_RST
8 AGP_STP#
(28)
RP22
(32)
(32)
(32)
(32)
R181 1
R183 1
R182 1
R184 1
AZ_BITCLK_HD
AZ_SYNC_HD
AZ_SDOUT_HD
AZ_RST_HD#
R185
R187
R186
R188
(30) AZ_BITCLK_MDC
(30) AZ_SYNC_MDC
(30) AZ_SDOUT_MDC
(30) AZ_RST_MDC#
(28) EC_LID_OUT#
(26) USB_OC2#
(29) EC_FLASH#
(28)
EC_SCI#
2 33_0402_5%
2 33_0402_5%
2 33_0402_5%
2 33_0402_5%
1
1
1
1
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
AZ_BITCLK
AZ_SDOUT
AZ_BITCLK
AZ_SYNC
AZ_SDOUT
AZ_RST
R488 10K_0402_5%
1
2
AC_SDOUT
AZ_SDIN3_HD
AZ_SDIN0_MDC
(17) AC_SDOUT
(32) AZ_SDIN3_HD
(30) AZ_SDIN0_MDC
AZ_RST
(4,13) H_DPSLP#
(4)
R191
1
SB_FANOUT0
SB_GPIO31
SB_GPIO13
SB_GPIO14
EC_THERM#
(28) EC_THERM#
H_CPUSLP#
B23
14M_OSC
C28
A26
B29
A23
B27
D23
B26
C27
B28
C3
F3
D26
C26
A27
A4
NC
ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
GPIO4
GPIO5
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
NC
NC
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LDT_PG/SSMUXSEL/GPIO0
NC
C6
C5
C4
B4
B6
A6
C8
C7
B8
A8
NC
NC
USB_OC7#/GEVENT7#
USB_OC6#/GEVENT6#
USB_OC5#/AZ_RST#/GPM5#
USB_OC4#/GPM4#
USB_OC3#/GPM3#
USB_OC2#/FANOUT1/LLB#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
N2
M2
K2
L3
K3
AZ_BITCLK
AZ_SDOUT
NC
AZ_SYNC
NC
L1
L2
L4
J2
J4
M3
L5
AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45
E23
AC21
AD7
AE7
AA4
T4
D4
AB19
FANOUT0/GPIO3
GPIO31
GPIO13
DPSLP_OD#/GPIO37
GPIO14
TALERT#/GPIO10
SLP#/LDT_STP#
NC
U32
4 AZ_RST_MDC#
CLK_48M_SB
1
2
R159 0_0402_5%
EMC_OSCLIN
1
2
R160 0_0402_5%
@
A17
R163
A14 USB_RCOMP
USB_ATEST1
USB_ATEST0
A11
A10
10.7K_0402_1%
NC
NC
H12
G12
CLK_48M_SB (12)
+3VALW
2006/03/27
EC_SCI#
EC_LID_OUT#
NC
NC
E12
D12
E14
D14
USB_HSDP6+
USB_HSDM6-
G14
H14
USB_HSDP5+
USB_HSDM5-
D16
E16
USB_HSDP4+
USB_HSDM4-
D18
E18
USB_HSDP3+
USB_HSDM3-
G16
H16
USB_HSDP2+
USB_HSDM2-
G18
H18
USBP2+
USBP2-
USB_HSDP1+
USB_HSDM1-
D19
E19
USBP1+
USBP1-
USB_HSDP0+
USB_HSDM0-
G19
H19
USBP0+
USBP0-
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
B9
B11
B13
B16
B18
A9
B10
B12
B14
B17
+AVDDTX
AVDDC
A12
+AVDDC
AVSSC
A13
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19
2 10K_0402_5%
2 10K_0402_5%
10K_1206_8P4R_5%
EC_SMI#
5
USB_OC6#
6
USB_OC2#
7
USB_OC4#
8
USB_HSDP7+
USB_HSDM7-
R164 1
R165 1
4
3
2
1
RP20
USBP6+
USBP6-
USBP6+
USBP6-
(30)
(30)
L18
FBM-10-201209-260-T_0805
2
1
USBP4+
USBP4-
USBP4+
USBP4-
(30)
(30)
USBP2+
USBP2-
(25)
(25)
USBP1+
USBP1-
(30)
(30)
USBP0+
USBP0-
(26)
(26)
+AVDDTX
C300 1
2 10U_0805_10V4Z
C301 1
2 1U_0402_6.3V4Z
C302 1
C303 1
C304 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
L19
1
+AVDDRX
+AVDDRX
FBM-10-201209-260-T_0805
2
C305 1
2 10U_0805_10V4Z
C306 1
2 1U_0402_6.3V4Z
C307 1
C308 1
C309 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
L20
+AVDDC
+3VALW
FBM-10-201209-260-T_0805
2
C310 1
2 10U_0805_10V4Z
C311 1
2 1U_0402_6.3V4Z
C312 1
2 0.1U_0402_16V4Z
EC_RSMRST#
(28) EC_RSMRST#
Control by EC
Delay 50ms
after +3VALW
ready
R193
47K_0402_5%
218S4RASA11GS SB460_BGA549
C712
0.1U_0402_10V6K
D4
R192
10K_0402_5%
0_0603_5%
@
0_0402_5%
R149 1
2
OSC / RST
TC7SH08FU_SSOP5
+3VALW
1
2
R189 0_0402_5%
RSMRST#
USBCLK
USB_RCOMP
GPIO_M
1 R486
2 AC_BITCLK
10K_0402_5%
2006/03/06
1
AZ_SYNC
SBGPIO44
SBGPIO40
1
2 AC_RST
R487 10K_0402_5%
+3VALW
EC_SMI#
USB_OC6#
AZ_RST
USB_OC4#
EC_LID_OUT#
USB_OC2#
EC_FLASH#
EC_SCI#
EC_SMI#
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
NC
TEST1
TEST0
GA20IN
KBRST#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
USB INTERFACE
EC_SWI#
EXTEVENT0#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
USB PWR
EC_SWI#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
(28)
(28)
(28)
(28)
(15)
(8,29) NB_SUS_STAT#
GPIO
10K_1206_8P4R_5%
GPM6#
1 R161
2
10K_0402_5%
RP19
PCIE_PME#
8
PM_SLP_S5#
7
EC_FLASH#
6
EXTEVENT0#
5
R169 1
R170 1
R171 1
Part 4 of 4
SB460
USB OC
U5D
AZALIA
1
2
3
4
EC_PME#
EC_THERM#
MASTER_RST#
PBTN_OUT#
8
7
6
5
AC97
1
2
3
4
+3VALW
SB_GA20
X1 48MHZ_4P_FN4800002
4 VDD
OUT 3
@
1 OE
C313
0.1U_0402_10V6K
2
@
GND
@1CH751H-40_SC76 GATEA20
EC_GA20 (28)
1
2
R190 0_0402_5%
EMC_OSCLIN
SB_KBRST#
@1CH751H-40_SC76 EC_KBRST#
EC_KBRST# (28)
D5
1
2
R194 0_0402_5%
MAINPWON_R
CH751H-40_SC76
2
1
MAINPWON (4,36,37,39)
D6
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
5
Sheet
1
14
of
Rev
0.4
43
U5B
SATA@ C315 1
2 0.01U_0402_16V7K
SATA_TX0-
SATA@ C316 1
2 0.01U_0402_16V7K
SATA_RX0-
SATA@ C321 1
2 0.01U_0402_16V7K
SATA_RX0+
SATA_TX0+
SATA_TX0-
AH20
AJ20
SATA_RX0SATA_RX0+
AH18
AJ18
SATA_TX1+
SATA_TX1-
AH17
AJ17
SATA_RX1SATA_RX1+
AH13
AH14
SATA_TX2+
SATA_TX2-
AH16
AJ16
SATA_RX2SATA_RX2+
AJ11
AH11
SATA_TX3+
SATA_TX3-
AH12
AJ13
SATA_RX3SATA_RX3+
AF12
SATA_CAL
AD16
SATA_X1
AD18
SATA_X2
AC12
SATA_ACT#
+PLLVDD_SATA
AD14
AJ10
PLLVDD_SATA_1
PLLVDD_SATA_2
+XTLVDD_SATA
AC16
XTLVDD_SATA
AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23
AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AVDD_SATA_9
AVDD_SATA_10
AVDD_SATA_11
AVDD_SATA_12
AVDD_SATA_13
AVDD_SATA_14
AVDD_SATA_15
AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
J1
@ 10U_0805_10V4Z
1
@ 0.1U_0402_16V4Z
1
C322
C323
C324
C325
@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z
+PLLVDD_SATA
L21
C329
0.1U_0402_16V4Z
+3VS
100 mil
C326
+5VS
@
0.01U_0402_16V7K
C330
C331
10U_0805_10V4Z
C332
0.1U_0402_16V4Z
Y3
1
1U_0402_6.3V4Z
2
1
CHB1608U301_0603
1
R195
1K_0402_1%
SATA@
EMC_SATA_X1
R196 SATA@10M_0402_5%
2
1 EMC_SATA_X2
+XTLVDD_SATA
L22
JUMP_43X118
+1.8VS
1U_0402_6.3V4Z
2
1
CHB1608U301_0603
1
OCTEK_SAT-22SG1G_NR
SATA@
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
+3V_SATA
+3V_SATA
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
0.1U_0402_16V4Z
C333
27P_0402_50V8J
SATA@
C327
C334
10U_0805_10V4Z
SATA_LED#
(28) SATA_LED#
2
1
25MHZ_20P
SATA@
C328
27P_0402_50V8J
SATA@
+1.8VS
+1.8_SATA
L23
0.1U_0402_16V4Z
2
1
CHB1608U301_0603
1
C335
1U_0402_6.3V4Z
1
C336
1
C337
1
C338
C339
C340
C341
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
+3VS
+3VALW
5
A
IDE_RESET# (20)
SIDERST#
(14)
R197
10K_0402_5%
U34
(13,21,23,25,27,28,31) PCI_RST#
0.1U_0402_16V4Z
C342
1
2
SATA_LED#
TC7SH08FU_SSOP5
14
+3VALW
CLK_OK 13
11
7
7
0.1U_0402_10V6K
1M_0402_5%
U35C
O
U35D
NC
NC
C23
G5
NC
NC
NC
M4
T3
V4
NC
NC
NC
N3
P2
W4
NC
NC
NC
NC
NC
P5
P7
P8
T8
T7
NC
NC
NC
NC
NC
NC
NC
NC
V5
L7
M8
V6
M6
P4
M7
V7
NC
N1
NC
M1
C714
14
14
SN74LVC14APWLE_TSSOP14
1
2
332K_0402_5%
11
1
R476 0_0402_5%
0.47U_0603_16V4Z
U35E
10
2 2
G
0_0402_5%
R505
9
D
1
2
0.1U_0402_16V4Z
U3C
R477
J3
J6
G3
G2
G6
+3VALW
NC
NC
NC
NC
NC
PIDE_DD0
PIDE_DD1
PIDE_DD2
PIDE_DD3
PIDE_DD4
PIDE_DD5
PIDE_DD6
PIDE_DD7
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15
R504
10K_0402_5%
CLK_OK
10
O
B
R479 0_0402_5%
1
Q43
SN74LVC08APW_TSSOP14
S
2N7002_SOT23
@ R480
2
1
0_0402_5%
SB_PWRGD (14)
EC_PWROK (28)
SN74LVC14APWLE_TSSOP14
SN74LVC14APWLE_TSSOP14
A
14
O
AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29
PIDE_DMACK# (17,20)
PIDE_DREQ (20)
PIDE_DIOR# (20)
D
PIDE_DIOW# (20)
PIDE_CS1# (20)
PIDE_CS3# (20)
+3VALW
C715
R478
U35B
332K_0402_1%
2
5
R475
O
14
14
U35A
SN74LVC14APWLE_TSSOP14
C716
O
G
14
P
1
VGATE
2006/03/06
2006/03/27
1
2
(42)
+3VALW
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
PIDE_DIORDY (20)
PIDE_INTRQ# (20)
PIDE_DA0
PIDE_DA1
PIDE_DA2
218S4RASA11GS SB460_BGA549
NB_PWRGD (8)
+3VALW
+3VALW
AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27
U3D
O
+3VALW
2006/01/23
R474
10K_0402_5%
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
SN74LVC08APW_TSSOP14
+3VALW
PIDE_DD[0..15]
12
+3VS
Part 2 of 4
ATA 66/100
0.1U_0402_16V4Z
SB460
AH21
AJ21
SPI ROM
C320
SATA_RX0-_C
SATA_RX0+_C
HW MONITOR
C319
SATA_TX0+_C
SATA_TX0-_C
PIDE_DA[0..2]
(20) PIDE_DD[0..15]
SATA_TX0+
SERIAL ATA
C318
2 0.01U_0402_16V7K
C317
SATA@ C314 1
0.1U_0402_16V4Z
1
1
2
3
4
5
6
7
(20) PIDE_DA[0..2]
GND
HTX+
HTXGND
HRXHRX+
GND
+5VS
JP3
CLK_OK
SB_PWRGD# (8)
TO SB & CLK_GEN
CLK_OK
(12,14)
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
5
Rev
0.4
Sheet
15
of
43
+3VS
U5C
+1.8VS
D32
D33
1 2
D34
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26
1
+1.8VS
1N4148_SOT23
1N4148_SOT23 1N4148_SOT23
2005/12/21
22U_0805_6.3V6M
+3VS
+1.8VALW
C381
C382
22U_0805_6.3V6M
C369
C370
C371
C372
C373
C374
C375
C376
C377
C378
C379
C380
C383
C384
C385
C386
C387
C388
C389
C390
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C391
C392
C393
C394
C395
C396
C397
1
1
1
1
1
1
1
2
2
2
2
2
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17
220mA
+3VALW
+1.8VALW
C398
C399
C400
C401
C402
1
1
1
1
1
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C403
C404
C405
C407
1
1
1
1
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.05VS
0.1U_0402_16V4Z
C406 1
2
+3VS
+5VS
2
1
R204
CH751H-40_SC76
1
+V5_VREF
0_0805_5%
2
1K_0402_5%
+1.8VS
D7
R205
C408
2
C409
1U_0603_10V4Z
1
1
0.1U_0402_16V4Z
C410 1
2 10U_0805_10V4Z
C411 1
2 1U_0402_6.3V4Z
C412 1
2 0.1U_0402_16V4Z
+AVDD_CK
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
SB460
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
Part 3 of 4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
A2
A7
F1
J5
J7
K1
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
G4
H1
H2
H3
S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4
A18
A19
B19
B20
B21
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
POWER
+3VS
C348
C349
C350
C351
C352
C353
C354
C355
C356
C357
C358
C359
C360
C361
C362
C363
C364
C365
C366
C367
C368
USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4
USB_PHY_1.8V_5
AA27
CPU_PWR
AE11
V5_VREF
A24
AVDDCK
A22
NC
B22
AVSSCK
V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27
PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29
D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26
218S4RASA11GS SB460_BGA549
+V5_VREF (20mils)
+AVDD_CK(40mils)
Security Classification
Issued Date
2005/11/01
Deciphered Date
2006/11/30
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
Sheet
Rev
0.4
16
of
43
+3VALW
+3VS
+3VALW
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
@
R215
10K_0402_5%
@
R217
10K_0402_5%
R216
10K_0402_5%
R214
10K_0402_5%
@
R213
10K_0402_5%
R212
10K_0402_5%
@
R211
10K_0402_5%
R210
10K_0402_5%
@
R209
10K_0402_5%
2
AUTO_ON#
AC_SDOUT
RTC_CLK
SPDIF_OUT
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK0_R
PCI_CLK1_R
LPC_FRAME#
(13) PCI_CLK2_R
(13)
(14)
(13)
(13)
(13)
(13)
(13)
(13)
(13)
(13)
(13,27,28)
R208
10K_0402_5%
R207
10K_0402_5%
R206
10K_0402_5%
@
R226
10K_0402_5%
R227
10K_0402_5%
2
R225
10K_0402_5%
2
@
R224
10K_0402_5%
R223
10K_0402_5%
@
R222
10K_0402_5%
R221
10K_0402_5%
@
R220
10K_0402_5%
R219
10K_0402_5%
R218
10K_0402_5%
REQUIRED STRAPS
ACPWRON
AUTO_ON# AC97_SDOUT
PULL
HIGH
MANUAL
PWR ON
USE
DEBUG
STRAPS
DEFAULT
AUTO
PWR
ON
SPDIF_OUT CLK_PCI3
INTERNAL
RTC
PU for 48Mhz
XTAL mode
USB PHY
PWRDOWN
DISABLE
DEFAULT
DEFAULT
EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )
Internal PLL
PCIE AUTO
detect
PCI_CLK6
External
Clock
CPU I/F = P4
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
DEFAULT
DEFAULT
LFRAME#
CLK_PCI2
THERMTRIP#
ENABLE
Crystal Pad
C
DEFAULT
THERMTRIP#
DISABLE
Clock input
buffer
DEFAULT
R237
10K_0402_5%
2
R236
@
10K_0402_5%
2
R235
@
10K_0402_5%
2
R234
@
10K_0402_5%
2
R233
@
10K_0402_5%
2
R232
@
10K_0402_5%
2
R231
@
10K_0402_5%
2
R230
@
10K_0402_5%
2
R229
@
10K_0402_5%
2
R228
@
10K_0402_5%
PCI_CLK1
DEFAULT
Forcing PCIE
to 2 lanes
(debug only)
PCI_CLK0
ROM TYPE
CPU I/F = K8
DEFAULT
USB PHY
PWRDOWN
ENABLE
48M OSC
mode
CLK_PCI5
IGNORE
DEBUG
STRAPS
DEFAULT
CLK_PCI4
PULL
LOW
RTC_CLK
(15,20) PIDE_DMACK#
(13,21,23,25) PCI_AD31
(13,21,23,25) PCI_AD30
(13,21,23,25) PCI_AD29
(13,21,23,25) PCI_AD28
(13,21,23,25) PCI_AD27
(13,21,23,25) PCI_AD26
(13,21,23,25) PCI_AD25
(13,21,23,25) PCI_AD24
(13,21,23,25) PCI_AD23
1
1
2
R246
@
10K_0402_5%
R247
10K_0402_5%
2
1
R245
10K_0402_5%
2
1
R244
10K_0402_5%
2
R243
10K_0402_5%
2
R242
10K_0402_5%
2
R241
@
10K_0402_5%
1
R240
@
10K_0402_5%
R239
@
10K_0402_5%
R238
@
10K_0402_5%
DEBUG STRAPS
PIDE_DMACK# PCI_AD31
PULL
HIGH
USE
LONG
RESET
DEFAULT
PULL
LOW
USE
SHORT
RESET
Reserved
PCI_AD30
Reserved
PCI_AD29
Reserved
PCI_AD28
Reserved
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
Reserved
USE PCI
PLL
USE
ACPI
BCLK
DEFAULT
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
DEFAULT
DEFAULT
DEFAULT
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
5
Rev
0.4
Sheet
17
of
43
+3VS
+3VALW
+LCDVDD
1
W=60mils
1
R249
100K_0402_5%
R248
300_0402_5%
2
G
2
R250
R251 1
2 0_0402_5%
4.7U_0805_10V4Z
Q8
AOS 3413
SI2301BDS_SOT23
+LCDVDD
W=60mils
0.047U_0402_16V7K
2
Q9
2N7002_SOT23
2
G
C415
C416
(8) NB_ENVDD
1
1K_0402_5%
1
C414
Q7
2N7002_SOT23
C413
12
2
S
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
R252
10K_0402_5%
+3VS
R253
4.7K_0402_5%
BKOFF#
BKOFF#
(28)
D8
2 RB751V_SOD323
DISPOFF#
2005/11/18
DAC_BRIG
INVT_PWM
DISPOFF#
1
C417
1
C418
1
C419
2
2
2
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
JP4
+INVPWR_B+
+3VS
(8) NB_EDID_CLK
(8) NB_EDID_DATA
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
NB_EDID_CLK
NB_EDID_DATA
EMC_NB_TZOUT0EMC_NB_TZOUT0+
EMC_NB_TZOUT1+
EMC_NB_TZOUT1-
(8) EMC_NB_TZOUT1+
(8) EMC_NB_TZOUT1-
EMC_NB_TZOUT2+
EMC_NB_TZOUT2-
(8) EMC_NB_TZOUT2+
(8) EMC_NB_TZOUT2-
EMC_NB_TZCLKEMC_NB_TZCLK+
DAC_BRIG
INVT_PWM
DISPOFF#
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DAC_BRIG (28)
INVT_PWM (28)
+LCDVDD
(60 MIL)
EMC_NB_TXOUT0EMC_NB_TXOUT0+
EMC_NB_TXOUT0- (8)
EMC_NB_TXOUT0+ (8)
EMC_NB_TXOUT1EMC_NB_TXOUT1+
EMC_NB_TXOUT1- (8)
EMC_NB_TXOUT1+ (8)
EMC_NB_TXOUT2+
EMC_NB_TXOUT2-
EMC_NB_TXOUT2+ (8)
EMC_NB_TXOUT2- (8)
EMC_NB_TXCLKEMC_NB_TXCLK+
EMC_NB_TXCLK- (8)
EMC_NB_TXCLK+ (8)
B
ACES_88107-4000G
(SAME AS ACES_87216-4016)
+LCDVDD
+INVPWR_B+
L24 2
1
KC FBM-L11-201209-221LMAT_0805
L25 2
1
KC FBM-L11-201209-221LMAT_0805
C423
680P_0603_50V7K
+3VS
B+
C420
0.1U_0402_16V4Z
C421
10U_0805_10V4Z
C422
0.1U_0402_16V4Z
C424
68P_0402_50V8K
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
LCD Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
1
18
of
43
CRT Connector
W=40mils
+5VS
+R_CRT_VCC
D9
D10
D11
D12
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
1
RB411D_SOT23
W=40mils
2
1.1A_6VDC_FUSE
1
C425
0.1U_0402_16V4Z
2
+3VS
+CRT_VCC
F1
+CRT_PULLUP
1
JP5
EMC_NB_CRT_R
(8) EMC_NB_CRT_R
1
2 CRT_R_L
L26
FCM2012C-800_0805
1
2 CRT_G_L
L27
FCM2012C-800_0805
1
2 CRT_B_L
L28
FCM2012C-800_0805
EMC_NB_CRT_G
(8) EMC_NB_CRT_G
EMC_NB_CRT_B
R254
(8) EMC_NB_CRT_B
R255
R256
C426
C427
C428
C430
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
DDC_MD2
C431
C429
6P_0402_50V8K
2
2
6P_0402_50V8K
2
6P_0402_50V8K
6P_0402_50V8K
75_0402_1%
75_0402_1% 75_0402_1%
2
6P_0402_50V8K
6P_0402_50V8K
C432
+CRT_VCC
P
CRT_HSYNC
1
10K_0402_5%
1
L30
CRT_HSYNC_L
2
FCM1608C-121T_0603
CRT_VSYNC_L
2
FCM1608C-121T_0603
1
CRT_HSYNC_B
C435
10P_0402_50V8K
2006/02/07
C436
C434 2
68P_0402_50V8K
10P_0402_50V8K
2
0.1U_0402_16V4Z
P
CRT_VSYNC
CRT_VSYNC_B
(8) EMC_NB_CRT_VSYNC
C437
68P_0402_50V8K
U12
OE#
1
C438
DSUB_15
1
+CRT_VCC
CRT_DECT (28)
DSUB_12
SN74AHCT1G125DCKR_SC70-5
SUYIN_070549FR015S208CR
2
1
R501 0_0402_5%
2
100P_0402_50V8J
U11
Y
(8) EMC_NB_CRT_HSYNC
2
R257
5
2
0.1U_0402_16V4Z
OE#
1
C433
1
L29
+CRT_VCC
SN74AHCT1G125DCKR_SC70-5
2
3
NB_DDC_DATA (8)
4.7K_0402_5%
1
3
S
DSUB_15
Q10
2N7002_SOT23
2
G
4.7K_0402_5%
R261
R260
4.7K_0402_5%
2
G
R259
2
DSUB_12
+3VS
R258
4.7K_0402_5%
+3VS
+3VS
NB_DDC_CLK (8)
Q11
2N7002_SOT23
2005/10/18
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
19
of
43
+3VS
1
R265 @
2
4.7K_0402_5%
PIDE_DREQ
1
R266 @
1
R267 @
1
R268 @
2
5.6K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
PIDE_INTRQ
PIDE_DD7
+5VS
0.1U_0402_16V4Z
1
C449
10U_0805_10V4Z
(15) PIDE_DA[0..2]
PIDE_DA[0..2]
(15) PIDE_DD[0..15]
PIDE_DD[0..15]
+5VS
C451
0.1U_0402_16V4Z
2
2
C448
1000P_0402_50V7K
C450
1U_0603_10V4Z
10U_0805_10V4Z
C452
1
C453
C454
C455
C456
C457
2
10U_0805_10V4Z
2
1000P_0402_50V7K
ODD Conn.
1U_0603_10V4Z
10U_0805_10V4Z
JP7
IDE_RESET#
PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0
(15) IDE_RESET#
+5VS
R272
PIDE_DIOW#
PIDE_DIORDY
PIDE_INTRQ#
PIDE_DA1
PIDE_DA0
PIDE_CS1#
(15) PIDE_DIOW#
(15) PIDE_DIORDY
(15) PIDE_INTRQ#
100K_0402_5%
IDE_LED#
(28) IDE_LED#
(15) PIDE_CS1#
+5VS
R270
2
475_0402_1%
@
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
IDE_RESET#
PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0
2005/10/20
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15
PIDE_DREQ
PIDE_DIOR#
PIDE_DMACK#
PIDE_PDIAG#
PIDE_DA2
PIDE_CS3#
PIDE_DMACK# (15,17)
1
2 R269
@ 100K_0402_5%
PIDE_DREQ
PIDE_DIOW#
PIDE_DIOR#
PIDE_DIORDY
PIDE_DMACK#
PIDE_INTRQ
PIDE_DA1
PIDE_DA0
PIDE_CS1#
IDE_LED#
(15) PIDE_DREQ
(15) PIDE_DIOW#
(15) PIDE_DIOR#
(15) PIDE_DIORDY
(15,17) PIDE_DMACK#
(15) PIDE_INTRQ#
PIDE_DREQ (15)
PIDE_DIOR# (15)
+5VS
PIDE_CS3# (15)
(15) PIDE_CS1#
+5VS
+5VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15
PCSEL 1
R271
2
475_0402_1%
PIDE_PDIAG#
PIDE_DA2
PIDE_CS3#
PIDE_CS3# (15)
+5VS
3
OCTEK_HDD-22SG1G_NR
(NEW)
OCTEK_CDR-50JL1G
(NEW)
PIDE_PDIAG# 1
R273
10K_0402_5%
Issued Date
Security Classification
2005/06/20
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Date:
Sheet
20
H
of
43
+S1_VCC
1
C464
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PCI_AD[0..31]
(13,17,23,25,31) PCI_AD[0..31]
PCI_CBE#[0..3]
(13,23,25,31) PCI_CBE#[0..3]
CLK_SD_48M
1
CLK_PCI_CB
+3VS
2
SM_CD#
43K_0402_5%
1
R276
R275
@ 10_0402_5%
R274
@ 10_0402_5%
C469
@ 15P_0402_50V8J
C470
@ 15P_0402_50V8J
(13,15,23,25,27,28,31) PCI_RST#
(13,23,25,31) PCI_FRAME#
(13,23,25) PCI_IRDY#
(13,23,25,31) PCI_TRDY#
(13,23,25) PCI_DEVSEL#
(13,23,25) PCI_STOP#
(13,23,25) PCI_PERR#
(13,23,25) PCI_SERR#
(13,23,25) PCI_PAR
(13) PCI_REQ#2
(13) PCI_GNT#2
(13) CLK_PCI_CB
+3VS
1
R278
R280 1
0_0402_5%
@
(22) MS_PWREN#
10K_0402_5%
PCI_AD20
1
R279
(13) PCI_PIRQE#
2
(13,25) PCI_PIRQH#
(13,27,28) SERIRQ
(28)
5IN1_LED#
(22)
SDOC#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
E1
J3
N1
N5
CBE3#
CBE2#
CBE1#
CBE0#
PCI_RST#
G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
L8
L11
RIOUT#_PME#
SUSPEND#
PCI_REQ#2
CLK_PCI_CB
2
F4
100_0402_5%
K8
SD_PULLHIGH N9
K9
N10
SM_CD#
L10
5IN1_LED#
N11
M11
SDOC#
J9
M10
A7
G13
B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
B7
A11
E11
H13
S1_REG#
S1_A12
S1_A8
S1_CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
C5
D5
S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
1
R277
S1_BVD1
S1_WP
D11
S1_A19
CINT#/READY_IREQ#
D6
S1_RDY#
SPKROUT
CAUDIO/BVD2_SPKR#
M9
B5
PCM_SPK#
S1_BVD2
A4
L12
D9
C6
A2
E10
J13
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14
MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3
H7
J8
H8
E9
G9
H9
G8
F9
MS_INS# (22)
XD_PWREN#
XD_PWREN# (22)
MSBS_XDD1
MSBS_XDD1 (22)
R281 1 4IN1@ 2 33_0402_5%
MS_CLK
MSCLK_XDRE# (22)
MSD0_XDD2
MSD0_XDD2 (22)
MSD1_XDD6
MSD1_XDD6 (22)
MSD2_XDD5
MSD2_XDD5 (22)
MSD3_XDD3
MSD3_XDD3 (22)
SMBSY#
SMCD#
SMWP#
SMCE#
H6
J7
J6
J5
XD_CD#
XD_WP#
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14
SD/MMC/MS/SM
VCC_SD
E8
F8
G7
SDCD#
SDWP/SMWPD#
SDPWREN33#
CLK_SD_48M
H5
SDCLKI
SD_CLK
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
F6
E5
E6
F7
F5
G6
SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4
G5
GND_SD
+3VS
C465
4.7U_0805_10V4Z
C466
0.1U_0402_16V4Z
S1_IOWR# (22)
+S1_VCC
S1_IORD# (22)
S1_OE# (22)
S1_CE2# (22)
C467
0.1U_0402_16V4Z
C468
0.1U_0402_16V4Z
S1_REG# (22)
S1_CE1# (22)
S1_RST
(22)
S1_WAIT# (22)
S1_INPACK# (22)
S1_WE# (22)
S1_A16
2
33_0402_5%
S1_BVD1 (22)
S1_WP
(22)
S1_CD2#
S1_RDY# (22)
C471
PCM_SPK# (32)
S1_BVD2 (22)
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_CD1#
2
(22)
(22)
(22)
(22)
C472
10P_0402_50V8K
1
10P_0402_50V8K
1
XD_BSY# (22)
XD_CD# (22)
XD_WP# (22)
XD_CE# (22)
R283
2.2K_0402_5%
4IN1@
CB714_LFBGA169
1
D3
H2
L4
M8
K11
F12
C10
B6
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
(12) CLK_SD_48M
R282 1 4IN1@ 2 33_0402_5%
(22) SDCM_XDALE
(22) SDDA0_XDD7
(22) SDDA1_XDD0
(22) SDDA2_XDCL
(22) SDDA3_XDD4
(22) SDCK_XDWE#
GRST#
E7
S1_D[0..15] (22)
B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13
IDSEL
SD_CD#
SD_WP#
SD_PWREN#
+VCC_SD
S1_A[0..25] (22)
S1_D[0..15]
PCI_RST#
MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1
S1_A[0..25]
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
(22)
SD_CD#
(22)
SD_WP#
(22) SD_PWREN#
IDSEL:AD20
(PIRQE#/B#,
GNT#2,
REQ#2)
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
2
0.1U_0402_16V4Z
1
C463
M12
N12
0.1U_0402_16V4Z
1
C462
VCCA2
VCCA1
1
C461
CARDBUS
1
C460
VCCD1#
VCCD0#
0.1U_0402_16V4Z
2
1
C459
PCI Interface
0.1U_0402_16V4Z
U13
1
C458
+3VS
VPPD0
VPPD1
VCCD0#
VCCD1#
M13
N13
40mil
0.1U_0402_16V4Z
VPPD0
VPPD1
VCCD0#
VCCD1#
VPPD1
VPPD0
+3VS
(22)
(22)
(22)
(22)
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
21
of
43
PCMCIA Socket
+S1_VCC
13
12
11
VCC
VCC
VCC
12V
W=40mil
C476
10
VCCD0
VCCD1
VPPD0
VPPD1
1
2
15
14
1
5
6
16
R285
10K_0402_5%
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
3.3V
3.3V
VCCD0#
VCCD1#
VPPD0
VPPD1
C475
0.1U_0402_16V4Z
C478
S1_OE#
S1_WP
S1_RST
S1_CE1#
S1_CE2#
2
1
R290
VCCD1#
1
R291
C479
2
10U_0805_10V4Z
VCCD0# (21)
VCCD1# (21)
VPPD0 (21)
VPPD1 (21)
CP2211FD3_SSOP16
VCCD0#
S1_CE1#
(21)
(21)
(21)
S1_CE2#
S1_OE#
S1_VS1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(21)
S1_A[0..25]
(21)
S1_D[0..15]
(21)
S1_IORD#
(21)
S1_IOWR#
S1_A[0..25]
S1_D[0..15]
(21)
S1_WE#
(21)
S1_RDY#
OC
SHDN
3
4
GND
W=40mil
C481
+S1_VPP
5V
5V
+3VS
VPP
(21)
1
C474
C477
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
C480
+S1_VPP
40mil
+5VS
C473
10U_0805_10V4Z
2
40mil
U14
S1_CD1#
+S1_VCC
(21)
1
R284
2
R286
1
R287
1
R288
1
R289
2
1
2
2
2
+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
2
10K_0402_5%
2
10K_0402_5%
(21)
S1_VS2
(21)
S1_RST
(21)
S1_WAIT#
(21) S1_INPACK#
+VCC_SD
1
1
1
C482
C483
C484
4IN1@
4IN1@
4IN1@
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
40mil
(21) SD_PWREN#
SD_PWREN#
SDOC#
G528_SO8
4IN1@
XD_PWREN#
2
R294
XD_CD#
1
4IN1@ 43K_0402_5%
SDOC#
(21)
R295
300_0402_5%
4IN1@
+VCC_XD
2
G
S
MSCLK_XDRE#
2
4IN1@ 2.2K_0402_5%
SDCK_XDWE#
2
4IN1@ 2.2K_0402_5%
XD_CE#
2
4IN1@ 2.2K_0402_5%
XD_BSY#
2
4IN1@ 2.2K_0402_5%
1
R301
2
0_0603_5%
4IN1@
+VCC_SD
S1_BVD1
S1_WP
S1_CD2#
SDCK_XDWE# 1
C487
2 4IN1@
10P_0402_50V8K
MSCLK_XDRE# 1
C488
2 4IN1@
10P_0402_50V8K
GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
DATA9 GND
DATA2 GND
DATA10
WP
CD2#
GND
GND
(21) SDDA1_XDD0
(21) MSBS_XDD1
(21) MSD0_XDD2
(21) MSD3_XDD3
(21) SDDA3_XDD4
(21) MSD2_XDD5
(21) MSD1_XDD6
(21) SDDA0_XDD7
(21) SDCK_XDWE#
(21)
XD_WP#
(21) SDCM_XDALE
(21)
XD_CD#
(21)
XD_BSY#
(21) MSCLK_XDRE#
(21)
XD_CE#
(21) SDDA2_XDCL
(NEW)
69
70
SANTA_130601-7_LT
4 IN 1 Socket
34
+VCC_XD
S1_BVD2
(21)
JP9
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
(HDQ70)
JP10
(21) MS_PWREN#
Q12
2N7002_SOT23
4IN1@
1
R296
1
R298
1
R299
1
R300
S1_REG#
S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
1
1
C485
C486
4IN1@
4IN1@
0.1U_0402_16V4Z
2
2
10U_0805_10V4Z
8
7
6
5
OUT
OUT
OUT
FLG
12
R297
0_0402_5%
4IN1@
GND
IN
IN
EN#
(21)
(21)
(21)
(21)
+VCC_XD
1
2
3
4
+3VS
R292
10K_0402_5%
4IN1@
U15
(21) XD_PWREN#
XD_PWREN#
+VCC_XD
+3VS
R293
10K_0402_5%
4IN1@
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
XD-VCC
4 IN 1 CONN
SD-VCC
MS-VCC
SD / MMC / MS(PRO) / XD
SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7
26
27
28
29
30
31
32
33
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SDCK_XDWE#
XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL
24
25
23
18
19
20
21
22
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
14
3
+VCC_SD
SD-CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-WP-SW
15
16
17
11
12
13
2
35
SDCK_XDWE#
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCM_XDALE
SD_CD#
SD_WP#
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
4
8
9
7
5
6
10
MSCLK_XDRE#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MS_INS#
MSBS_XDD1
4IN1-GND
4IN1-GND
1
36
SD_CD# (21)
SD_WP# (21)
MS_INS# (21)
TAITW_R007-520-L3
4IN1@
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
PCMCIA Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
22
of
43
R302 1
U16
(13,21,25) PCI_PAR
(13,21,25,31) PCI_FRAME#
(13,21,25) PCI_IRDY#
(13,21,25,31) PCI_TRDY#
(13,21,25) PCI_DEVSEL#
(13,21,25) PCI_STOP#
76
61
63
67
68
69
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
(13,21,25) PCI_PERR#
(13,21,25) PCI_SERR#
70
75
PERR#
SERR#
30
29
REQ#
GNT#
25
INTA#
PCI_REQ#1
PCI_GNT#1
(13) PCI_PIRQG#
(25,28) LAN_PME#
31
PME#
(13,15,21,25,27,28,31) PCI_RST#
27
RST#
CLK_PCI_LAN
PM_CLKRUN#
(13) CLK_PCI_LAN
(13,25,27) PM_CLKRUN#
28
65
4
17
128
CLK_PCI_LAN
105
23
127
72
74
NC/M66EN
88
NC/AVDDH
AVDDH
10
120
NC/HSDAC+
NC/HG
NC/LG2
11
123
124
C489
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-
35
52
80
100
GND
GND
GND
GND
PIN
8100CL(10/100 LAN)
8110SBL(10/100/1000 LAN)
RSET
5.6K
2.49K
0.1U_0402_16V4Z
D
+3VALW
BOM structure
LAN_ACTIVITY# (24)
LAN_LINK# (24)
8100CL(10/100 LAN)
Stuff
No_Stuff
8110S@
No_Stuff
Stuff
No_Stuff
No_Stuff
(24)
(24)
(24)
(24)
LAN_X1
LAN_X2
R305 1
R306
1
1
2 1K_0402_5%
+3VS
2 15K_0402_5%
2 8100C@ 5.6K_0603_1%
R307
2 8110S@ 2.49K_0603_1%
R308
20mils
+LAN_AVDDH
1
1
8110S@
2
1
R310 0_0402_5%
R309 0_0805_5%
2
8110S@
+3VALW
+3VALW
C491
C490
8110S@ 0.1U_0402_16V4Z
2
8110S@ 0.1U_0402_16V4Z
2
+3VALW
C492
1U_0603_10V4Z
2
1
CTRL25
9
13
8110S@
2SB1197K_SOT23
CTRL25
CTRL25
CTRL12
125
CTRL12
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
LAN_X1 1
AVDDL
AVDDL
AVDDL
AVDDL
VDD12
VDD12
VDD12
VDD12
VDD12
126
32
54
78
99
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
24
45
64
110
116
NC
C496
27P_0402_50V8J
2
1
1
C497
27P_0402_50V8J
1
C498
0.1U_0402_16V4Z
1
C499
0.1U_0402_16V4Z
1
C500
0.1U_0402_16V4Z
1
C495
2 0.1U_0402_16V4Z
2
8110S@
1
C501
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
+LAN_AVDDL
+LAN_AVDDL25
20mils
R314 0_0402_5%
2
2
+2.5V_LAN
8110S@
1
C503
0.1U_0402_16V4Z
1
C504
0.1U_0402_16V4Z
1
C505
0.1U_0402_16V4Z
+LAN_DVDD
1
1
C507
0.1U_0402_16V4Z
1
C508
0.1U_0402_16V4Z
40mils
1
C509
0.1U_0402_16V4Z
C510
0.1U_0402_16V4Z
40mils
R316 0_0805_5%
2
8110S@
R317 0_0805_5%
1
2
8100C@
R312 0_0805_5%
2
8100C@
R313 0_0805_5%
1
2
8110S@
C506
0.1U_0402_16V4Z
+3VALW
+2.5V_LAN
+1.2V_LAN
+2.5V_LAN
+1.2V_LAN
2
C512
C513
C514
C515
8110S@ 0.1U_0402_16V4Z
8110S@
8110S@
1
1
1
1
R318
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
V_12P
12
1
2
+2.5V_LAN
8100C@
0_0402_5%
20mils 1 C517
+LAN_AVDDH
R319 1
2
8110S@ 0_0402_5%
0.1U_0402_16V4Z
2
8110S@
C516
0.1U_0402_16V4Z
1 8110S@
Security Classification
2005/07/29
Deciphered Date
2006/07/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C494
8110S@
4.7U_0805_10V4Z
C493
4.7U_0805_10V4Z
+3VALW
1
Issued Date
40mils
40mils
2 LAN_X2
25MHZ_20P
+1.2V_LAN
Q13
2
B
22
48
62
73
112
118
3
7
20
16
CTRL12
+2.5V_LAN
Q14
2SB1197K_SOT23
2
B
Y4
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
8100C@
8110SBL(10/100/1000 LAN)
8100C@
NC/VSS
NC/VSS
RTL8110SBL_LQFP128
AT93C46-10SI-2.7_SO8
1
2
R303 0_0402_5%
2
1
R304 @ 0_0402_5%
LINK_1000#
2
C511
18P_0402_50V8J
@
+3VALW
5
6
7
8
GND
NC
NC
VCC
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
GND/VSS
GND/VSS
GND/VSS
21
38
51
66
81
91
101
119
10_0402_5%
@
R315
121
122
CLK
CLKRUN#
ACTIVITY#
LINK_100#
DO
DI
SK
CS
14
15
18
19
X1
X2
Power
(13)
(13)
4
3
2
1
IDSEL
1
2
5
6
2 3.6K_0402_5%
U17
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
46
2 LAN_IDSEL
100_0402_5%
117
115
114
113
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
C/BE#0
C/BE#1
C/BE#2
C/BE#3
1
R311
LED0
LED1
LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
92
77
60
44
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
108
109
111
106
EEDO
AUX/EEDI
EESK
EECS
IDSEL:AD22
(PIRQG#,
GNT#1,
REQ#1)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
LAN I/F
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
PCI I/F
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_AD22
PCI_AD[0..31]
(13,17,21,25,31) PCI_AD[0..31]
(13,21,25,31)
(13,21,25,31)
(13,21,25,31)
(13,21,25,31)
LAN RTL8110SBL
Document Number
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Sheet
1
23
of
43
LAN RTL8100CL
D
C710
220P_0402_50V7K
JP11
LAN_ACTIVITY#
(23) LAN_ACTIVITY#
T1
0.1U_0402_16V4Z
2
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
RJ45_MDI1RJ45_MDI1+
MCT3
R331
R332
C723
2 0.1U_0402_16V4Z
C5281
75_0402_1%
Yellow LED+
PR4-
RJ45_MDI3+
PR4+
RJ45_MDI1-
PR2-
RJ45_MDI2-
PR3-
RJ45_MDI2+
PR3+
RJ45_MDI1+
PR2+
R333
RJ45_MDI0-
PR1-
75_0402_1%
RJ45_MDI0+
PR1+
MCT4
RJ45_MDI0RJ45_MDI0+
LF-H80P_16P
Yellow LED-
11
RJ45_MDI3-
R330
C724
0.1U_0402_16V4Z
1
RD+
RDCT
NC
NC
CT
TD+
TD-
1 300_0402_5%
1
49.9_0402_1%1
C5271
LAN_MIDI0LAN_MIDI0+
1
R328
49.9_0402_1%
1
2
3
4
5
6
7
8
LAN_MIDI1LAN_MIDI1+
LAN_MIDI1LAN_MIDI1+
(23)
(23)
R320
+3VALW
12
(23) LAN_LINK#
+3VALW
0.1U_0402_16V4Z
2
LAN_LINK#
R327
10
1 300_0402_5%
SHLD2
14
SHLD1
13
Green LED-
Green LED+
SUYIN_100073FR012G101ZL
2 0_0402_5%
2 0_0402_5%
R336 1
R337 1
2 0_0402_5%
2 0_0402_5%
C711
220P_0402_50V7K
RJ45_GND
R334 1
R335 1
RJ45_MDI2+
RJ45_MDI2-
RJ45_MDI3+
RJ45_MDI3-
R338
75_0402_1%
2
1
C525
2
75_0402_1%
LANGND
1
C526
C520
1000P_1206_2KV7K
R339
2006/03/27
RJ45_GND
4.7U_0805_10V4Z
B
0.1U_0402_16V4Z
Security Classification
2005/07/29
Issued Date
Deciphered Date
2006/07/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Sheet
1
24
of
43
+3VS
+1.5VS
+3VALW
+3VALW
+3VS
+5VS
0.1U_0402_16V4Z
1
1
C535
1
C536
1000P_0402_50V7K
C537
10U_0805_10V4Z
2
C538
1
C539
1
C541
1000P_0402_50V7K
1000P_0402_50V7K
1
C540
2
W=40mils
0.1U_0402_16V4Z
C543
C544
0.1U_0402_16V4Z
2
2
C542
4.7U_0805_10V4Z
2
MINI_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK
(12) CLK_PCIE_MINI1#
(12) CLK_PCIE_MINI1
PCI_AD[0..31]
(13,21) PCI_PIRQH#
+3VS
W=40mils
CLK_PCI_MINI
(13) CLK_PCI_MINI
(13)
WL_OFF#
1
RB751V_SOD323
PCI_REQ#3
PCI_REQ#3
PCI_AD31
PCI_AD29
CLK_PCI_MINI
(30) WLAN_BT_DATA
(13,21,23,31) PCI_CBE#3
PCI_AD27
PCI_AD25
WLAN_BT_DATA
PCI_AD23
PCI_AD21
PCI_AD19
R341
@ 10_0402_5%
(13,21,23,31) PCI_CBE#2
(13,21,23) PCI_IRDY#
1
C546
(13,23,27) PM_CLKRUN#
@ 10P_0402_50V8K (13,21,23) PCI_SERR#
2
(13,21,23) PCI_PERR#
(13,21,23,31) PCI_CBE#1
PCI_AD17
PCI_CBE#2
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_CBE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
+5VS
+5VS
W=40mils
PCI_AD1
W=30mils
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
(7) PCIE_WLAN_C_RX_N1
(7) PCIE_WLAN_C_RX_P1
RING
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
(7) PCIE_WLAN_C_TX_N1
(7) PCIE_WLAN_C_TX_P1
W=40mils
+5VS
PCI_PIRQF# (13)
W=40mils
+3VALW
PCI_RST# (13,15,21,23,27,28,31)
+3VS
PCI_GNT#3 (13)
W=40mils
PCI_GNT#3
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
MINI_PME# (23,28)
WLAN_BT_CLK (30)
WLAN_BT_CLK
PCI_AD30
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
+3VS
PCI_FRAME# (13,21,23,31)
PCI_TRDY# (13,21,23,31)
PCI_STOP# (13,21,23)
USB CAM
C533
MINI1@
0.1U_0402_16V4Z
C534
MINI1@
0.1U_0402_16V4Z
+3VS
+1.5VS
MINI1_OFF#
MINI1_OFF# (28)
PCI_RST# (13,15,21,23,27,28,31)
+3VALW
SB_SMBCLK
SB_SMBDATA
SB_SMCLK (10,11,12,14)
SB_SMDATA (10,11,12,14)
2006/03/07
(MINI1_LED#)
FOX_AS0B226-S99N-7F
MINI1@
@
R506
1
1 0.1U_0402_16V4Z
PCI_DEVSEL# (13,21,23)
C727
2
JP37
1
2
3
4
5
GND1
GND2
PCI_CBE#0 (13,21,23,31)
1
2
3
4
5
6
7
0_0402_5%
2
L54
USBP2-_L
USBP2+_L
1
4
1
4
USBP2-
USBP2+
USBP2-
(14)
USBP2+
(14)
WCM2012F2S-900T04_0805
1
2
ACES_88266-05001
R507
@
W=20mils
PCI_PAR (13,21,23)
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
P-TWO_A53921-A0G16-P
C532
MINI1@
0.1U_0402_16V4Z
2 R340 PCI_AD18
100_0402_5%
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_CBE#0
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
G1
G2
G3
G3
WL_OFF#
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
C531
MINI1@
4.7U_0805_10V4Z
53
54
55
56
D16
(28)
PCI_AD[0..31] (13,17,21,23,31)
JP13
TIP
JP12
(14) MINI_WAKE#
(12) MINI1_CLKREQ#
IDSEL:AD18
(PIRQF/H#,
GNT#3,
REQ#3)
C530
MINI1@
0.1U_0402_16V4Z
C545
0.1U_0402_16V4Z
1000P_0402_50V7K
0.1U_0402_16V4Z
C529
MINI1@
4.7U_0805_10V4Z
0_0402_5%
3
+3VALW
(Change to SP070003200)
Peak
Normal
+3VS
1000
750
+3VALW
330
250
+1.5VS
500
375
Normal
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
25
of
43
W=80mils
+USB_VCCA
1
+
C548
2
150U_D_6.3VM
C550
470P_0402_50V7K
2005/09/06
JP15
@
1
R489
1
2
3
4
2
0_0402_5%
L49
USB20_N0
USB20_P0
2
3
SUYIN_020173MR004S312ZL
USB20_N0_L
USB20_P0_L
ECQ60
WCM2012F2S-900T04_0805
1
R490
3
2
0_0402_5%
+USB_VCCA
+3VALW
+5VALW
1207 DEL
U18
C552
GND
IN
IN
EN#
G528_SO8
4.7U_0805_10V4Z
2
OUT
OUT
OUT
FLG
8
7
6
5
R342
100K_0402_5%
2
1
2
3
4
R343
10K_0402_5%
1
2
1
USB_EN#
(28,30) USB_EN#
USB_OC2# (14)
C553
0.1U_0402_16V4Z
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Sheet
E
26
of
43
C574
FIR@
C575
FIR@
C576
FIR@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
63
1
3
6
DLAD0
DLAD1
DLAD2
DLAD3
9
11
13
15
18
26
DLPC_CLK_33
DLDRQ1#
DLFRAME#
DCLKRUN#
DSER_IRQ
DSIO_14M
48
RXD1
TXD1
DRSR1#
RTS1#/SYSOPT0
CTS1#
DTR1#/SYSOPT1
RI1#
DCD1#
52
53
54
55
56
57
58
59
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
IRTX2
IRRX2
IRMODE/IRRX3
49
50
51
IRTXOUT
IRRX
IRMODE
GPIO
LPC_CLK_33
LDRQ1#
LDRQ0#
LFRAME#
CLKRUN#
SERIRQ
PCI_CLK
PCIRST#
SIO_14M
LPCPD#
IO_PME#
SERIAL I/F
10
12
24
14
16
19
21
22
23
25
47
27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61
IR
LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO
PCI_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#
+3VS
GPIO10
GPIO11
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
1207 DEL
1
2
R358 FIR@ 10K_0402_5%
1
2
R360 FIR@ 10K_0402_5%
1
2
R364 FIR@ 10K_0402_5%
1
2
R365 FIR@ 10K_0402_5%
1
2
R366 FIR@
10K_0402_5%
GND0
GND1
GND2
GND3
GND4
GND5
(13) LPC_DRQ0#
(13,17,28) LPC_FRAME#
(13,23,25) PM_CLKRUN#
(13,21,28) SERIRQ
(13) CLK_PCI_SIO
(13,15,21,23,25,28,31) PCI_RST#
(12) CLK_14M_SIO
1
2
+3VS
R361 1 FIR@ 210K_0402_5%
+3VS
R362
FIR@
10K_0402_5%
LAD0
LAD1
LAD2
LAD3
LPC I/F
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
64
2
4
7
DLPC I/F
(13,28)
(13,28)
(13,28)
(13,28)
3.3V
3.3V
3.3V
3.3V
3.3V
U21
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VTR
5
17
31
42
60
+3VS
RTS#1
Base I/O Address
* 0 = 02Eh
1 = 04Eh
CLK_PCI_SIO
2
CLK_14M_SIO
R368
@ 33_0402_5%
R367
@ 10_0402_5%
8
20
29
37
45
62
LPC47N207-JN_STQFP64
FIR@
C578
@ 15P_0402_50V8J
+IR_ANODE
C579
@ 22P_0402_50V8J
1 FIR@ 2
R369
0_1206_5%
1 FIR@ 2
R370
0_1206_5%
+3VS
C580
FIR@
FIR Module
2
4.7U_0805_10V4Z
W=60mil
+IR_3VS
JP19
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
1
2
3
4
5
6
7
8
9
10
+3VS
RP23
DSR#1
CTS#1
RI#1
DCD#1
1
2
3
4
+3VS
8
7
6
5
1 FIR@ 2
R371
47_1206_5%
4.7K_1206_8P4R_5%
FIR@
IRRX
+IR_3VS
1
W=40mil
1
C581
C582
FIR@
FIR@
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
4
6
8
IRED_C
RXD
VCC
GND
IRED_A
TXD
SD/MODE
MODE
1
3
5
7
T = 12mil
T = 12mil
IRTXOUT
IRMODE
TFDU6102-TR3_8P
FIR@
ACES_85201-10051
@
Issued Date
Security Classification
2005/06/20
Deciphered Date
2006/06/20
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
27
of
43
+3VALW
8
7
6
5
+3VALW
KB_CLK
KB_DATA
PS_CLK
PS_DATA
4.7K_1206_8P4R_5%
(31)
(31)
+3VALW
RP25
1
2
3
4
8
7
6
5
ARCADE#
FRD#
SELIO#
FSEL#
(29,37)
(29,37)
(4)
(4)
10K_1206_8P4R_5%
(30) EMPWR_BTN#
(14)
EC_SCI#
(30) E-MAIL_BTN#
(30)
IE_BTN#
(8)
ENBKL
(18)
BKOFF#
(38)
FSTCHG
(14)
EC_SMI#
(20) IDE_LED#
(30) USER_BTN#
(14) EC_SWI#
ARCADE#
3GSW_EN#
(31)
LID_SW#
(30)
BT_ON#
(35)
SYSON
(29,35,40,41) SUSP#
(42)
VR_ON
(21)
5IN1_LED#
(30) BTSW_EN#
(14) PBTN_OUT#
+3VALW
RP26
1
2
3
4
8
7
6
5
EMPWR_BTN#
E-MAIL_BTN#
IE_BTN#
USER_BTN#
100K_1206_8P4R_5%
+3VS
1
R386
2 5IN1_LED#
10K_0402_5%
+5VALW
RP27
1
2
3
4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
C598
2
4.7K_1206_8P4R_5%
+5VS
+3VALW
163
164
169
170
SCL1
SDA1
SCL2
SDA2
EMPWR_BTN#
EC_SCI#
E-MAIL_BTN#
IE_BTN#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
IDE_LED#
USER_BTN#
8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D
0.1U_0402_16V4Z
1
2
R388
(19) CRT_DECT
(30) CAPS_LED#
(30) NUM_LED#
(15) SATA_LED#
1
47K_0402_5%
(14) EC_GA20
(14) EC_KBRST#
1 TP_CLK
R390
1 TP_DATA
R391
3GSW_EN#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON
BTSW_EN#
PBTN_OUT#
CRT_DECT
CAPS_LED#
NUM_LED#
SATA_LED#
55
54
23
41
19
5
6
31
Analog To Digital
SMBus
Digital To Analog
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
EC_ON
EC_LID_OUT#
EC_MUTE
2
26
29
30
44
76
172
176
ON/OFF
5WAY_BTN
PM_SLP_S3#
PM_SLP_S5#
2
2
2
KBA1
1
R393
KBA4
1
R395
KBA5
1
R397
1 CRT_DECT
R502
1
R394
1
R396
1
R398
2
2
2
0_0402_5%
C594
0.1U_0402_16V4Z
ACOFF
(36,38)
USB_EN# (26,30)
EC_ON
(31)
EC_LID_OUT# (14)
EC_MUTE (33)
ON/OFF (31)
ACIN
(14,36)
5WAY_BTN
PM_SLP_S3# (14)
PM_SLP_S5# (14)
ECAGND
2
1
C595 0.01U_0402_16V7K
BATT_OVP (38)
MOVIE_BTN#
MUSIC_BTN#
BATT_TEMP (37)
R385
100K_0402_5%
2
1
5WAY_BTN
DAC_BRIG
99
100
IREF
101
EN_DFAN1
102
1
42
47
174 EC_PWROK
FAN_SPEED1
DPLL_TP
TEST_TP
Timer PinTOUT2/GPIO2F
175
EC_THERM#
E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
3
4
106
107
WLSW_EN#
E51_RXD
E51_TXD
(42)
DAC_BRIG (18)
IREF
(38)
EN_DFAN1 (34)
WL_OFF# (25)
MINI1_OFF# (25)
CRY1
CRY2
C596
EC_PWROK (15)
10P_0402_50V8K
2
PWR_LED (30)
PWR_SUSP_LED# (30)
BATT_GRN_LED# (30)
BATT_AMB_LED# (30)
WL_LED# (30)
BT_LED# (30)
E-MAIL_LED# (30)
MEDIA_LED# (30)
C597
10P_0402_50V8K
2
X2
32.768KHZ_12.5P_1TJS125DJ2A073
FAN_SPEED1 (34)
1
R387
1
R389
CRY2
CRY1
EAPD
2
0_0402_5%
2
@ 0_0402_5%
EAPD
EAPD
ENBKL
100K_0402_5%
DPLL_TP
1K_0402_5%
TEST_TP
1K_0402_5%
(32)
HD_EAPD# (32)
KB910Q B4_LQFP176
KB910 C1 VERSION
2
R377
Rd
INVT_PWM (18)
BEEP#
(32)
POUT
158
160
1
R376
C593
33K_0402_1%
Rb
AD_BID0
171
12
11
XCLKI
XCLKO
(30)
(30)
SKU_ID
EC_PME#
BATT_TEMP
SKU_ID
BATT_OVP
MOVIE_BTN#
MUSIC_BTN#
81
82
83
84
87
88
89
90
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM
FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#
ACOFF
PWR_LED
PWR_SUSP_LED#
BATT_GRN_LED#
BATT_AMB_LED#
WL_LED#
BT_LED#
E-MAIL_LED#
MEDIA_LED#
* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#
GPIO
KSO16
KSO17
100K_0402_5%
AD_BID0
2
0.1U_0402_16V4Z
85
86
91
92
93
94
97
98
+3VALW
A
159
161
Interface
17
35
46
122
137
167
2
4.7K_0402_5%
2
4.7K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
Wake Up
GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
1
100K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_CLK
TP_DATA
TP_DATA
Pulse
R374
Rc
1
PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3
2
R384
INVT_PWM
BEEP#
R373
100K_0402_5%
Ra
RP24
1
2
3
4
32
33
36
37
38
39
40
43
+3VALW
110
111
114
115
116
117
+5VS
GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
+3VALW
2 MUSIC_BTN#
100K_0402_5%
2 MOVIE_BTN#
100K_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
SKU ID definition,
Please see page 3.
IN
1
R381
1
R383
GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7
71
72
73
74
77
78
79
80
OUT
2 3GSW_EN#
100K_0402_5%
2 BTSW_EN#
100K_0402_5%
2 WLSW_EN#
100K_0402_5%
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
NC
1
R378
1
R379
1
R380
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17
NC
(23,25) PCI_PME#
X-BUS Interface
(23,25) LAN_PME#
@ ACES_85205-0400
+3VALW
EC_PME#
E51_RXD
E51_TXD
(23,25) MINI_PME#
FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
KSO[0..15] (29)
FRD#
FWR#
FSEL#
KSO[0..15]
1
2
3
4
1
2
3
4
1U_0603_10V4Z
(29)
(29)
(29)
R375
10K_0402_5%
C591
(29,30)
+3VALW
3G_LED#
KSI[0..7]
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN
(13,21,27) SERIRQ
+3VALW
JP20
KSI[0..7]
BATGND
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105
(13) CLK_PCI_LPC
(30)
For EC Tools
+3VALW
ECAGND
LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *
Internal Keyboard
R372 2
15
14
13
10
9
165
18
7
25
24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C592
@ 22P_0402_50V8J
2
1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
96
U22
(13,27) LPC_AD0
(13,27) LPC_AD1
(13,27) LPC_AD2
1 @ 33_0402_5%
(13,27) LPC_AD3
(13,17,27) LPC_FRAME#
(13,15,21,23,25,27,31) PCI_RST#
VCCBAT
95
2
2
0.1U_0402_16V4Z
20mil
VCCA
2
2
0.1U_0402_16V4Z
C586
AGND
C585
L36
ECAGND
1
2
FBM-L11-160808-800LMT_0603
L35
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
20mil
1
C587
C588
20mil
1000P_0402_50V7K 1000P_0402_50V7K
C589
1
1
1
C590
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
ENE-KB910-B4
ADB[0..7] (29)
0.1U_0402_16V4Z
1
2
GND
GND
GND
GND
GND
GND
0.1U_0402_16V4Z
1
1 C584
1
C583
KBA[0..19] (29)
ADB[0..7]
16
34
45
123
136
157
166
KBA[0..19]
R392
100K_0402_5%
2
1
+3VS
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EC ENE KB910
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
1
28
of
43
+3VALW
+3VALW
1
C599
2
R399
100K_0402_5%
5
Y
(28,35,40,41)
U23
G Vcc
FWE#
SUSP#
2
G
0.1U_0402_16V4Z
Q16
2N7002_SOT23
NC7SZ32P5X_NL_SC70-5
EC_FLASH# (14)
FWR#
(28)
INT_KBD Conn.
KSI[0..7]
KSI[0..7]
KSO[0..15]
+5VALW
(28,30)
KSO[0..15] (28)
2 0.1U_0402_16V4Z
+5VALW
C601 1
R400
100K_0402_5%
U25
(28,37) EC_SMB_CK1
(28,37) EC_SMB_DA1
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
(Right) KSO15
8
7
6
5
AT24C16N10SC-2.7_SO8
R401
100K_0402_5%
2006/01/23
INT_FLASH_EN#
C602 1
+3VALW
5
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
(Left)
ACES_85201-24051
2 @ 0.1U_0402_16V4Z
2 @ 100K_0402_5%
R402 1
+3VALW
JP21
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7
P
2
@
1
R403
FSEL#
OE#
FSEL#
INT_FLASH_SEL
2 INT_FSEL#
@ 22_0402_5%
R404
3
U26
1207 ADD
10K_0402_5%
SN74AHCT1G125DCKR_SC70-5
@
1
R405
(28)
4
U33
SN74AHCT1G125DCKR_SC70-5
(8,14) NB_SUS_STAT#
OE#
SB_INT_FLASH_SEL (14)
+3VALW
KSO15
C603 1
100P_0402_50V8J
KSO7
C604 1
100P_0402_50V8J
2
0_0402_5%
KSO14
C605 1
100P_0402_50V8J
KSO6
C606 1
100P_0402_50V8J
KSO13
C607 1
100P_0402_50V8J
KSO5
C608 1
100P_0402_50V8J
KSO12
C609 1
100P_0402_50V8J
KSO4
C610 1
100P_0402_50V8J
KSI0
C611 1
100P_0402_50V8J
KSO3
C612 1
100P_0402_50V8J
KSO11
C613 1
100P_0402_50V8J
KSI4
C614 1
100P_0402_50V8J
KSO10
C615 1
100P_0402_50V8J
KSO2
C616 1
100P_0402_50V8J
KSI1
C617 1
100P_0402_50V8J
KSO1
C618 1
100P_0402_50V8J
KSI2
C620 1
100P_0402_50V8J
KSO0
C621 1
100P_0402_50V8J
KSO9
C622 1
100P_0402_50V8J
KSI5
C623 1
100P_0402_50V8J
KSI3
C624 1
100P_0402_50V8J
KSI6
C625 1
100P_0402_50V8J
KSO8
C626 1
100P_0402_50V8J
KSI7
C627 1
100P_0402_50V8J
KBA[0..19]
(28)
ADB[0..7]
KBA[0..19]
ADB[0..7]
+3VALW
U27
(28)
FRD#
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
INT_FSEL#
FRD#
FWE#
22
24
9
CE#
OE#
WE#
JP22
VCC0
VCC1
31
30
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RP#
NC
READY/BUSY#
NC0
NC1
10
11
12
29
38
RESET#
GND0
GND1
23
39
SST39VF080-70_TSOP40
C619
0.1U_0402_16V4Z
2006/01/23
DEL SB_INT_FLASH_SEL
1
R406
2
100K_0402_5%
+3VALW
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
KBA17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
FRD#
FSEL#
KBA0
@ SUYIN_80065AR-040G2T
Issued Date
Security Classification
2005/06/20
Deciphered Date
2006/06/20
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
29
of
43
2006/01/23
ZZZ
LED8
+3VALW
BATT_AMB_LED#
45@
MDC Conn.
@
R508
0_0603_5%
JP24
2
3
3G_LED#
PWR_LED#
+5VALW
R410
680_0402_5%
1
2
AZ_SYNC_MDC
2 33_0402_5%
AZ_RST_MDC#
(14) AZ_SYNC_MDC
R408 1
(14) AZ_SDIN0_MDC
(14) AZ_RST_MDC#
1
3
5
7
9
11
AZ_SDOUT_MDC
(14) AZ_SDOUT_MDC
HT-110UYG_1204
3G_LED# (28)
HT-110UYG_1204
@
94/08/04
2
3
2
4
6
8
10
12
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
20mil
SYSON#
PWR_SUSP_LED#
PWR_SUSP_LED# (28)
HT-110UD_1204
AZ_BITCLK_MDC (14)
+3VALW
22P_0402_50V8J
ACES_88018-124G
1
PWR_LED#
S Q17
2N7002_SOT23
2
G
(28) PWR_LED
+5VALW
(35)
Q44
SI2301BDS_SOT23
AZ_BITCLK_MDC
1
C629
LED4
2
3
+5VS
LED11
GND
GND
GND
GND
GND
GND
+5VS
R415
300_0402_5%
1
2
LED2
13
14
15
16
17
18
R409
680_0402_5%
1
2
MDC
HT-110UD_1204
BATT_AMB_LED# (28)
2
3
+5VALW
R414
680_0402_5%
1
2
R411
680_0402_5%
1
2
C628
1U_0603_10V4Z
LED6
2
3
BATT_GRN_LED#
BATT_GRN_LED# (28)
JP26
HT-110UYG_1204
KSO17
KSI2
KSI5
KSO16
KSI3
KSI4
(28)
KSO17
(28,29)
KSI2
(28,29)
KSI5
(28)
KSO16
(28,29)
KSI3
(28,29)
KSI4
+5VALW
1
2
3
4
5
6
7
8
9
10
ACES_85201-10051
C631
0.1U_0402_16V4Z
To LED/B Conn.
@
1
R497
+5VS
2
0_0402_5%
JP27
+5VS
+5VS
680_0402_5%
3
2
3
2
R413
680_0402_5%
2
R412
LED10
HT-110NBQA_BULE_1204
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
31
32
33
34
35
36
LED9
HT-110UD_1204
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
GND
GND
GND
GND
GND
GND
PWR_LED#
(28) MEDIA_LED#
(28) CAPS_LED#
(28) NUM_LED#
(28) E-MAIL_LED#
(31) ON/OFFBTN#
(28) E-MAIL_BTN#
(28)
IE_BTN#
(28) USER_BTN#
(28) EMPWR_BTN#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
+5VALW
USB20_N4
USB20_P4
USBP4-
(14)
USBP4+
(14)
L52
WCM2012F2S-900T04_0805
1
2
@ R498
0_0402_5%
USB20_N6
USB20_P6
USB_EN# (26,28)
R499 0_0402_5%
1
2
@
WCM2012F2S-900T04_0805
4 4
3 3
USBP6-
(14)
USBP6+
(14)
ACES_88018-304G
1
1
BT_LED#
1
@ R500
BT_LED# (28)
5
3
WLSW_EN#
WLSW_EN# (28)
6
SW1
HSS110_4P
+3VALW
Bluetooth Conn.
BTSW_EN#
R417
100K_0402_5%
BTSW_EN# (28)
SW2
HSS110_4P
C632
@
0.1U_0402_16V4Z
3
5
2
2006/01/24
2006/03/03
5
5
6
6
2
0_0402_5%
BT_SW
WL_SW
(28)
BT_ON#
WL_LED# (28)
WL_LED#
L53
C633
+BT_VCC
1U_0603_10V4Z
Q18
JP28
1
2
3
4
5
6
7
8
SI2301BDS_SOT23
(14)
(14)
2005/09/04
Geneva
Grapevine
W=40mils
+BT_VCC
KSO16
KSO17
KSO16
KSO17
KSI0
VOL_UP
LEFT
KSI1
RIGHT
VOL_DOWN
KSI2
PLAY
ENTER
KSI2
PLAY
KSI3
STOP
KSI3
STOP
VOL_UP
KSI4
NEXT
KSI4
NEXT
VOL_DOWN
KSI5
REV
KSI5
REV
ARCADE_TV
KSI6
RECORD
USBP1+
USBP1-
(25) WLAN_BT_DATA
(25) WLAN_BT_CLK
C636
C637
4.7U_0805_10V4Z
0.1U_0402_16V4Z
ACES_87212-0800
2
Issued Date
Security Classification
2005/06/20
Deciphered Date
2006/06/20
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
30
of
43
ON/OFF switch
TOP Side
J3
2
2
1
@ JOPEN
1
@ JOPEN
+3VALW
+3VALW
Bottom Side
Power Button
J2
R418
100K_0402_5%
Lid Switch
R419
100K_0402_5%
51ON#
(28)
51ON#
(36)
SW3
LID_SW# (28)
ON/OFF
DAN202U_SC70
4
ON/OFFBTN#
(30) ON/OFFBTN#
D23
D24
@
PSOT24C_SOT23
C638
D25
RLZ20A_LL34
1000P_0402_50V7K
1
2005/09/04
MPU-101-81_4P
EC_ON
EC_ON
(28)
2
Q19
S 2N7002_SOT23
SCRL_U
SW4
EVQPLHA15_4P
1
R420
Scroll Up
2
G
10K_0402_5%
SCRL_R
SW6
EVQPLHA15_4P
1
5
6
SCRL_R
D26
@
PSOT24C_SOT23
SCRL_L
5
6
SCRL_L
Scroll Right
SW5
EVQPLHA15_4P
3
1
Scroll Left
5
6
BTN_R
Scroll Down
PCI_AD9
BTN_L
PCI_CBE#0 (13,21,23,25)
PCI_AD6 (13,21,23,25)
PCI_AD4 (13,21,23,25)
PCI_AD2 (13,21,23,25)
PCI_AD0 (13,21,23,25)
PCI_AD1 (13,21,23,25)
PCI_AD3 (13,21,23,25)
PCI_AD5 (13,21,23,25)
PCI_AD7 (13,21,23,25)
PCI_AD8 (13,21,23,25)
PCI_CBE#1 (13,21,23,25)
PCI_CBE#2 (13,21,23,25)
PCI_CBE#3 (13,21,23,25)
2
BTN_R
SW9
EVQPLHA15_4P
1
SCRL_D
BTN_L
2
PCI_CBE#0
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
PCI_AD1
PCI_AD3
PCI_AD5
PCI_AD7
PCI_AD8
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
D28
@
PSOT24C_SOT23
1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5
6
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5
6
Right
SW8
EVQPLHA15_4P
3
1
Left
2006/03/07
JP36
D27
@
PSOT24C_SOT23
2
5
6
SCRL_U
SCRL_D
SW7
EVQPLHA15_4P
3
1
To TP/B Conn.
JP29
CLK_PCI_DB (13)
+5VS
PCI_RST# (13,15,21,23,25,27,28)
PCI_FRAME# (13,21,23,25)
PCI_TRDY# (13,21,23,25)
PCI_AD9 (13,21,23,25)
+5VS
+5VS
ACES_85201-2005
(28)
(28)
TP_DATA
TP_CLK
C642
0.1U_0402_16V4Z
TP_DATA
TP_CLK
BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L
1
2
3
4
5
6
7
8
9
10
11
12
ACES_87151-1207
BTN_R
C639 1
2 @ 100P_0402_50V8J
SCRL_R
C640 1
2 @ 100P_0402_50V8J
SCRL_U
C641 1
2 @ 100P_0402_50V8J
SCRL_L
C643 1
2 @ 100P_0402_50V8J
SCRL_D
C644 1
2 @ 100P_0402_50V8J
BTN_L
C645 1
2 @ 100P_0402_50V8J
TP_DATA
C646 1
2 @ 100P_0402_50V8J
TP_CLK
C647 1
2 @ 100P_0402_50V8J
2005/06/20
Issued Date
Security Classification
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
31
of
43
+VDDA
1
R421
10K_0402_5%
1
C648
2
1U_0603_10V4Z
R423
10K_0402_5%
2
C655 1
1U_0603_10V4Z
PCM_SPK#
DELAY
ERROR
SD
SENSE or ADJ
CNOISE
GND
40mil
R427
2
B
E
R422
30K_0402_1%
1
2
C652
4.85V
C651
10U_0805_10V4Z
1
C654
1
2
MONO_IN
R425
10K_0402_1%
0.1U_0402_16V4Z
1U_0603_10V4Z
1
2
Q20
R426
2SC2411K_SC59 2.4K_0402_5%
560_0402_5%
+VDDA
2
1
1
L38 1
C649
C650
2
KC FBM-L11-201209-221LMAT_0805
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
VOUT
SI9182DH-AD_MSOP8
R424
560_0402_5%
(21)
VIN
C653 1
1U_0603_10V4Z
BEEP#
(28)
U28
4
60mil
L37 1
2
KC FBM-L11-201209-221LMAT_0805
+5VS
R428
560_0402_5%
C656 1
1U_0603_10V4Z
SB_SPKR
(14)
D29
RB751V_SOD323
2
R429
10K_0402_5%
HD Audio Codec
+AVDD_AC97
LINE_L
(33)
LINE_R
LINE_L
C663
LINE_R
C664
C665
2005/10/26
C666
C667
J4
1
(33)
MIC1_L
MIC1_L
C669
2
@
2
@
2
@
2
1
1
1
J5
JUMP_43X79
1
R432
2
0_0603_5%
1
R433
2
0_0603_5%
2
0_0603_5%
C728
220P_0402_50V7K
MIC2_L
SURR_OUT_L
39
17
MIC2_R
SURR_OUT_R
41
LINE1_L
SIDESURR_OUT_L
45
LINE1_R
SIDESURR_OUT_R
46
CD_L
CEN_OUT
43
CD_R
LFE_OUT
44
BIT_CLK
SDATA_IN
2
3
13
34
GNDA
10U_0805_10V4Z
AMP_LEFT (33)
AMP_RIGHT (33)
2 22P_0402_50V8J
AZ_BITCLK_HD (14)
MIC1_L
MIC1_R
PIN37_VREFO
37
LINE1_VREFO
29
LINE2_VREFO
31
SYNC
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
SDATA_OUT
GPIO0
GPIO1
SENSE A
SENSE B
R430 1
2 33_0402_5%
AZ_SDIN3_HD (14)
10mil
MIC1_VREFO_L
AC97_VREF
10mil
1
SPDIFI/EAPD
48
SPDIFO
VAUX
33
DVSS1
DVSS2
AVSS1
AVSS2
26
42
R431
20K_0402_1%
@
C671
10U_0805_10V4Z
ALC883-LF_LQFP48
GND
C668 1
CD_GND
47
4
7
+3VS
C659
16
FBM-L11-160808-800LMT_0603
L55
AMP_RIGHT
RESET#
DVDD2
AMP_LEFT
36
10
2006/03/31
35
FRONT_OUT_R
11
(28) HD_EAPD#
1
R434
FRONT_OUT_L
LINE2_R
(14) AZ_SYNC_HD
P/N :SM010012010
LINE2_L
(14) AZ_RST_HD#
C658
0.1U_0402_16V4Z
15
PCBEEP
(14) AZ_SDOUT_HD
14
12
(28)
EAPD
(33) NBA_PLUG
2005/09/20
U29
LINE_C_L
23
1U_0603_10V4Z
LINE_C_R
24
1U_0603_10V4Z
CD_L_RC
18
1U_0603_10V4Z
CD_R_RC
20
1U_0603_10V4Z
CD_AGND_RC19
1U_0603_10V4Z
MIC1_C_L
21
1U_0603_10V4Z
22
MONO_IN
JUMP_43X79
C657
C662
2
0.1U_0402_16V4Z
DVDD1
L39
MBK1608301YZF_0603
2
1
+3VS_DVDD
(33)
0.1U_0402_16V4Z
40mil
1
38
C660
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C661
25
AVDD2
L40 1
2
FBM-L11-160808-800LMT_0603
AVDD1
+VDDA
20mil
DGND
(33)
SPDIF
SPDIF
2
1
L56
C717
120P_0402_25V8K
@ 2
AGND
1
FBM-L11-160808-800LMT_0603
Issued Date
Security Classification
2005/06/20
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Date:
Sheet
32
H
of
43
+5VAMP
JP30
SPKL+
SPKLSPKR+
SPKR-
R439
R435
R436
R437
R438
+5VAMP
C672
0.1U_0402_16V4Z
2006/03/31
C673
4.7U_0805_10V4Z
1 0.1U_0402_16V4Z
VOL_AMP
AMP_LEFT
AMP_RIGHT_C-1
1
2
C677
0.47U_0603_16V4Z
1
(32) AMP_RIGHT
1
C676
1
C678
2
1U_0603_10V4Z
2
1U_0603_10V4Z
AMP_LEFT_C
AMP_RIGHT_C
BYPASS
LOUT-
SPKL-
VOLMAX
1
2
VOLUME
6
3
EC_MUTE
MUTE
SHUTDOWN#
20mil
R445
@
1K_0402_5%
VDD
VDD
13
1
2
3
4
ACES_85204-0400
Speaker Conn.
ROUT-
16
SPKR-
LOUT+
11
SPKL+
ROUT+
14
SPKR+
GND
GND
5
12
SE/BTL#
LINRINBYPASS
EC_MUTE (28)
APA2068KAI-TRL_SOP16
C679
4.7U_0805_10V4Z
C718
330P_0402_50V7K
R444
@
1K_0402_5%
2
VOLMAX
1
0_0402_5%
NBA_PLUG
(32)
2
R443
C675
0.47U_0603_16V4Z
AMP_LEFT_C-1
1
2
10
15
SPK_L+
SPK_LSPK_R+
SPK_R-
R442
100K_0402_5%
1
2
U30
C674 2
20mil
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
R441
100K_0402_5%
2
R440
2
2
2
2
+5VAMP
W=40mil
VOL_AMP
1.8K_0402_5%
10K_0402_5%
1
1
1
1
C719
330P_0402_50V7K
JP31
HPF Fc = 338Hz
R482
HPOUT_L_2
HPOUT_R_2
2
1
L47
1
L48
+5VAMP
R484
47_0603_5%
(32)
SPDIF
SPDIF
+5VSPDIF
47_0603_5%
HPOUT_L_3
2
FBM-11-160808-700T_0603
HPOUT_R_3
2
FBM-11-160808-700T_0603
SPDIF_PLUG#
2
1
R483
100K_0402_5%
1
2
6
3
5
4
7
8
10
9
ACES_20234-0101
2 HPOUT_L_1
150U_D_6.3VM
2 HPOUT_R_1
150U_D_6.3VM
SPKL+ 1
C720
SPKR+ 1
C721
+5VAMP
+5VAMP
R485
100K_0402_5%
LINE-IN JACK
2SPDIF_PLUG#
NBA_PLUG
NBA_PLUG
Q41
2N7002_SOT23
D
1
2SPDIF_PLUG#
G
20mil
(32)
+5VSPDIF
JP32
(32)
Q40
SI2301BDS_SOT23
(32)
LINE_R
LINE_R
LINE_L
LINE_L
L43
1
FBM-11-160808-700T_0603
2
1
L44
2
FBM-11-160808-700T_0603
1
C685
220P_0402_50V7K
4
LINE_R_R
SUYIN_010164FR006G118ZL
C686
220P_0402_50V7K
2
MIC1_VREFO_L
MIC JACK
1
2
4
2
JP34
JP33
5
R448
2.2K_0402_5%
2005/09/06
3
6
2
1
INT_MIC_L
(32)
MIC1_L
1
L46
2 FBM-11-160808-700T_0603
ACES_85204-0200
MIC1_L_1
1
C687
220P_0402_50V7K
2005/06/20
Issued Date
SUYIN_010164FR006G118ZL
Security Classification
3
6
2
1
LINE_L_R
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
E
33
of
43
FAN1 Conn
H6
H_C236D162
H7
H_R315D197
H2
H_R366X394RDD138
H5
H_C177D177N
H3
H_C236D162
H8
H_R315D177
H4
H_R315X394D138
H1
H_S394DD138
H9
H_R315D177
H10
H_R315D197
+5VS
@
@
1
@
1
@
1
+5VS
10U_1206_16V4Z
2
C689
1
H14
H_S394D138
H16
H_C158D158N
C691
1000P_0402_50V7K
1
2
H19
H_C236D162
@
H20
H_C236D162
@
+3VS
C690
10U_1206_16V4Z
1
2
H15
H_S394X394D138
G993P1UF_SOP8
H13
H_S374X354D138
D31
1N4148_SOT23
1
2
D30
1SS355_SOD323
8
7
6
5
GND
GND
GND
GND
1
R451
10K_0402_5%
H29
H_C236D162
@
1
@
CF15
CF16
CF17
CF9
CF18
CF10
@
CF19
@
1
CF8
@
1
CF14
CF7
@
CF20
@
1
CF13
CF6
@
CF12
CF5
@
CF11
CF4
@
CF3
@
FD6
@
CF2
@
FD5
@
CF1
FD4
@
FD3
@
FD2
@
FD1
@
1
H_TR315X295UBR276X291UD138
H28
H_S354X335RUD138
H27
H30
H_TR315X295UBR276X291UD138
2
H26
H_O217X157D217X157N
@
1
H25
H_S374X354RD138
ACES_85205-03001
H24
H_S354X293UD138
H23
H22
H_TS559X295LUBS394X276UD138 H_S394D138
H21
H_TS394X374BR394X374D138
C692
1000P_0402_50V7K
1
2
3
JP35
(28) FAN_SPEED1
40mil
+VCC_FAN1
CF21
@
1
EN_DFAN1
VEN
VIN
VO
VSET
(28)
1
2
3
4
U31
+VCC_FAN1
EN_DFAN1
Issued Date
Security Classification
2005/06/20
Deciphered Date
2006/06/20
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date:
, 11, 2006
Sheet
34
of
43
+1.8VALW TO +1.8VS
2 0.1U_0603_25V7K
C698
+VSBP
Q23
3
SUSP
2
2
G
G
2N7002_SOT23
2N7002_SOT23
C699
D
Q24
4.7U_0805_10V4Z
1
2
3
4
SI4800BDY_SO8
1
4.7U_0805_10V4Z
2006/03/09
R454
470_0603_5%
R456
1
2
0.1U_0603_25V7K
C696
C695
1U_0603_10V4Z
S
S
S
G
C700
Q25
S
+VSBP
33K_0402_1%
SUSP
2
2
G
G
2N7002_SOT23
2N7002_SOT23
1207 DEL
2
R453
470_0603_5%
D
D
D
D
R455 2
100K_0402_5%
8
7
6
5
D
Q26
S
Q22
C694
10U_0805_10V4Z
C697
+5VS
2
1U_0402_6.3V4Z
1
SI4800BDY_SO8
1
4.7U_0805_10V4Z
C693
1
2
3
4
S
S
S
G
D
D
D
D
+5VALW
Q21
8
7
6
5
+5VALW TO +5VS
+1.8VS
+1.8VALW
+1.8VALW TO +1.8V
+1.8VALW
+1.8V
Q30
(28,29,40,41) SUSP#
10K_0402_5%
SYSON#
D
Q31
2
G
(28)
SYSON
Q32
S
R462
2
G
S
R463
(30)
SYSON#
SUSP
2
G
2N7002_SOT23
(41)
SUSP
SYSON#
2
G
2N7002_SOT23
R460
10K_0402_5%
1
+VSBP
R459
R458
470_0603_5%
SI4800BDY_SO8
1
0.1U_0603_25V7K
4.7U_0805_10V4Z
1U_0402_6.3V4Z
1 R461
2
100K_0402_5%
1
C705
D
Q29
+5VALW
1
2
3
4
+5VALW
C703
S
S
S
G
C704
4.7U_0805_10V4Z
D
D
D
D
8
7
6
5
C702
Q28
2N7002_SOT23
2N7002_SOT23
10K_0402_5%
1
10K_0402_5%
+3VALW TO +3VS
D
Q36
D
SUSP
2
G
2N7002_SOT23
Q37
S
2
R469
470_0603_5%
@
1
R468
470_0603_5%
@
Q35
S
2
R467
470_0603_5%
@
1
SUSP
2
2
G
G
2N7002_SOT23
2N7002_SOT23
R466
470_0603_5%
D
D
2@ SUSP
G
2N7002_SOT23
Q38
S
D
2@ SUSP
G
2N7002_SOT23
Q39
S
2@ SUSP
G
2N7002_SOT23
+VSBP
+1.05VS
Q34
68K_0402_1%
+1.5VS
+0.9VS
1U_0402_6.3V4Z R465
1
+1.2VS
R464
470_0603_5%
4.7U_0805_10V4Z
2 0.1U_0603_25V7K 2
C707
SI4800BDY_SO8
1
1
C709
1
2
3
4
4.7U_0805_10V4Z
C706
S
S
S
G
C708
D
D
D
D
Q33
8
7
6
5
+3VS
+3VALW
Security Classification
Issued Date
2005/11/01
2006/11/30
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
HCL51 LA-3211P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
A
Sheet
E
Rev
0.4
35
of
43
VS
VIN
2
1M_0402_1%
VS
PR3
84.5K_0402_1%
PR2
5.6K_0402_5%
PD3
RLZ4.3B_LL34
VIN
(38)
RTCVREF
3.3V
10K_0402_1%
PACIN
Vin Detector
PR10
2
(14,28)
PR7
10K_0402_1%
PC6
0.1U_0402_16V7K
ACIN
PU1A
8
+
2
1
1
1
LM393DG_SO8
PR6
20K_0402_1%
2
PC5
1000P_0402_50V7K
1
2
PR4
10K_0402_1%
NA
PACIN
PR5
22K_0402_1%
1
2
PC4
100P_0402_50V8J
1
PC3
1000P_0402_50V7K
SINGA_2DC-G756I200
@
PC2
100P_0402_50V8J
2
PC1
1000P_0402_50V7K
G
G
1
1
PR1
PL1
FBMA-L18-453215-900LMA90T_1812
1
2
VIN
ADPIN
PCN1
PR13
PD1
RLS4148_LLDS2
PQ60
TP0610K-T1-E3_SOT23
PR9
68_1206_5%
PD4
VS
2
1
IN
PQ58
DTC115EUA_SC70
GND
PC9
1U_0805_25V4Z
PD15
RLZ16B_LL34
PQ59
DTC115EUA_SC70
+1.2VS
(38)
ACON
@ JUMP_43X118
PC12
0.1U_0603_25V7K
PJ4
+0.9VSP
PJ7 PJ5
2 2
+1.8VALW
@ JUMP_43X118
2
+1.5VS
H-->L
L-->H
NA
PR25
191K_0402_1%
PR24
@ 66.5K_0402_1%
PQ2
2N7002-7-F_SOT23-3
BATT ONLY
Precharge detector
Min.
typ.
Max.
@ JUMP_43X118
RTCVREF
PR26
47K_0402_1%
1
2
@ JUMP_43X118
34K_0402_1%
+0.9VS
PJ6
+1.5VSP
PC13
1000P_0402_50V7K
NA
@ JUMP_43X118
+5VALW
2
G
S
3
P
RB715F_SOT323
PJ3
+5VALWP
PACIN
@ JUMP_43X118
PC11
0.01U_0402_25V7K
1 PR23
1
+1.2VSP
+3VALW
PR22
499K_0402_1%
+
@ JUMP_43X118
PD5
(4,14,37,39) MAINPWON
PJ2
2.2M_0402_5%
PU1B
LM393DG_SO8
PJ1
PR21
1
VL
PR20
100K_0402_1%
1
2
2
3
+3VALWP
PR19
499K_0402_1%
PC10
10U_0805_6.3V6M
2
1
OUT
12
2
3
ACOFF
560_0603_5%
(28,38)
PR181
200_0603_5%
3.3V
B+
560_0603_5%
1
PR267
100K_0402_5%
PC8
0.1U_0603_25V7K
PU2 G920AT24U_SOT89
+CHGRTC
Precharge detector
Min.
typ.
Max.
PC7
0.22U_1206_25V7M
RTCVREF
PR18
1K_1206_5%
ACIN
2
PR14
22K_0402_1%
PR17
1 PR16
1K_1206_5%
1
PR266
100K_0402_5%
51ON#
1 PR15
1
RLS4148_LLDS2
2
N1
PR12
100K_0402_1%
(31)
VIN
1
PR265
100K_0402_5%
1
1
PQ1
TP0610K-T1-E3_SOT23
PR11
200_0603_5%
1
2
CHGRTCP
PR8
68_1206_5%
BATT+
1K_1206_5%
PD2
RLS4148_LLDS2
2
+5VALWP
PQ3
DTC115EUA_SC70
PJ8
+1.05VSP
+1.05VS
@ JUMP_43X118
Issued Date
Security Classification
2005/11/01
Deciphered Date
2006/11/30
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Document Number
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Sheet
D
36
of
43
VL
VS
VL
2
PR257
100K_0402_5%
2
+3VALWP
PC14
0.1U_0603_25V7K
10.7K_0402_1%
(38)
2
2
1
PR259
@1K_0402_5%
PC185
0.01U_0402_25V7K
PU3A
1
MAINPWON (4,14,36,39)
4
2
VL
PR39
150K_0402_1%
BATT_TEMP (28)
2
SUYIN_200275MR007G161ZL
PJP2
PR37
150K_0402_1%
1
1
2
PC18
1U_0603_6.3V6M
PR261
1K_0402_5%
1
2 BATT_TEMP
PR260
1K_0402_5%
2
1
7
6
5
4
3
2
1
PH1
100K_0603_1%_TH11-4H104FT
PC17
1000P_0402_50V7K
2
1
SMART
Battery:
1.GND
2.SMC
3.SMD
4.TS
5.B/I
6.ID
7.BATT+
LM393DG_SO8
TM_REF1
PC186
1000P_0402_50V7K
PR32
61.9K_0402_1%
1
2
BATT++
6C/8C#
PR30
442K_0603_1%
1
2
PR36
FBMA-L18-453215-900LMA90T_1812
1
2
PR27
150K_0402_1%
1
PR258
1K_0402_5%
2
1
PL14
BATT+
BATT++
BATT+
PR262
6.49K_0402_1%
1
2
+3VALWP
100_0402_5%
PR263
2
EC_SMB_DA1 (28,29)
PR264
100_0402_5%
1
2
EC_SMB_CK1 (28,29)
VS
PU3B
O
LM393DG_SO8
+VSBP
1
2
D
PQ42
2N7002-7-F_SOT23-3
2
G
Issued Date
PC133
0.1U_0402_16V7K
Security Classification
S
3
POK
2005/06/23
Deciphered Date
2006/10/22
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
(39,40)
PR185
0_0402_5%
1
2
1
PC132
0.1U_0603_25V7K
PR183
22K_0402_1%
1
2
PR184
100K_0402_1%
PC131
0.22U_1206_25V7K
PR182
100K_0402_1%
VL
B+
PQ41
TP0610K-T1-E3_SOT23
Date:
Document Number
Rev
0.4
HCL51 LA-3211P
, 11, 2006
Sheet
D
37
of
43
Charger
Iadp=0~3.117A(65W)
BST
24
charger_BST
DLOV
22
charger_DLOV
PC172
0.1U_0603_25V7K
LDO
CSIP
CSIN
BATT
19
18
16
PD17
1SS355_SOD323
2
1
PR244
33_1206_5%
GND
PGND
PC178
1U_0805_25V4Z
0.01U_0402_25V7K
MAX1908-CCS
BATT+
BATT+
VS
1
2
+3VALWP
1
PR253
300K_0603_0.1%
2
LM358ADR_SO8
PR256
200K_0402_1%
2
6C/8C#
(37)
G
RHU002N06_SOT323
PQ57
LM358ADR_SO8
LI-4S :17.8V----BATT-OVP=1.98V
BATT-OVP=0.111*BATT+
LI-3S :13.35V----BATT-OVP=1.98V
BATT-OVP=0.111*BATT+
Security Classification
2005/06/20
Issued Date
2006/06/20
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
2
G
PC184
0.01U_0402_25V7K
4
8
P
G
OVP voltage :
PU5B
+ 5
PQ56
1
PR254
10K_0402_5%
RHU002N06_SOT323
0
G
(28) BATT_OVP
PR255
511K_0402_1%
1
2
8
1
VS
2P4S:4800mAH/cell 0.8C=3.84A
1P4S:2400mAH/cell 0.8C=1.92A
PU5A
3
PC183
0.01U_0402_25V7K
PR252
845K_0603_1%
PC182
0.1U_0402_16V7K
2
2
PR250
100K_0402_5%
PR251
10K_0402_5%
1
2
BATT-OVP=0.111*BATT+
FSTCHG
Charge voltage
3S CC-CV MODE : 12.6V
4S CC-CV MODE : 16.8V
(28)
PC181
0.1U_0402_16V7K
PR249
0_0402_5%
1
2
LI-4S :17.8V--BATT-OVP=1.9758V
BATT+
20
14
CCS
5
PC177
1U_0603_10V6K
10U_LF919AS-100M-P3_4.5A_20%
21
PC175
4.7U_1206_25V6K
2
1
G
S
S
S
4
3
2
1
charger_DLO
DLO
1908LDO
PR58
0.015_2512_1%
IINP
CCV
PC174
4.7U_1206_25V6K
2
1
charger_LX
PC173
4.7U_1206_25V6K
2
1
23
LX
ACOFF (28,36)
charger_DHI
28
7
ACON
PQ53
SI4810BDY-T1-E3_SO8
5
6
7
8
25
D
D
D
D
DHI
PC170
@ 1000P_0402_50V7K
PR243 0_0402_5%
PR248
22K_0402_5%
1
2
PR236
10K_0402_1%
2
4
4
3
2
1
ACOK#
SHDN#
ACIN
ICHG
PC180
PR246
100K_0402_1%
VCTL
ICTL
11
8
10
9
PR247
10K_0402_1%
1
2
21K_0402_1%
PR245
26
2 ACOFF
REFIN
15
13
(36)
CLS
NA
6
CCI
IREF
PQ55
(28)
RHU002N06_SOT323
CSSN
PR241
15K_0402_1%
1N4148_SOD80
PACIN
REF
3
12
27
CELLS
PC179
0.01U_0402_25V7K
2
1
PR240
9.31K_0402_1%
PR242
100K_0402_1%
2
1
CSSP
2
PR239
150K_0402_5%
2
1
PC171
0.1U_0402_16V7K
DCIN
ACOFF#
1
2
1
1
RHU002N06_SOT323
PQ54
PD18
(36)
17
1908LDO
VIN
PQ51
DTC115EUA_SC70
PU4
MAX1908ETI_QFN28
2
1
PR237
@ 0_0402_5%
60.4K_0402_1%
PR238
2
1
2
G
ACOFF#
2
G
PQ52
SI2301DS_SOT23~D
PC169
1U_0603_10V6K
PQ10
DTC115EUA_SC70
PR233
47K_0402_1%
1
2
1
6C/8C#
8
7
6
5
PQ50
SI4810BDY-T1-E3_SO8
5
6
7
8
D
D
D
D
G
S
S
S
PD16
PC168
0.1U_0603_25V7K
PC164
2200P_0402_50V7K
2
1
2
1SS355_SOD323
VIN 2
(37)
PC166
0.1U_0603_25V7K
PC163
0.1U_0603_25V7K
2
1
PC162
4.7U_1206_25V6K
2
1
PQ5
AO4407_SO8
1
2
3
47K
PR234
200K_0402_1%
PC176
0.01U_0402_25V7K
PQ8
DTA144EUA_SC70
47K
PR235
47K_0402_5%
PC167
0.1U_0603_25V7K
2
PC165
0.1U_0603_25V7K
PC161
4.7U_1206_25V6K
2
1
8
7
6
5
CHG_B+
PL12
FBMA-L18-453215-900LMA90T_1812
1
2
1
2
3
1
2
3
B+
PR44
0.015_2512_1%
P3
VIN
8
7
6
5
PQ7
AO4407_SO8
PL13
P2
PQ6
AO4407_SO8
Charger
Rev
0.4
, 11, 2006
Sheet
E
38
of
43
+3.3VALWP/+5VALWP
BST_3V
PD11
DAP202U_SOT323
B+++
PC54
2
1
PR270
REF
PC42
10U_1206_25VAK
2
1
PR71
47_0402_5%
FB3
PGOOD
BST_3V-1 2 PR82
1
DH_3V-1 0_0603_5%
2
NA
LX_3V
+3VALWP
FB3
7
2
POK
(37,40)
MAX8734AEEI+_QSOP28
PR88
0_0402_5%
1
1
10UH_SIQB125-100APF_4.5A_20%
2
1
2
PR77
100K_0402_1%
PL5
PC50
0.1U_0603_25V7K
2
1
28
26
24
27
22
PR80
499K_0402_1%
BST3
DH3
DL3
LX3
OUT3
ILIM5
PR76
100K_0402_1%
2
2
PC46
1U_0603_6.3V6M
11
VCC
17
13
TON
ILIM5
PR81
0_0603_5%
1
+
PC53
150U_V_6.3VM_R18
PC187
0.047U_0603_16V7K
1
2
PC188
1U_0603_6.3V6M
(4,14,36,37) MAINPWON
2
SKIP#
2VREF_8734
47K_0402_5%
1
2
PR73
4.7_1206_5%
12
8
2
SHDN#
ON5
ON3
ILIM3
PR85
2
0_0402_5%
6
4
3
8
7
6
5
FDS6900AS_NL_SO8
LX5
DL5
OUT5
FB5
N.C.
ILIM3
D2
G2
D1/S2/K
D2
G1
D1/S2/K
S1/A D1/S2/K
PR86
@ 6.81K_0402_1%
1
2
PR172
47K_0402_1%
RLZ5.1B_LL34
2VREF_8734
1
2
3
4
PQ18
DL_3V
PR89
0_0402_5%
15
19
21
9
1
23
PC52
0.047U_0603_16V7K
VS
PR84
100K_0402_1%
2
1
2
2
2
PR87
0_0402_5%
150U_V_6.3VM_R18
PC51
PR83
@ 10.5K_0402_1%
FB5
PD12
DH5
DH_3V
PR79
499K_0402_1%
DL_5V
BST5
16
PC44
0.1U_0402_16V7K
PRO#
LX_5V
PU6
14
4.7U_0805_6.3V6K
1
2 10
0_0603_5%
2
1BST_5V-1
20
PC49
0.1U_0603_25V7K
2
1
V+
PR78
LDO3
PC47
4.7U_0805_6.3V6K
2
1
VL
FDS6900AS_NL_SO8
25
1
2
3
4
GND
+5VALWP
D2
G2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
0.22U_0603_10V7K
PL4
10UH_SIQB125-100APF_4.5A_20%
2
1
8
7
6
5
PC48
0.1U_0603_25V7K 1
PQ19
DH_5V-1
PC55
2
1
PR75
0_0603_5%
2
PC45
PR72
4.7U_1206_25V6K
4.7_1206_5%
2
1 2
1
18
DH_5V
B+++
LD05
@ JUMP_43X118
PC41
2200P_0402_50V7K
2
1
B+++
VL
2
PC39
10U_1206_25VAK
2
1
PJ12
B+
Security Classification
2005/11/01
Issued Date
Deciphered Date
2006/11/30
Title
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
Rev
0.4
HCL51 LA-3211P
Sheet
1
39
of
43
2
1
2
1
2
3
PR96
1
2BST_1.8V-2 6
0_0603_5%
5
6
7
8
28
BOOT1
PC65
2
1
17
BOOT2
0.01U_0402_25V7K
PC67
0.1U_0603_25V7K
PR97
23 BST_1.2V-2
1
2 2
1
D
D
D
D
SOFT2
PQ26
SI4800BDY-T1-E3_SO8
+1.2V
G
S
S
S
SOFT1
VCC
14
PU7
12
VIN
PC64
2
1
0.01U_0402_25V7K
0_0603_5%
4
3
2
1
2
LGATE1
LGATE2
27
ISE_1.2V
PR103
2K_0402_1%
1
2
11
OCSET1
OCSET2
18
PR104
0_0402_5%
PC70
220U_D2_2VMR15
PR105
2.21K_0402_1% 2
PC71
0.01U_0402_25V7K
DL_1.2V
VSE_1.2V
1
ISL6227CAZ-T_SSOP28
PC72
0.047U_0402_16V7K
(28,29,35,41)
PR109
@ 0_0402_5%
PR110
6.49K_0402_1%
90.9K_0402_1%
PR112
SUSP#
PR107
47K_0402_5%
13
PR113
80.6K_0402_1%
PC73
@ 0.1U_0402_16V7K
PQ28
SI4810BDY-T1-E3_SO8
4
3
2
1
20
19
21
16
1
VOUT2
VSEN2
EN2
PG2/REF
DDR
VOUT1
VSEN1
EN1
PG1
PGND2
9
10
8
15
GND
PGND1
26
PR106
0_0402_5%
PR111
@ 0_0402_5%
PR108
10K_0402_1%
POK
(37,39)
1
1
22
ISEN2
+1.2VSP
ISEN1
NA
LX_1.2V
25
24
PHASE2
PL8
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
UGATE2
PHASE1
DH_1.2V-2
G
S
S
S
DL_1.8V
UGATE1
1 PR99
2
0_0603_5%
1
2
3
4
PR102
1.96K_0402_1%
ISE_1.8V
1
2
PR101
0_0402_5%
DH_1.2V-1
5
6
7
8
DH_1.8V-1
D
D
D
D
1 PR98
2
0_0603_5%
VSE_1.8V
PC63
2.2U_0805_10V6K
1
2
PC69
0.01U_0402_25V7K
1
2
PC66
0.1U_0603_25V7K
2
1
S
S
S
G
PQ27
SI4810BDY-T1-E3_SO8
PR100
10.5K_0402_1%
PR95
2.2_0603_5%
PC62
0.1U_0603_25V7K
D
D
D
D
PC68
220U_D2_4VMR15
2
8
7
6
5
1
LX_1.8V
PC61
4.7U_0805_6.3V6K
1
BST_1.8V-1
S
S
S
G
DH_1.8V-2
1
2
3
4
PL7
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
8
7
6
5
PQ25
SI4800BDY-T1-E3_SO8
+1.8VALWP
+5VALW
BST_1.2V-1
D
D
D
D
+1.8V
B+
PC59
10U_1206_25V6M
PD14
DAP202U_SOT323
PR94
0_1206_5%
2
PC57
10U_1206_25V6M
@ JUMP_43X118
Issued Date
Security Classification
2005/11/01
Deciphered Date
2006/11/30
Title
+1.8V/+1.2V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
Rev
0.4
HCL51 LA-3211P
Sheet
D
40
of
43
+1.2VSP
+5VS
PJ14
@ JUMP_43X118
PC76
1U_0603_6.3V6M
1
VIN
VOUT
VOUT
FB
VIN
PC77
22U_1206_6.3V6M
+1.05VSP
1
PR114
0_0402_5%
1
2
PC79
0.01U_0402_25V
PR115
316_0402_1%
2
PC81
@ 150U_D2E_6.3VM_R18
+
PC80
22U_1206_6.3V6M
APL5912-KAC-TRL_SO8
PC78
@ 0.1U_0402_16V7K
EN
GND
8
1
(28,29,35,40) SUSP#
POK
PU8
7
VCNTL
PR117
10K_0402_1%
1
2
PR116
1K_0402_1%
+1.8V
B
PJ10
@ JUMP_43X118
PJ11
@ JUMP_43X79
+3VS
PU9
SUSP
1
2
PR125
0_0402_5%
PC93
10U_1206_25VAK
VREF
NC
VOUT
NC
TP
+5VALWP
1
1
2
G
PC97
@ 0.1U_0402_16V7K
PC89
1U_0603_6.3V6M
PR126
S 1K_0402_1%
+0.9VSP
PC95
0.1U_0402_16V7K
PC96
10U_1206_25VAK
PC92
0.1U_0402_16V7K
NC
+1.5VSP
PR127
S 1K_0402_1%
PC94
@ 0.1U_0402_16V7K
PR123
0_0402_5%
2
G
3
SUSP
2
1
(35)
PQ38
2N7002-7-F_SOT23-3
VCNTL
GND
G2992_SO8
PQ31
2N7002-7-F_SOT23-3
G2992_SO8
VIN
TP
NC
VOUT
PR122
1K_0402_1%
PR124
1.15K_0402_1%
PC91
1U_0603_6.3V6M
NC
NC
VREF
GND
PC88
10U_1206_25VAK
+5VALWP
VCNTL
1
2
PC87
10U_1206_25VAK
VIN
PU10
1
Issued Date
Security Classification
2005/06/23
2006/10/22
Deciphered Date
Title
+1.05V/+1.5V/+0.9V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 11, 2006
Date:
Rev
0.4
HCL51 LA-3211P
Sheet
1
41
of
43
+5VS
CPU_B+
B+
PL9
FBM-L11-322513-201LMAT_1210
2
1
PR186
D2
LX1
28
34
D3
DL1
26
DL1__CPU
(5)
CPU_VID4
35
D4
PGND1
27
(5)
CPU_VID5
36
D5
GND
18
(5)
CPU_VID6
37
D6
CSP1
17
CSP1__CPU
71.5K_0402_1%
1
7
TIME
CSN1
16
CSN1_CPU
CCV
FB
12
FB_CPU
11
REF
CCI
10
CCI_CPU
DPRSLPVR
DH2
21
DH2_CPU-1
PC147
0.22U_0603_16V7K 39
PR206
0_0402_5%
(4) H_DPRSTP#
40
BST2
20
BST2_CPU
PR208
0_0402_5%
(5)
PSI
LX2
22
LX2_CPU
PWRGD
DL2
24
DL2__CPU
CLKEN
PGND2
23
H_PSI#
14
15
CSN2__CPU
GNDS
13
PR219
PC151
1000P_0402_50V7K
2
PR222
1
2
PR225 @ 0_0402_5%
1
2
(5)
VSSENSE
VSSENSE
PR227
@10_0402_5%
PC140
2200P_0402_50V7K
2
1
PC139
0.1U_0603_25V7K
2
1
PC150
470P_0402_50V8J
PR220
20K_0402_1%
CPU_B+
PQ47
SI7840DP-T1-E3_SO8
1
2
NTC
PR231
10K_0603_5%
1
2
PR230
3.48K_0402_1%
1
2
1
PR232 0_0402_5%
1
2
2005/06/20
Issued Date
PC160
Deciphered Date
0.22U_0603_16V7K
2006/06/20
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Security Classification
PL11
P_0.36H_ETQP4LR36WFC_24A_20%
PQ48
FDS6676AS_SO8
4
G
D
3
S
D
2
D
S
1
S
D
DL2__CPU
PQ49
FDS6676AS_SO8
4
G
D
3
S
D
2
D
S
1
D
S
5
6
7
8
5
6
7
8
PR226 10K_0402_5%
PC158
0.1U_0402_16V7K
PC149
4700P_0402_25V7K
2
PR218
3K_0603_1%
100_0402_5%
3
2
1
POUT
2
(28)
PR269 2.2_0603_5%
1
2 DH2_CPU-2
(4,14) H_PROCHOT#
PR223
100_0402_5%
PR224
56_0402_5%
1
B
PC152
2
1
+3VS
@ 10K_0402_5%
1
PR221
0_0402_5%
MAX8770GTL+_TQFN40
VR_ON
1
NTC PR217
@ 3K_0603_1%
0.022U_0402_16V7K
CPU_VCC_SENSE
2
2
PR215
PC159
680P_0603_50V7K
@ 0_0402_5%
(28)
CLK_EN#
(12)
0.22U_0603_16V7K
POUT
VCCSENSE
PC148 @
1
3.65K_0402_1%
2
PR228
4.7_1206_5%
1
CSP2
CSN2
BSTM2_CPU
VGATE
4
(15)
SHDN
VRHOT
@ 3K_0603_1%
1
2
PR214
1
PR210
38
PR213
@ 2K_0402_1%
PR211
PR212
@ 2K_0402_1%
PR216
0_0402_5%
CSP2_CPU
PC146
PR209 0_0402_5%
1
2
2
+3VS
DPRSTP
(5)
1
PR229
2.1K_0402_1%
1
PC145
2
PR2042
NTC
3.48K_0402_1% 10K_0603_5%
PR202
PR203
1
2
1
2
33
0_0402_5%
CPU_VID3
+CPU_CORE
PR207
CPU_VID2
(5)
PL10
P_0.36H_ETQP4LR36WFC_24A_20%
2
1
10_0402_5%
1
(5)
+CPU_CORE
PR268 2.2_0603_5%
1
2 DH1__CPU-2
PR201
2
DH1__CPU-1
LX1__CPU
PC157
2200P_0402_50V7K
2
1
29
PC156
0.1U_0603_25V7K
2
1
DH1
PC155
10U_1206_25VAK
2
1
D1
PC154
10U_1206_25VAK
2
1
32
PC153
10U_1206_25VAK
2
1
499_0402_1%(4,13) DPRSLPVR
PC135
100U_25V_M
2.1K_0402_1%
PR198
1
2
PC143
BSTM1_CPU 1
2
PC144
680P_0603_50V7K
CPU_VID1
PR196
4.7_1206_5%
1
BST1
(5)
D0
30
31
3
2
1
BST1_CPU
0.22U_0603_16V7K
5
6
7
8
PR192
CPU_VID0
0_0603_5%
(5)
470P_0402_50V8J
1
PR205
PR200 0_0402_5%
TON
PQ45
FDS6676AS_SO8
4
D
G
3
D
S
2
S
D
1
S
D
PR199 0_0402_5%
VDD
THRM
DL1__CPU
PR197 0_0402_5%
Vcc
5
6
7
8
PR195 0_0402_5%
25
PQ44
FDS6676AS_SO8
4
G
D
3
S
D
2
D
S
1
S
D
PR194 0_0402_5%
19
0_0603_5%
PR193 0_0402_5%
VCC
0.22U_0603_16V7K
PR191 0_0402_5%
PQ43
SI7840DP-T1-E3_SO8
PU11
NTC
0_0402_5%
PR190
1
2
PC138
10U_1206_25VAK
2
1
1
1
PC142
1U_0603_6.3V6M
1
PR189
@ 13K_0402_1%
200K_0402_5%
PR188 1
2
PC141
2.2U_0603_6.3V6K
2
D
PC136
10U_1206_25VAK
2
1
0_1206_5%
PR187
10_0402_5%
PC137
10U_1206_25VAK
2
1
1
PC134
0.01U_0402_25V7K
5VS1 2
+CPU_CORE
Rev
0.4
, 11, 2006
Sheet
1
42
of
43
Fixed Issue
Page 1 of 1
for PWR
Rev.
42
PG#
40
40
Modify List
VER
Phase
DVT
DVT
PVT
4
5
6
C
7
8
9
10
11
8
9
PIR (PWR)
Size
Document Number
Date:
, 11, 2006
Rev
0.4
Sheet
1
43
of
43