V nguyn tt hot ng cng n gin, i khi l nh th ny: bn cho 1 bit vo SERIAL DATA INPUT v tc ng vo chn SHIFT CLOCK, bit

d liu (1) s c t sn ng ra QA ca 74595, tip tc a vo bit (2) v tc ng vo SHIFT CLOCK th bit d liu (1) s c t sn ng ra QB, bit d liu (2) s c t sn ng ra QA,...tng t n bit cui cng. Cc bn ch l d liu ch c chun b sn cc ng ra v ch c xut ra khi ta tc ng vo chn LATCH CLOCK. Bn c th xut d liu bt c lc no khng phi cn chun b n bit cui cng!

;Khai bao cac bit dieu khien cho 74595 cho 8051 Port_data equ P1 SER bit P3.0 SCLK bit P3.1 RCLK bit P3.2 G bit P3.3 MR bit P3.4

; to xung cht data ( cha xut ra ) Shift_Latch: ( bn xem th trn tng ng cc bc to xung ) setb SCLK call DELAY_TAOXUNG clr SER clr SCLK setb RCLK call DELAY_TAOXUNG clr RCLK ret

DELAY_TAOXUNG: ( c th khc ) PUSH 0h MOV R0,#25 DJNZ R0,$ POP 0h RET MOV R3,#4 Send_8bit: MOV CLR mov MOVC Send_1bit: RRC mov lcall DJNZ DJNZ

R4,#8 A A,R2 A,@A+DPTR A SER,C Shift_Latch R4,Send_1bit R3,Send_8bit

; dich va chot data ; giam R4 nap lan luot 8 bit ;nap 8 bit tiep theo

;Mun sut data th clr G