3 Thiet ke ng dung

3.1 Giao tiep vi PPI8255

3.1.1 Gii thieu PPI8255
PPI: programmable peripheral interface giao tiep
ngoai vi lap trnh c.
- Dung 8255 e m rong I/O. Tng port co the c
lap trnh la input hay output mot cach linh hoat bang
phan mem (so sanh vi viec thiet ke I/O port dung
74LS244 va 74LS373 chng 1 input hay
output c thiet ke cng, co nh).
- Cac chan:
D0D7: bus d lieu 2 chieu.
PA0PA7: port A.
PB0PB7: port B.
PC0PC7: port C.
/RD: Read. (Noi vi /RD (P3.7) cua 8051.)
/WR: Write. (Noi vi /WR cua 8051.)
RESET: khi ong lai 8255. (Thng c noi vi mach reset cua 8051 hoac GND.
/CS: chon chip.)
A0, A1: a ch port. (Noi vi bus a ch.)
-

/CS
0
0
0
0
1
-

A1
0
0
1
1

A0
0
1
0
1

Mo ta
Port A
Port B
Port C
T ieu khien (control word)
8255 khong c chon

Thanh ghi ieu khien:

o Hoat ong I/O (D7 = 1)
1

D6

D5

Mode
00: mode 0
01: mode 1
1X: mode 2

D4

D3

PA
0: output
1: input

PCH
0: output
1: input

Nhom A

D2
Mode
0: mode 0
1: mode 1

D1

D0

PB
0: output
1: input

PCL
0: output
1: input

Nhom B

Ghi chu: PCH = PC7PC4, PCL = PC3PC0.

o Hoat ong BSR Bit set/reset (D7 = 0):
0

D3

D2
Chon bit port C

Hoat ong I/O c ban co 3 mode:

o Mode 0: I/O n gian.
o Mode 1: I/O co bat tay.
o Mode 2: bus 2 chieu.

3.1.2 Thiet ke - Giao tiep

D1

D0
Bit
set/reset
0: reset
1: set

Thiet ke 1
U1
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
29
31
9

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

U3
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
ALE/PROG
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

PSEN
XTAL1

39
38
37
36
35
34
33
32
30
21
22
23
24
25
26
27
28

D0
D1
D2
D3
D4
D5
D6
D7

XTAL2

3
4
7
8
13
14
17
18
11

A8
A9
A10
A11
A12
A13
A14
A15

U6

D0
D1
D2
D3
D4
D5
D6
D7

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

OC

2
5
6
9
12
15
16
19

A0
A1
A2
A3
A4
A5
A6
A7

D0
D1
D2
D3
D4
D5
D6
D7

34
33
32
31
30
29
28
27

A0
A1

9
8
6

35
U2
A13
A14
A15

18

1
2
3

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

A
B
C

AT89C51
6
4
5

+5V

G1
G2A
G2B

D0
D1
D2
D3
D4
D5
D6
D7

74LS373

19

EA/VPP
RST

D0
D1
D2
D3
D4
D5
D6
D7

15
14
13
12
11
10
9
7

5
36

A0
A1
CS

RESET
RD
WR

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7

4
3
2
1
40
39
38
37
18
19
20
21
22
23
24
25
14
15
16
17
13
12
11
10

1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8

J2

J3

J4

8255

74LS138

a ch 8255 (base addr.): 4000h (16 bit)

PA (base + 00h): 4000h
PB (base + 01h): 4001h
PC (base + 02h): 4002h
Control word (base + 03h): 4003h
Thiet ke 2
U1
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
29
31
9

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

U3
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
ALE/PROG
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

PSEN
XTAL1

39
38
37
36
35
34
33
32

XTAL2

D0
D1
D2
D3
D4
D5
D6
D7

30
21
22
23
24
25
26
27
28

3
4
7
8
13
14
17
18
11

U6

D0
D1
D2
D3
D4
D5
D6
D7

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

OC

2
5
6
9
12
15
16
19

D0
D1
D2
D3
D4
D5
D6
D7

A0
A1
A2
A3
A4
A5
A6
A7

34
33
32
31
30
29
28
27

A0
A1

9
8
6

35

18

U2
A5
A6
A7

1
2
3

A
B
C

AT89C51
+5V

6
4
5

G1
G2A
G2B
74LS138

a ch 8255 (base addr.): 40h (8 bit)

PA (base + 00h): 40h
PB (base + 01h): 41h
PC (base + 02h): 42h
Control word (base + 03h): 43h

D0
D1
D2
D3
D4
D5
D6
D7

74LS373

19

EA/VPP
RST

D0
D1
D2
D3
D4
D5
D6
D7

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

15
14
13
12
11
10
9
7

5
36

A0
A1
CS

RESET
RD
WR

8255

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7

4
3
2
1
40
39
38
37
18
19
20
21
22
23
24
25
14
15
16
17
13
12
11
10

1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8

J2

J3

J4

VD1: Khi ong 8255:

PA xuat, PB xuat, PC xuat T ieu khien: 80h
PA xuat, PB nhap, PC xuat T ieu khien: 82h
PA xuat, PB nhap, PC nhap T ieu khien: 8Bh
VD2: Viet chng trnh.
- Khi ong 8255: PA xuat, PB nhap, PC nhap.
- Lien tuc oc d lieu t Port 1 cua 8951, xuat d lieu o ra 8255.
Chng trnh cho s o Thiet ke 1:

AGAIN:

ORG
MOV
MOV
MOVX
MOV
MOV
MOV
MOVX
SJMP

0
DPTR,#4003h
A, #8Bh
@DPTR, A
P1, #0FFh
DPTR,#4000h
A, P1
@DPTR,A
AGAIN

; tu+` ddie^`u khie^?n

; PA: output, PB: input, PC: input
; P1 (8951): input
; Port A

Chng trnh cho s o Thiet ke 2:

AGAIN:

ORG
MOV
MOV
MOVX
MOV
MOV
MOV
MOVX
SJMP

0
R0,#43h
A, #8Bh
@R0, A
P1, #0FFh
R0,#40h
A, P1
@R0,A
AGAIN

; tu+` ddie^`u khie^?n

; PA: output, PB: input, PC: input
; P1 (8951): input
; Port A

3.2 Giao tiep vi LED 7 oan

oan:
Bit:

D7

D6

D5

D4

D3

D2

D1

D0

a
f

c
d

Hien th
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
.
[trang]

Anod chung
C0h
F9h
A4h
B0h
99h
92h
82h
F8h
80h
98h
88h
C6h
86h
8Eh
82h
89h
7Fh
FFh

Cathode chung
3Fh
06h
5Bh
4Fh
66h
6Dh
7Dh
07h
7Fh
67h
77h
39h
79h
71h
70h
76h
80h
00h

Quet LED

19
18
9
31

P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

XTAL1
XTAL2
RST

PSEN
ALE/PROG

a
b
c
d
e
f
g
p

10
11
12
13
14
15
16
17

7
6
4
2
1
9
10
5

a
b
c
d
e
f
g
p

A
B
C
D
E
F
G
P

LED2
a
b
c
d
e
f
g
p

A1015
Q1

R3
10K

7
6
4
2
1
9
10
5

A
B
C
D
E
F
G
P

LED1
a
b
c
d
e
f
g
p

R2
10K

A1015
Q2

7
6
4
2
1
9
10
5

A
B
C
D
E
F
G
P

A1
A2

LED3
16
15
14
13
12
11
10
9

A1
A2

1
2
3
4
5
6
7
8

8
3

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

21
22
23
24
25
26
27
28

A1
A2

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

8
3

1
2
3
4
5
6
7
8

R4 470x8

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

8
3

U1
39
38
37
36
35
34
33
32

R1

A1015
Q3

10K

29

+5V

30

EA/VPP
AT89C51

VD: Hien th 123 len LED 7 oan.

;
;
;
;

a,b,c,d,e,f,g -> Port 2

P3.0 -> LED1
P3.1 -> LED2
P3.1 -> LED3
ORG
0H
MOV
P3,#0FFh

BEGIN:

DELAY:
LOOP:

; ta('t ta^'t ca? ca'c LED

MOV
CLR
ACALL
SETB

P2,#0B0h
P3.0
DELAY
P3.0

;
;
;
;

xua^'t ra P2 ma~ cu?a '3'

ba^.t LED1
delay
ta('t LED1

MOV
CLR
ACALL
SETB

P2,#0A4h
P3.1
DELAY
P3.1

;
;
;
;

xua^'t ra P2 ma~ cu?a '2'

ba^.t LED2
delay
ta('t LED2

MOV
CLR
ACALL
SETB
SJMP

P2,#0F9h
P3.2
DELAY
P3.2
BEGIN

;
;
;
;

xua^'t ra P2 ma~ cu?a '1'

ba^.t LED3
delay
ta('t LED3

MOV
MOV
DJNZ
DJNZ
RET
END

R1,#10
R0,#0FFh
R0,LOOP
R1,LOOP

VD: em xung ngo vao T0 (P3.4) hien th tr em len LED 7 oan

;
;
;
;
;
;
;
;
;

Que't LED
a,b,c,d,e,f,g -> Port 2
P3.0 -> LED1
P3.1 -> LED2
P3.2 -> LED3
P3.4(T0) -> Button
40h: ha`ng do+n vi.
41h: ha`ng chu.c
42h: ha`ng tra(m
ORG
0H
MOV
DPTR,#LED7SEG

; DPTR tro? dde^'n ba?ng ma~ LED

BEGIN:

MOV
TMOD,#06h
; counter 0, mode 2
MOV
TH0,#0
SETB
P3.0
; ta('t ta^'t ca? ca'c LED
SETB
P3.1
SETB
P3.2
SETB
P3.4
; P3.4: input
SETB
TR0
; cho phe'p counter 0 cha.y
MOV
A,TL0
LCALL
BIN2BCD
; tra ba?ng, ddo^?i BCD -> LED 7 ddoa.n
MOV
A,40h
MOVC
A,@A+DPTR
MOV
40h,A
MOV
A,41h
MOVC
A,@A+DPTR
MOV
41h,A
MOV
A,42h
MOVC
A,@A+DPTR
MOV
42h,A
LCALL
DISPLAY
SJMP
BEGIN

DISPLAY:
MOV
CLR
ACALL
SETB

P2,40H
P3.0
DELAY
P3.0

;
;
;
;

LED1
ba^.t LED1 sa'ng
delay
ta('t LED1

MOV
CLR
ACALL
SETB

P2,41H
P3.1
DELAY
P3.1

;
;
;
;

LED2
ba^.t LED2 sa'ng
delay
ta('t LED2

MOV
CLR
ACALL
SETB
RET

P2,42H
P3.2
DELAY
P3.2

;
;
;
;

LED 3
ba^.t LED3 sa'ng
delay
ta('t LED3

B,#10
AB
40h,B
B,#10
AB
41h,B
42h,A

;
;
;
;
;
;
;

B=10
chia cho 10
lu+u digit tha^'p

BIN2BCD:
MOV
DIV
MOV
MOV
DIV
MOV
MOV
RET
; su+?a cho SV
DELAY:
PUSH
PUSH
MOV
LP2:
MOV
LP1:
DJNZ
DJNZ
POP
POP
RET
LED7SEG:
DB
DB
END

chia cho 10
lu+u digit tie^'p theo va`o 41h
lu+u digit cuo^'i va`o 42h

7
6
R7,#10
R6,#0FFh
R6,LP1
R7,LP2
6
7

0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,98H
88H,0C6H,86H,8EH,82H,89H

Thiet ke 3 port xuat ra LED

a ch (8-bit):

LED1: A0h
LED2: C0h
LED3: E0h
VD: Xuat ra LED 7 oan 123
ORG
MOV
MOVX
MOV
MOVX
MOV
MOVX
SJMP

0
R0,#0A0h
@R0,#0B0h
R0,#0C0h
@R0,#0A4h
R0,#0E0h
@R0,#0F9h
$

; LED1
; LED2
; LED3

+5V
LED3

LED2

LED1

3
8

3
8

A
B
C
D
E
F
G
P
7
6
4
2
1
9
10
5
16
15
14
13
12
11
10
9

7
6
4
2
1
9
10
5
16
15
14
13
12
11
10
9

7
6
4
2
1
9
10
5
16
15
14
13
12
11
10
9
R4

R5

29
9
31

11

1
2
3
4
5
6
7
8
2
5
6
9
12
15
16
19

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

11
G

OC
1

D0
D1
D2
D3
D4
D5
D6
D7

3
4
7
8
13
14
17
18

D0
D1
D2
D3
D4
D5
D6
D7

OC

D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18

7402

U6

XTAL1
XTAL2

1
2
3
4
5
6
7
8

11

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

OC

74LS373

19
18

EA/VPP
AT89C51

2
5
6
9
12
15
16
19

A0
A1
A2
A3
A4
A5
A6
A7

U5 74LS138

1
A5
A6
A7

G1
G2A
G2B

D0
D1
D2
D3
D4
D5
D6
D7

15
14
13
12
11
10
9
7

3
4
7
8
13
14
17
18

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

D0
D1
D2
D3
D4
D5
D6
D7

6
4
5

30

D0
D1
D2
D3
D4
D5
D6
D7

A
B
C

39
38
37
36
35
34
33
32

1
2
3

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

P3.0/RXD ALE/PROG
P3.1/TXD
P3.2/INTO
P1.0
P1.1
P3.3/INT1
P3.4/TO
P1.2
P3.5/T1
P1.3
P3.6/WR
P1.4
P1.5
P3.7/RD
P1.6
P1.7
PSEN
RST

U4 74LS373

D0
D1
D2
D3
D4
D5
D6
D7

D0
D1
D2
D3
D4
D5
D6
D7

3
4
7
8
13
14
17
18

D0
D1
D2
D3
D4
D5
D6
D7

OC

U3 74LS373

U1

10
11
12
13
14
15
16
17

470x8

1
2
3
4
5
6
7
8
2
5
6
9
12
15
16
19

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

11

2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
U2 74LS373

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

R6

470x8

1
2
3
4
5
6
7
8

470x8

21
22
23
24
25
26
27
28

3
8

A2
A1

A
B
C
D
E
F
G
P

A2
A1

A
B
C
D
E
F
G
P

A2
A1

+5V

10
11
12
13
14
15
16
17
29
30

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD
PSEN
ALE/PROG

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
XTAL1
XTAL2
RST
EA/VPP

39
38
37
36
35
34
33
32

COL 3

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

COL 2

U1
21
22
23
24
25
26
27
28

COL 1

COL 0

3.3 Giao tiep vi ban phm hex

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW10

SW11

ROW 0

1
2
3
4
5
6
7
8

ROW 1
SW8

SW9

ROW 2
SW12

19
18
9

SW13

SW14

SW15

ROW 3

31

AT89C51

;
;
;
;
;

Ba`n phi'm hex no^'i va`o P1

Chuo+ng tri`nh hie^?n thi. phi'm nha^'n ra LED 7 ddoa.n
P1.0-P1.3: columns
P1.4-P1.7: rows
DDi.a chi? LED: A000h

LOOP:

READKB:
SCAN:
CONT:

ROW_0:

LCALL
MOV
MOVC
MOV
MOVX
SJMP

READKB
DPTR,#T7SEG
A,@A+DPTR
DPTR,#0A000H
@DPTR,A
LOOP

PUSH
MOV
MOV
MOV
MOV
JNB
JNB
JNB
JNB
RL
INC
CJNE
SJMP
MOV

7
A,#11111110B
R7,#0
P1,A
A,P1
ACC.4,ROW_0
ACC.5,ROW_1
ACC.6,ROW_2
ACC.7,ROW_3
A
R7
R7,#4,CONT
SCAN
A,R7

; tri. tra? ve^`: A = 0-15

; A000h: ddi.a chi? LED 1

;
;
;
;
;

col_0 -> GND

R7 = i
no^'i col i -> GND
ddo.c row
xe't xem row na`o?

;
;
;
;
;

chua^?n bi. no^'i GND

co^.t tie^'p theo
la^`n luo+.t no^'i GND 4 co^.t
quay la.i que't tu+` co^.t 0
Row=0, Col=R7

ROW_1:

ROW_2:

ROW_3:
EXIT:

T7SEG:

ADD
SJMP
MOV
ADD
SJMP
MOV
ADD
SJMP
MOV
ADD
POP
RET

A,#0
EXIT
A,R7
A,#4
EXIT
A,R7
A,#8
EXIT
A,R7
A,#12
7

; A = 0 + R7

DB
DB
END

40H,79H,24H,30H,19H,12H,02H,78H,00H,10H,
08H,03H,46H,21H,04H,0EH

; Row=1, Col=R7
; A = 4 + R7
; Row=2, Col=R7
; A = 8 + R7
; Row=3, Col=R7
; A = 12 + R7

3.4 Giao tiep vi ADC0804

+5V

21
22
23
24
25
26
27
28
19
18
9
31

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

P3.0/RXD
P2.0/A8
P3.1/TXD
P2.1/A9
P2.2/A10 P3.2/INTO
P2.3/A11 P3.3/INT1
P3.4/TO
P2.4/A12
P3.5/T1
P2.5/A13
P3.6/WR
P2.6/A14
P3.7/RD
P2.7/A15
XTAL1
XTAL2
RST

PSEN
ALE/PROG

1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17

18
17
16
15
14
13
12
11
5
EOC
START 3

DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
INTR
WR

+IN
-IN
VREF/2
CLKR
CLKIN
RD
CS

6
7
9
19
4

1
R1

3
+
-

U3A
TL082
3

R2
2
10K

2
1

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

39
38
37
36
35
34
33
32

Analog Input

U2

10K

U1

C1
2
1

150p

ADC0804

29
30

EA/VPP
AT89C51

ADC0804 la bo chuyen oi tng t sang so 8 bit.

Xet s o nh hnh:
- ien tr 10K va tu 150pF noi vi au vao CLKR va CLKIN nh hnh bo
phat xung nhp ben trong tao tan so hoat ong la 640KHz.
- Mot lan bien oi c bat au bang mot xung START (tch cc mc thap) ngan
han ngo vao /WR. Sau thi gian bien oi khoang 100s, ngo ra /INTR chuyen
sang LOW bao hieu la ket thuc qua trnh bien oi (EOC End of Conversion)
VD: oc AD t port 1, lu vao o nh 40h va xuat ra Port 2
;P1 <- D0-D7
;P3.0 <- /INTR
;P3.1 -> /WR
;P1 <- D0-D7
;P3.0 <- /INTR
;P3.1 -> /WR
ORG
MOV
SETB
LOOP:
CLR
SETB

0
P1,#0FFH
P3.0
P3.1
P3.1

;P1: input
;P3.0: input
;pha't xung START

10

JB
MOV
MOV
MOV
SJMP

P3.0,$
A,P1
40h,A
P2,A
LOOP

;cho+` bie^'n ddo^?i xong

;ddo.c data va`o A
;lu+u va`o o^ nho+' 40h
;xua^'t ra P2

3.5 Giao tiep vi man hnh LCD

29
30

P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

PSEN
ALE/PROG

XTAL1
XTAL2
RST

7
8
9
10
11
12
13
14

10
11
12
13
14
15
16
17

4
5
6

D0
D1
D2
D3
D4
D5
D6
D7
RS
R/W
EN

+5V
3

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

1
2
3
4
5
6
7
8

VCC

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

R1
Contrast

10K

39
38
37
36
35
34
33
32

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

LCD
1

21
22
23
24
25
26
27
28

GND

U2
U1

+5V

19
18
9
31

EA/VPP
AT89C51

RS
0
0

R/W
0
0

D7
0
0

D6
0
0

D5
0
0

D4
0
0

D3
0
0

D2
0
0

D1
0
1

D0
1
-

ID

Lenh
Clear display
Return Cursor and LCD to
Home Position
Set Cursor Move Direction

Enable Display/Cursor

SC

RL

Move Cursor / Shift Display

DL

Set Interface Length

0
0
0

0
0
1

0
1
BF

1
A
-

A
A
-

A
A
-

A
A
-

A
A
-

A
A
-

A
A
-

Move Cursor into CG RAM

Move Cursor to Display
Poll Busy Flag

Write a Character on the

Display at the Current
Cursor Position
Read the Character on the
Display at the Current
Cursor Position

11

Dien giai

ID: increment the cursor after each

byte written to display is set.
S: shift the display when each byte
is written to display
D: display on(1)/ off(0)
C: cursor on(1) / off(0)
B: cursor blink on(1)/ off(0)
SC: display shift on(1)/ off(0)
RL: direction shift righ(1)/ left(0)
DL: set data length 8(1)/ 4(0)
N: number of line 1(0)/ 2(1)
F: character font 5x10(1)/ 5x7(0)
A: address
A: address
BF: this bit is set while the LCD is
processing.
D: data

D: data

VD: Xuat ra LCD chuoi Hello

;P1=data
;P3.0 ->
;P3.1 ->
;P3.2 ->
RS
RW
E

HERE:

pin
RS pin
R/W pin
E pin

EQU
EQU
EQU
ORG
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL

P3.0
P3.1
P3.2
0
A,#38H
CSTROBE
A,#0CH
CSTROBE
A,#01H
CSTROBE
A,#06H
CSTROBE

MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL
SJMP

A,#86H
CSTROBE
A,#'H'
DSTROBE
A,#'e'
DSTROBE
A,#'l'
DSTROBE
A,#'l'
DSTROBE
A,#'o'
DSTROBE
HERE

;init. LCD 2 do`ng, ma tra^.n 5x7

;LCD on, cursor on
;clear LCD
;cursor di.ch pha?i

;chuye^?n cursor dde^'n line 1, pos. 6

CSTROBE:
ACALL
MOV
CLR
CLR
SETB
CLR
RET

READY
P1,A
RS
RW
E
E

;command strobe
;is LCD ready?
;xua^'t ma~ le^.nh
;RS=0: le^.nh
;R/W=0 -> ghi ra LCD
;E=1 -> ta.o ca.nh xuo^'ng
;E=0 ,cho^'t

DSTROBE:
ACALL
MOV
SETB
CLR
SETB
CLR
RET

READY
P1,A
RS
RW
E
E

;data strobe
;is LCD ready?
;xua^'t du+~ lie^.u
;RS=1 for data
;R/W=0 to write to LCD
;E=1 -> ta.o ca.nh xuo^'ng
;E=0, cho^'t

; kie^?m tra co+` BF

READY: SETB
P1.7
CLR
RS
SETB
RW
BACK:
CLR
E
SETB
E
JB
P1.7,BACK
RET
END

;P1.7: input
;RS=0: thanh ghi le^.nh
;R/W=1: ddo.c
;E=0 -> ta.o ca.nh le^n
;E=1
;cho+` busy flag=0

12

VD2: oc ban phm Hex xuat ra LCD

;P1 = data/command pin
;P3.0 -> RS pin
;P3.1 -> R/W pin
;P3.2 -> E pin
;P2 -> Keypad
ORG
0
RS
EQU
P3.0
RW
EQU
P3.1
EN
EQU
P3.2

AGAIN:

MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL

A,#38H
CSTROBE
A,#0EH
CSTROBE
A,#01H
CSTROBE
A,#06H
CSTROBE
A,#80H
CSTROBE

LCALL
ORL
ACALL
ACALL
SJMP

READKP
A,#30h
DELAY
DSTROBE
AGAIN

;command strobe
CSTROBE:
ACALL
MOV
CLR
CLR
SETB
CLR
RET
;data strobe
DSTROBE:
ACALL
MOV
SETB
CLR
SETB
CLR
RET
READY:

BACK:

SETB
CLR
SETB
CLR
SETB
JB
RET

;init. LCD 2 lines,5x7 matrix

;LCD on, cursor on
;clear LCD
;cursor di.ch pha?i
;cursor: line 1, pos. 0

READY
P1,A
RS
RW
EN
EN

;is LCD ready?

;xua^'t ma~ le^.nh
;RS=0: le^.nh
;R/W=0: ghi ra LCD
;EN=1 -> ta.o ca.nh xuo^'ng
;EN=0 ,cho^'t

READY
P1,A
RS
RW
EN
EN

;is LCD ready?

;xua^'t du+~ lie^.u ra P1
;RS=1: du+~ lie^.u
;R/W=0 ghi ra LCD
;EN=1 -> ta.o ca.nh xuo^'ng
;EN=0, cho^'t

P1.7
RS
RW
EN
EN
P1.7,BACK

;P1.7: input
;RS=0: le^.nh
;R/W=1: ddo.c
;EN=0 -> ta.o ca.nh le^n
;EN=1
;cho+` busy flag=0

; DDo.c ba`n phi'm

READKP: PUSH
7
SCAN:
MOV
A,#11111110B
MOV
R7,#0

; col_0 -> GND

; R7 = i

13

CONT:

ROW_0:

ROW_1:

ROW_2:

ROW_3:
EXIT:

DELAY:

LP1:
LP0:

MOV
MOV
JNB
JNB
JNB
JNB
RL
INC
CJNE
SJMP
MOV
ADD
SJMP
MOV
ADD
SJMP
MOV
ADD
SJMP
MOV
ADD
POP
RET

P2,A
A,P2
ACC.4,ROW_0
ACC.5,ROW_1
ACC.6,ROW_2
ACC.7,ROW_3
A
R7
R7,#4,CONT
SCAN
A,R7
A,#0
EXIT
A,R7
A,#4
EXIT
A,R7
A,#8
EXIT
A,R7
A,#12
7

PUSH
PUSH
MOV
MOV
DJNZ
DJNZ
POP
POP
RET
END

6
7
R7,#0FFh
R6,#0FFh
R6,LP0
R7,LP1
7
6

; no^'i col i -> GND

; ddo.c row
; xe't xem row na`o?

;
;
;
;
;
;

chua^?n bi. no^'i GND

co^.t tie^'p theo
la^`n luo+.t no^'i GND 4 co^.t
quay la.i que't tu+` co^.t 0
Row=0, Col=R7
A = 0 + R7

; Row=1, Col=R7
; A = 4 + R7
; Row=2, Col=R7
; A = 8 + R7
; Row=3, Col=R7
; A = 12 + R7

14

4 Lap trnh hp ng
4.1 Mot so cau truc lap trnh
Nhay co ieu kien:
<condition>
C=1
bit = 1
A=0
Rn = 0
direct = 0
A direct
A #data
Rn #data
@Ri #data

Jump_if_not <conditon>
JNC rel
JNB bit, rel
JNZ rel
DJNZ Rn, rel
DJNZ direct, rel
CJNE A, direct, rel
CJNE A, #data, rel
CJNE Rn, #data, rel
CJNE @Ri, #data, rel

Jump_if_<conditon>
JC rel
JB bit, rel / JBC bit, rel
JZ rel

Nhay khong ieu kien: AJMP, LJMP, SJMP.

Cau truc repeat until

repeat <action> until <condition>
REPEAT:

<action>
JUMP_if_not_<condition>,REPEAT

Cau truc while do

while <condition> do <action>
START:

STOP:

JUMP_if_not_<condition>,STOP
<action>
SJMP
START
...

Cau truc if then else

if <condition> then <action 1> else <action 2>
JUMP_if_not_<condition>,ELSE
<action 1>
SJMP DONE
ELSE:
<action 2>
DONE:

15

Cau truc case of

case <var> of
val1:
val2:
val3:
else:
end

SKIP1:

SKIP2:

SKIP3:

<action
<action
<action
<action

1>
2>
3>
else>

CJNE <var>,<val1>,SKIP1
<action 1>
SJMP EXIT
CJNE <var>,<val2>,SKIP2
<action 2>
SJMP EXIT
CJNE <var>,<val2>,SKIP3
<action 3>
SJMP EXIT
CJNE <var>,<val2>,EXIT
<action else>

EXIT:

4.2 Mot so v du
VD1: LED nhap nhay.
+5V
+5V

10uF

R3

10K

1
2
3
4
5
6
7
8
9

C1

19
30pF

12MHz

C2

18

40
P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

RST

PSEN

XTAL1
XTAL2
AT89C51

30pF

LOOP:

ORG
SETB
ACALL
CLR

D1
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

GND

C3

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

20

+5V

VCC

U1
39
38
37
36
35
34
33
32

R4
470

0
P2.0
DELAY
P2.0
16

ALE/PROG
EA/VPP

21
22
23
24
25
26
27
28

LED

10
11
12
13
14
15
16
17
29
30
31

+5V

DELAY:
LP2:
LP1:

ACALL
SJMP

DELAY
LOOP

MOV
MOV
DJNZ
DJNZ
RET

R6, #0FFh
R7, #0FFh
R7, LP1
R6, LP2

VD2: Nhan SW1 (tao canh xuong) LED sang mot luc roi tat.
+5V
+5V

10uF

R3

10K

1
2
3
4
5
6
7
8
9

C1

19
30pF

12MHz

18

C2

40

D1
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

P3.0/RXD
P3.1/TXD
P3.2/INTO
P3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD

RST

PSEN

XTAL1

GND

C3

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

XTAL2
AT89C51

ALE/PROG
EA/VPP

20

+5V

VCC

U1
39
38
37
36
35
34
33
32

R4
470

30pF

Pseudo code:
Repeat until P3.0 = 1
Repeat until P3.0 = 0
P2.0 = 0
Delay
P2.1 = 1
Assembly code:
ORG
SETB
LOOP:
JNB
LOOP1:
JB
CLR
ACALL
SETB

0
P3.0
P3.0, LOOP
P3.0, LOOP1
P2.0
DELAY
P2.0

;P3.0: input

17

21
22
23
24
25
26
27
28

LED

SW1

10
11
12
13
14
15
16
17
29
30
31

+5V

DELAY:
LP2:
LP1:

SJMP
MOV
MOV
DJNZ
DJNZ
RET

LOOP
R6, #0FFh
R7, #0FFh
R7, LP1
R6, LP2

18

On tap
Chng 1: Khai niem c ban.
-

S o khoi mot he vi x ly tong quat.

Bo nh: ROM (cac loai?), RAM.
o Cac chan a ch: so chan dung lng.
o Cac chan d lieu.
o Cac chan ieu khien: RAM co /OE va /WE, ROM ch co /OE. Trong
he vi x ly: /OE /RD, /WE /WR.
o a ch chip nh = a ch lam cho chan /CS (/CE) tch cc mach
giai ma a ch.
Giai ma a ch: toan phan, mot phan.
o Bus a ch co 16-bit, chip nh co n chan a ch:
(16-n) ng tn hieu a vao mach GMC GM toan
phan,
t hn (16-n) ng tn hieu a vao mach GMC GM mot
phan.
o Mach GMC: thng dung 74LS138, 74LS139, cac cong Logic.
Thiet ke port nhap (dung 74LS244), port xuat (dung 74LS373).

Yeu cau chng 1:

- Nhn s o xac nh a ch.
- Ban o a ch ve s o (thiet ke).

Chng 2: Ho VK 8051
-

ac tnh ky thuat:
o Khong gian bo nh d lieu: 64KB, khong gian bo nh chng trnh:
64KB. (Bo nh on-chip 89C51: 128 byte RAM, 4K EEPROM.)
o 4 port I/O 2 chieu.
o 2 timer.
o 1 port noi tiep.
o 5 nguon ngat
Truy xuat o nh phai biet cac kieu nh a ch (cach ch nh o nh).
Truy xuat RAM noi? Truy xuat bo nh d lieu m rong (RAM ngoai)? Truy
xuat bo nh chng trnh?
Mot so lenh thng dung (cac lenh trong cac v du).
Ket hp cac lenh nhay e thc hien cac cau truc: repeat until, while do, if
then else,
Timer:
o Thanh ghi TMOD? Cac bit: TFi, TRi (thanh ghi TCON)?
o Dung timer e nh thi nh the nao?
S dung port: muon 1 port la input th lam nh the nao?
Port noi tiep:

19

o
o
o
o
-

Ngat:

Thanh ghi SCON?

Dung Timer 1 e tao baud rate xac nh tr nap cho TH1?
Xuat mot ky t ra port noi tiep?
Nhan mot ky t t port noi tiep?

o Thanh ghi IE, IP? Cac bit: ITi?

o Bang vector ngat?
o Cau truc mot chng trnh co s dung ngat?

Yeu cau chng 2 :

Viet chng trnh cho 8051:
- Tra bang.
- Truy xuat RAM ngoai, RAM trong.
- Copy khoi d lieu.
- oi binary BCD.
- Delay (ngan/dai) khong dung Timer.
- Delay (ngan/dai) dung Timer.
- Phat/thu 1 ky t qua port noi tiep.
- Trnh phuc vu ngat thu/phat d lieu qua port noi tiep.
- Tao xung vuong dung ngat.
- X ly ngat ngoai tac ong mc/canh.

Chng 3: ng dung
-

Cach quet LED 7 oan.

Cac cach oc A/D.
Cach quet ban phm HEX.
Khi ong 8255. oc/xuat d lieu qua cac port A, B, C (mode 0).

20

Sinh vien nen t lap bang tom tat:

-

Tom tat

Bang tong ket cac lenh nhay.

<condition>
C=1
bit = 1
A=0
Rn = 0
direct = 0
A direct
A #data
Rn #data
@Ri #data

Jump_if_not <conditon>
JNC rel
JNB bit, rel
JNZ rel
DJNZ Rn, rel
DJNZ direct, rel
CJNE A, direct, rel
CJNE A, #data, rel
CJNE Rn, #data, rel
CJNE @Ri, #data, rel

Jump_if_<conditon>
JC rel
JB bit, rel / JBC bit, rel
JZ rel

Cac thanh ghi SFR

Cong thc tnh gia tr nap cho TH1 e tao baud rate cho port noi tiep.
o SMOD = 0:
f osc
TH 1 = 256
384 Baud
o SMOD = 1:
f osc
TH 1 = 256
192 Baud

Bang vector ngat:

21

Thanh ghi ieu khien 8255 mode 0:

Bang ma LED 7 oan.

Hien th
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
.
[trang]

Anod chung
C0h
F9h
A4h
B0h
99h
92h
82h
F8h
80h
98h
88h
C6h
86h
8Eh
82h
89h
7Fh
FFh

22

Cathode chung
3Fh
06h
5Bh
4Fh
66h
6Dh
7Dh
07h
7Fh
67h
77h
39h
79h
71h
70h
76h
80h
00h