ANNA UNIVERSITY

REGIONAL CENTRE COIMBATORE DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ET 9221 VLSI ARCHITECTURE AND DESIGN METHODOLOGIES

Internal Assessment I Time: 1 Hours PART A 7 X 2 =14 Marks 1. 2. 3. 4. 5. 6. 7. Draw Schematic diagram of transmission gate? Draw clocked cmos circuit. What is Stick diagram? What are all Logic designs in Cmos Write about SRAM. What are all advantages of Clocked circuits? What is meant by Anti-Fuse? PART B Answer Any 3 Questions 3 X 12 = 36 Marks 8. 9. 10. 11. 12. Explain Cmos logic circuits with diagram. Explain various Dynamic Clocked Cmos circuits Draw and Explain about CVSL? Explain programming techniques in Logic Devices. Explain the various technologies used in Memory circuits. -----xxxxx-----Date: 05/09/2012