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I HC THI NGUYN
TRNG I HC K THUT CNG NGHIP

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LUN VN THC S K THUT

NGNH T NG HO
THIT K H THNG IU KHIN V GIM ST T XA THNG QUA H THNG TRUYN THNG VI GIAO THC TCP/IP
L TH PHNG THANH
Thi Nguyn-2009
S ha bi Trung tm Hc liu i hc Thi Nguyn
http://www.lrc-tnu.edu.vn
I HC THI NGUYN
TRNG I HC K THUT CNG NGHIP
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LUN VN THC S K THUT

THIT K H THNG IU KHIN V GIM ST T XA THNG QUA H THNG TRUYN THNG VI GIAO THC TCP/IP
Ngnh: T ng ho M s: 111207TDH021 Hc vin: L Th Phng Thanh Ngi hng dn khoa hc: PGS-TS Xun Tin
Khoa sau i hc
Ngi hng dn khoa hc
PGS-TS Xun Tin
Thi Nguyn- 2009

S ha bi Trung tm Hc liu i hc Thi Nguyn http://www.lrc-tnu.edu.vn
LI CAM OAN
Sau gn 2 nm hc ti la chn ti Thit k h thng iu khin v gim st t xa thng qua h thng truyn thng vi giao thc TCP/IP lm ti lun vn tt nghip. n nay ti hon thnh xong ti, y l kt qu ca n lc ca bn thn v c ch bo v hng dn tn tnh ca PGS.TS Xun Tin. Ti xin cam oan y l cng trnh nghin cu ca ring ti, cc s liu v kt qu hon ton l trung thc v cha c cng b trong bt k mt cng trnh no.
Hc vin
L Th Phng Thanh
MC LC
Trang Li cam oan Mc lc Danh mc cc bng Danh mc cc hnh v, th M U CHNG 1 - KHT QUT CHUNG V VI IU KHIN 1.1. Khi nim v vi iu khin 1.2. Cc vi iu khin thng dng 1.3. Cc th h vi x l 1.4. S khi ca vi x l 1.4.1. n v x l trung tm CPU 1.1.4.2. B nh 1.4.3. Cng vo/ra song song 1.4.4. Cng vo/ra ni tip 1.4.5. B m/B nh thi 1.5. Nguyn l hot ng ca mt vi x l CHNG 2: TNG QUAN V TCP/IP 2.1. Mng v giao thc 2.1.1. Mng (Mng my tnh) 2.1.2 . Giao thc TCP/IP 2.2. Mng cc b LAN v cng ngh Ethernet 2.2.1. Mng cc b LAN 2.2.2. Cng ngh Ethernet 2.3. H thng tn/a ch CHNG 3 - KIN TRC CA H THNG 01 02 05 06 08 09 09 09 12 13 14 15 15 15 16 18 23 23 23 24 29 29 30 31 35
3.1. S khi h thng 3.2. Vi mch truyn thng ethernet 3.3. Vi mch iu khin (vi x l) 3.3.1. S cc chn PIC16F87X 3.3.2. S t chc b nh PIC16F877. 3.3.3. Truy xut b nh 3.3.4. Truy xut cc cng vo ra 3.3.5. Cc B Timer ca chip 3.3.6. B chuyn i tng t sang s 3.3.7. Cc ngt ca PIC16F877 3.4. Cc vi mch ph tr khc 3.4.1. Mn hnh LCD 16 k t, 2 dng 3.4.2. Vi mch chuyn i mc MAX232 3.4.3. Vi mch n p 3V3 LD1117S33 3.4.4. Bin p mng 3.4.5. Cc linh kin khc 3.5. S nguyn l ca h thng 3.6. V mch in trn s nguyn l CHNG 4 - LP TRNH CHO H THNG 4.1. Phn mm lp trnh v bin dch CCS 4.1.1. Tng quan v CCS 4.1.2. Gii thiu v CCS 4.1.3. To PROJECT u tin trong CCS 4.1.3.1. Tab General 4.1.3.2. Tab Communications 4.1.3.3. Tab SPI and LCD 4.1.3.4. Tab Timer
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4.1.3.5. Tab Analog 4.1.3.6. Tab Other 4.1.3.7. Tab Interrupts v Tab Driver 4.2. Lu thut ton v chng trnh 4.2.1. M hnh iu khin ca h thng iu khin v gim st t xa 4.2.2. Lu thut ton 4.2.3. Chng trnh cho vi x l KT QU V KIN NGH TI LIU THAM KHO
63 64 65 66 66 67 68 78 79
DANH MC CC BNG
Bng 3.1. Thng s k thut ca LCD Bng 3.2. Thng s k thut phn pht ca MAX232 Bng 3.3. Thng s k thut phn thu ca MAX232
DANH MC CC HNH V, TH
Hnh 1.1. S khi ca mt vi x l Hnh 1.2. X l lnh theo kiu tun t Hnh 1.3. X l lnh theo kiu ng ng Hnh 2.1. M hnh tng qut ca mng Internet Hnh 2.2. Ki n trc TCP/IP Hnh 2.3. M t khi qut v b giao thc TCP/IP. Hnh 2.4. Qu trnh ng/m gi d liu trong TCP/IP Hnh 2.5. Cu trc d liu trong TCP/IP Hnh 2.6. Cu trc mng hnh sao Hnh 2.7. Cu trc mng hnh tuyn Hnh 2.8. Cu trc mng dng vng Hnh 2.9. Cu trc khung tin Ethernet Hnh 3.1. S khi h thng iu khin v gim st thng qua mng Ethernet Hnh 3.2. S khi vi mch giao tip ethernet ENC28J60 Hnh 3.3. S ghp ni ENC28J60 vi vi x l Hnh 3.4. Qu trnh c thanh ghi iu khin Ethernet Hnh 3.5. Qu trnh c thanh ghi iu khin MAC Hnh 3.6. Qu trnh ghi vo thanh ghi lnh Hnh 3.7. Qu trnh ghi vo b m lnh Hnh 3.8. Qu trnh ghi vo lnh ca h thng Hnh 3.9. S chn vi mch PIC16F87X Hnh 3.10. Mn hnh LCD Hnh 3.11. S khi chc nng LCD Hnh 3.12. S mch p dng in hnh ca MAX232 Hnh 3.13. S mch p dng in hnh ca LD1117S33 Hnh 3.14. S chn ca bin p mng
Hnh 3.15. S nguyn l ca h thng Hnh 4.1. To file mi trong PCW compiler Hnh 4.2. Lu file vo th mc c sn Hnh 4.3. Tab General Hnh 4.4. Tab Communications Hnh 4.5. Tab SPI and LCD Hnh 4.6. Tab Timer Hnh 4.7. Tab Analog Hnh 4.8. Tab Other Hnh 4.9. Tab Interrupts Hnh 4.10. M hnh h thng iu khin v gim st t xa thng qua mng LAN Hnh 4.11. Lu thut ton ca h thng
M U
Ngy nay, cc thit b in t v t ng ha c mt khp ni, chng ta d dng bt gp trong tt c cc lnh vc, t nhng ng dng c bit trong cng nghip cho n nhng sn phm dn dng. Ban u, vic gim st t xa thng qua mt h thng gm cc phn t ni vi nhau bng dy dn vi cc chun truyn thng ph bin nh RS-232, RS-485 v cc chun cng nghip nh ProfiBus. Tuy nhin, vic m rng phm vi iu khin (tc s lng cc phn t) ca m hnh ny kh kh khn, v c bit l khong cch iu khin th rt hn ch. S ra i ca cng ngh truyn thng vi giao thc TCP/IP lm thay i hon ton suy ngh cng nh phm vi ng dng ca thit b gim st t xa. M hnh mng ph bin l mng ni b LAN (Local Area Network) v mng din rng WAN (Wide Area Network), gi chung l mng Ethernet cho php m rng d dng phm vi gim st v quy m ca h thng. Khng nhng th, trong mng Ethernet, c th gn nhiu thit b u cui khc nhau c cng giao tip thng qua cng truyn thng ethernet nh my tnh, my in, camera, .. do , vic vn hnh v gim st tr nn cc k d dng. Vi ti Thit k h thng iu khin v gim st t xa thng qua h thng truyn thng vi giao thc TCP/IP ti mong xy dng cc h thng iu khin, gim st vi quy m mng ln hn. c s ch bo v hng dn tn tnh ca PGS.TS Xun Tin n nay ti hon thnh xong ti. Knh mong c s ch bo v ng gp t pha ngi c!
CHNG 1 KHT QUT CHUNG V VI IU KHIN

1.1. Khi nim v vi iu khin Vi iu khin l mt my tnh c tch hp trn mt chip, n thng c s dng iu khin cc thit b in t. Vi iu khin thc cht l mt h thng bao gm mt vi x l c hiu xut dung v gi thnh thp (khc vi cc b vi x l a nng dng trong my tnh) kt hp vi cc khi ngoi vi nh b nh, cc mun vo/ra, cc mun bin i s sang tng t v tng t sang s, my tnh th cc mun thng c xy dng bi cc chip v mch ngoi. Vi iu khin thng c dung xy dng cc h thng nhng. N xut hin kh nhiu trong cc dng c in t, thit b in, my git, l vi song, in thoi, u c DVD, thit b a phng tin, dy truyn t ng, Hu ht cc vi iu khin hin nay c xy dng trn khin trc Neuman, kin trc ny nh ngha bn thnh phn c bn cn thit ca mt h thng nhng. l: CPU, b nh chng trnh (thng thng l ROM hoc b nh Flash), b nh d liu (RAM), mt hoc mt vi b nh thi v cc cng vo/ra giao tip vi cc thit b ngoi vi v cc mi trng bn ngoi. Tt c cc khi ny c thit k trong mt vi mch tch hp. Vi iu khin khc vi cc b vi x l a nng ch l n c th hot ng ch vi vi vi mch h tr bn ngoi. Trong mt s trng hp hoc l do thi quen dung t m c mt s ti liu coi vi iu khin l mt vi x l. V vy trong ti ny, khi nhc n vi x l th cng c th c hiu l ang nhc n chip vi iu khin. 1.2. Cc vi iu khin thng dng
H vi iu khin AMCC (do tp on "Applied Micro Circuits Corporation" sn xut). T thng 5 nm 2004, h vi iu khin ny c pht trin v tung ra th trng bi IBM. o 403 PowerPC CPU o PPC 403GCX o 405 PowerPC CPU o PPC 405EP o PPC 405GP/CR o PPC 405GPr o PPC NPe405H/L o 440 PowerPC Book-E CPU o PPC 440GP o PPC 440GX o PPC 440EP/EPx/GRx o PPC 440SP/Spe80 H vi iu khin Atmel o Dng Atmel AT91 (Kin trc ARM THUMB) o Dng AT90, Tiny & Mega AVR (Atmel Norway design) o Dng Atmel AT89 (Kin trc Intel 8051/MCS51) o Dng MARC4 H vi iu khin Cypress MicroSystems o CY8C2xxxx (PSoC) H vi iu khin Freescale Semiconductor. T nm 2004, nhng vi iu khin ny c pht trin v tung ra th trng bi Motorola. o Dng 8-bit 68HC05 (CPU05) 68HC08 (CPU08)
68HC11 (CPU11) o Dng 16-bit 68HC12 (CPU12) 68HC16 (CPU16) Freescale DSP56800 (DSPcontroller) o Dng 32-bit Freescale 683XX (CPU32)
MPC500 MPC 860 (PowerQUICC) MPC 8240/8250 (PowerQUICC II) MPC 8540/8555/8560 (PowerQUICC III)
H vi iu khin Fujitsu o FMC Family (8/16 bit) o FR Family (32 bit) o FR-V Family (32 bit RISC) H vi iu khin Intel o Dng 8-bit 8XC42 MCS48 MCS51 8061 8xC251 o Dng 16-bit 80186/88 MCS96 MXS296 o Dng 32-bit 386EX
i960 H vi iu khin Microchip o 12-bit instruction PIC o 14-bit instruction PIC o PIC16F84 o 16-bit instruction PIC H vi iu khin National Semiconductor o COP8 o CR16 H vi iu khin STMicroelectronics o ST 62 o ST 7 H vi iu khin Philips Semiconductors o LPC2000 o LPC900 o LPC700 1.3. Cc th h vi x l -Th h 1 (19711973): vi x l 4 bit, i din l 4004, 4040, 8080 (Intel) hay IPM-16 (National Semiconductor). + di word thng l 4 bit (c th ln hn). + Ch to bng cng ngh PMOS vi mt phn t nh, tc thp, dng ti thp nhng gi thnh r. + Tc 10 - 60 us / lnh vi tn s xung nhp 0.1 - 0.8 MHz. + Tp lnh n gin v phi cn nhiu vi mch ph tr. - Th h 2 (19741977): vi x l 8 bit, i din l 8080, 8085 (Intel) hay Z80 (Zilog). + Tp lnh phong ph hn.
+ a ch c th n 64 KB. Mt s b vi x l c th phn bit 256 a ch cho thit b ngoi vi. + S dng cng ngh NMOS hay CMOS. + Tc 1 - 8 us / lnh vi tn s xung nhp 1 - 5 MHz - Th h 3 (19781982): vi x l 16 bit, i din l 68000/68010 (Motorola) hay 8086/80286/80386 (Intel) + Tp lnh a dng vi cc lnh nhn, chia v x l chui. + a ch b nh c th t 1 - 16 MB v c th phn bit ti 64KB a ch cho ngoi vi + S dng cng ngh HMOS. + Tc 0.1 - 1us / lnh vi tn s xung nhp 5 - 10 MHz. - Th h 4: vi x l 32bit 68020/68030/68040/68060 (Motorola) hay 80386/80486 (Intel) v vi x l 32 bit Pentium (Intel). + Bus a ch 32 bit, phn bit 4 GB b nh. + C th dng thm cc b ng x l (coprocessor). + C kh nng lm vic vi b nh o. + C cc c ch pipeline, b nh cache. + S dng cng ngh HCMOS. - Th h 5: vi x l 64 bit 1.4. S khi ca vi x l C 3 khi chc nng: n v thc thi (EU - Execution unit), b tun t (Sequencer) v n v giao tip bus (BIU Bus interface unit). - EU: thc hin cc lnh s hc v logic. Cc ton hng c cha trong cc thanh ghi d liu (data register) hay thanh ghi a ch (address register), hay t bus ni (internal bus). - B tun t: gm b gii m lnh (instruction decoder) v b m chng trnh (program counter). + B m chng trnh cha cc lnh k tip s thc hin.
+ B gii m s thc hin cc bc cn thit thc thi lnh.
Hnh 1.1. S khi ca mt vi x l Khi chng trnh bt u, b m chng trnh (PC) s a ch bt u. a ch ny c chuyn qua b nh thng qua address bus. Khi tn hiu Read a vo control bus, ni dung b nh lin quan s a vo b gii m lnh. B gii m lnh s khi ng cc php ton cn thit thc thi lnh. Qu trnh ny i hi mt s chu k my (machine cycle) tu theo lnh. Sau khi lnh thc thi, b gii m lnh s t PC n a ch ca lnh k. B no ca mi vi x l chnh l CPU, cc phn cng khc ch l cc c quan chp hnh di quyn ca CPU. Mi c quan ny u c mt c ch hot ng nht nh m CPU phi tun theo khi giao tip vi chng. c th giao tip v iu khin cc c quan chp hnh (cc ngoi vi), CPU s dng 03 loi tn hiu c bn l tn hiu a ch (Address), tn hiu d liu (Data) v tn hiu iu khin (Control). V mt vt l th cc tn hiu ny l cc ng nh dn in ni t CPU n cc ngoi vi hoc thm ch l gia cc ngoi vi vi nhau. Tp hp cc ng tn hiu c cng chc nng gi l cc bus. Nh vy ta c cc bus a ch, bus d liu v bus iu khin. 1.4.1. n v x l trung tm CPU
CPU c cu to gm c n v x l s hc v lgic (ALU), cc thanh ghi, cc khi lgic v cc mch giao tip. Chc nng ca CPU l tin hnh cc thao tc tnh ton x l, a ra cc tn hiu a ch, d liu v iu khin nhm thc hin mt nhim v no do ngi lp trnh a ra thng qua cc lnh. 1.1.4.2. B nh Nhn chung c hai loi b nh l b nh chng trnh v b nh d liu. - B nh chng trnh dng cha m chng trnh hng dn CPU thc hin mt nhim v no . Thng thng th b nh chng trnh l cc loi b nh khng bay hi (non-volatile), ngha l khng b mt ni dung cha bn trong khi ngng cung cp ngun nui. C th k ra mt s b nh thuc loi ny nh: ROM, PROM, EPROM, EEPROM, Flash. - B nh d liu l b nh dng cha d liu (bao gm cc tham s, cc bin tm thi). Ty thuc loi d liu m b nh loi ny c th l loi khng bay hi hoc bay hi (mt d liu khi ct ngun nui). Loi bay hi thng thy l cc b nh SRAM. 1.4.3. Cng vo/ra song song y l cc ng tn hiu c ni vi mt s chn ca IC dng giao tip vi th gii bn ngoi IC. Giao tip y l a in p ra hoc c vo gi tr in p ti chn cng. Cc gi tr in p a ra hay c vo ch c th c biu din bi mt trong hai gi tr lgic (0 hoc 1). Trong k thut vi x l, ngi ta thng dng quy c lgic dng: gi tr lgic 0 ng vi mc in p thp xp x 0VDC, gi tr lgic 1 ng vi mc in p cao xp x +5VDC. Ty loi vi x l m khong xp x l khc nhau nhng nhn chung l tng thch vi mc lgic TTL. Mi cng vo/ra song song thng gm 08 ng vo/ra khc nhau v gi l cc cng 08 bit. Cc ng tn hiu vo/ra ca cc cng v thuc cng mt cng l c lp vi nhau. iu c ngha l ta c th a ra hay c vo cc gi tr lgic khc nhau i vi tng chn cng (tng ng tn hiu vo/ra). Mt iu cn ch na i vi cc cng vo/ra l chng c
th c tch hp thm (ni ng hn l kim thm) cc chc nng c bit lin quan n cc ngoi vi khc. 1.4.4. Cng vo/ra ni tip Khc vi cng song song, vi cng ni tip cc bit d liu c truyn ln lt trn cng mt ng tn hiu thay v truyn cng mt lc trn cc ng tn hiu khc nhau. Thng thng th vic truyn d liu bng cng ni tip phi tun theo mt c ch, mt giao thc hay mt nguyn tc nht nh. C th k ra mt s giao thc nh SPI, I2C, SCI Cng ni tip c 02 kiu truyn d liu chnh: Truyn ng b (synchronous): thit b truyn v thit b nhn u dng chung mt xung nhp (clock). - Truyn d b (asynchronous): thit b truyn v thit b nhn s dng hai ngun xung nhp ring. Tuy nhin hai ngun xung nhp ny khng c khc nhau qu nhiu. Xung nhp l yu t khng th thiu trong truyn d liu ni tip v n c vai tr xc nh gi tr ca bit d liu (hay ni ng hn l xc nh thi im c mc lgic trn ng truyn d liu). Cng ni tip c th c mt trong cc tnh nng sau: - n cng: thit b ch c th hoc truyn hoc nhn d liu. - Bn song cng: thit b c th truyn v nhn d liu nhng ti mt thi im ch c th lm mt trong hai vic . - Song cng: thit b c th truyn v nhn d liu ng thi. 1.4.5. B m/B nh thi y l cc ngoi vi c thit k thc hin mt nhim v n gin: m cc xung nhp. Mi khi c thm mt xung nhp ti u vo m th gi tr ca b m s c tng ln 01 n v (trong ch m tin/m ln) hay gim i 01 n v (trong ch m li/m xung). Xung nhp a vo m c th l mt trong hai loi:
- Xung nhp bn trong IC. l xung nhp c to ra nh kt hp mch dao ng bn trong IC v cc linh kin ph bn ngoi ni vi IC. Ta c th v l nhp tim ton b cc phn cng bn trong vi x l (bao gm c CPU v cc ngoi vi) c th hot ng c. Trong trng hp s dng xung nhp loi ny, ngi ta gi l cc b nh thi (timers). Do xung nhp bn loi ny thng u n nn ta c th dng m thi gian mt cch kh chnh xc. - Xung nhp bn ngoi IC. l cc tn hiu lgic thay i lin tc gia 02 mc 01v khng nht thit phi l u n. Trong trng hp ny ngi ta gi l cc b m (counters). ng dng ph bin ca cc b m l m cc s kin bn ngoi nh m cc sn phm chy trn bng chuyn, m xe ra/vo kho bi. Mt khi nim quan trng cn phi ni n l s kin trn (overflow). N c hiu l s kin b m m vt qu gi tr ti a m n c th biu din v quay tr v gi tr 0. Vi b m 8 bit gi tr ti a l 255 v l 65535 vi b m 16 bit. Ngoi cc phn cng nu trn cn phi k n mt khi lgic khc l khi giao tip bus. Khi ny c chc nng ghp ni gia cc bus bn trong chip v cc chn a ra ngoi chip. Mc ch ca vic a cc tn hiu a ch, d liu v iu khin ra ngoi l nhm m rng kh nng phi ghp thm ca vi x l vi cc ngoi vi khc (ch yu l cc b nh ngoi) ngoi cc ngoi vi c tch hp trn IC. Thng thng th s lng cc ng tn hiu l gi nguyn khi a ra ngoi chip, tuy nhin trong mt s trng hp s lng cc ng tn hiu c th nh hn s lng thc bn trong (v d nh trng hp ca vi x l 8088, bus d liu bn trong l 16 bit nhng a ra ngoi ch c 8 bit). Khi a ra ngoi, cc tn hiu a ch v d liu c th c ghp vi nhau (cng s dng chung mt s chn no ) hoc c tch ring (tn hiu a ch dng mt s chn, tn hiu d liu dng mt s chn khc). Ngi ta thng dn knh (multiplex), tc l ghp chc nng, gia bus a ch v bus d liu gim thiu s chn cn thit. Trong trng hp ny, tn hiu a ch s xut hin trc, sau l tn hiu d liu trn cng mt tp hp cc ng tn hiu. tch c 2 loi tn hiu
th nh sn xut cung cp cho ngi s dng mt ng tn hiu iu khin c tn l tn hiu cht a ch (thng k hiu l ALE). Tn hiu ny s tch cc khi tn hiu a ch xut hin v khng tch cc khi tn hiu d liu xut hin trn bus. Cc IC thch hp vi vic tch tn hiu a ch v d liu l cc IC thuc h 74xx373/374 hoc 74xx573/574. 1.5. Nguyn l hot ng ca mt vi x l Trong k thut vi x l mt khi nim c nhc ti nhiu l khng gian a ch. N c hiu l s lng a ch m CPU c th phn bit c. Trong mt b nh c rt nhiu nh v CPU thng phi truy nhp (ghi hoc c) n tng nh c th, do CPU tt nhin phi phn bit c cc nh ring r vi nhau. Mi nh cn phi c mt a ch gn vi n, a ch ny ch dnh ring cho nh , khng trng vi a ch ca mt nh no khc, khi truy nhp ti a ch tc l truy nhp n nh . Ngoi nh, trong vi x l cn c mt s phn cng khc cng cn c mt a ch dnh ring cho n nh cc thanh ghi iu khin, cc thanh ghi d liu Thng th hu nh tt c nhng phn cng cn c truy nhp hay tc ng n u phi c gn vi mt hay nhiu a ch. Ly v d, c th giao tip v iu khin mt b m (timer/counter), CPU cn phi tc ng n cc thanh ghi quy nh ch hot ng, thanh ghi cha s m ca b m . Cc thanh ghi ny u c a ch gn ring cho chng v nh cc a ch m CPU c th ghi/c gi tr ca cc thanh ghi, qua tc ng ln b m. Vi x l hot ng theo mt s nguyn tc c bn sau Cc thao tc tnh ton x l s c vi x l, hay ni ng hn l CPU, thc hin theo cc ch dn (chnh l cc lnh) t trong b nh chng trnh. Cc vi x l ch c th nhn bit c hai v ch hai gi tr lgic tri ngc nhau m thi. Hai gi tr lgic tri ngc nhau c th l en-trng, khng-c, cao-thp iu khng quan trng, ci quan trng l v mt vt l (in hc), nh mt c ch no m khi c ni dung ca b nh hay c gi tr lgic ca mt cng vo ra, vi x l c th phn bit c khi no gi tr c c l gi tr lgic th nht v khi no th
khng phi th. Theo truyn thng ngi ta quy nh chung rng cc gi tr lgic l 0 v 1. Biu th cc gi tr lgic theo quy c lgic dng l in p cao (xp x +5VDC) cho gi tr 1 v in p thp (xp x 0VDC) cho gi tr 0. Nh vy, thay v ni vi vi x l rng hy a ra gi tr lgic 1 ti chn cng A!, ngi ta m ho cu ni thnh mt chui cc bit lgic 0-1 (v d 00001010 chng hn) ri t trong b nh chng trnh ca IC. CPU khi cp ngun nui s c v tt nhin n hiu ci chui 0-1 c ngha l g v n s thc hin theo ngha ca lnh n dch ra t chui 0-1 . Vic thc hin cc lnh s din ra tun t (lnh a ch thp hn c thc hin trc) bt u t a ch reset. a ch reset l a ch ca b nh chng trnh m ti , sau khi c cp ngun nui, CPU s bt u c v thc hin theo ch dn c m ha t ti . Mi loi vi x l c mt a ch reset ring (thng l t 0000H) do nh sn xut quy nh. Cc lnh c thc hin tun t l nh c thanh ghi b m chng trnh(PC). Thanh ghi ny cha a ch ca nh cha m ca lnh tip theo s c thc hin. Khi CPU tm np c m ca lnh n, thanh ghi PC s t ng tng ln 1 n v tr vo nh cha m ca lnh (n+1). CPU thc hin mt lnh theo cc bc nh. Thng th cc bc bao gm: tm np m lnh (fetch-tc l truy cp b nh chng trnh, c ly gi tr ti nh c a ch tr bi thanh ghi PC, lu vo mt thanh ghi chuyn dng cha m lnh trong CPU), gii m lnh (decode-gii m gi tr ly c v ang t trong thanh ghi cha m lnh trong CPU), cui cng l thc hin lnh (execute-thc hin ch dn c gii m ra t m lnh c c). Nhng vi x l u tin c thit k vi phng thc thc hin lnh mt cch thun tun t, ngha l thc hin tun t 3 bc i vi lnh th n ri mi thc hin 3 bc tip theo ca lnh th (n+1).
Hnh 1.2. X l lnh theo kiu tun t Sau ny, cc vi x l c thit k vi CPU c module ha thnh tng phn ring bit c hot ng kh c lp vi nhau, do m cu trc x l ng ng (pipeline) ra i. Vi cu trc ny, cc bc nh trong vic thc hin cc lnh s c gi ln nhau, trong khi mt phn cng ca CPU thc hin bc 3 (thc hin lnh) ca lnh n th mt phn cng khc ca CPU thc hin vic gii m lnh tip theo (lnh th n+1), v ng thi mt phn cng khc na trong CPU tm np m ca lnh th (n+2).
Hnh 1.3. X l lnh theo kiu ng ng Vi cu trc x l ng ng, tc x l ca CPU c nng cao r rt v tt c nhng vi x l ngy nay u c thit k vi CPU theo cu trc x l ny. Ngn xp(Stack): L mt on b nh (thng t trong RAM) dng cha a ch tr v ca trong cc trng hp chng trnh con hoc chng trnh phc v ngt c gi. Ngoi ra ngn xp cn dng lu cc d liu tm thi. Ngn xp hot ng theo c ch vo sau ra trc (LIFO-Last In First Out). Thanh ghi con tr ngn xp (SP-Stack Pointer) l thanh ghi c ni dung l a ch ca nh trn cng ca ngn xp. Gi tr ca SP c tng gim mt cch t ng. Ngn xp l phn cng v cng quan trng trong vi x l, n tham gia vo cc thao tc r nhnh (tr thao tc nhy) ca chng trnh. Ngi lp trnh phi ht sc cn thn khi gn gi tr khi to cho SP trnh s c trn ngn xp hoc ngn xp trng vi cc vng nh lu d liu
khc. Khi xy ra mt trong cc s c trn, s khng c cch no kim sot c hot ng ca vi x l v c th gy thit hi ln i vi h thng. Vy th no l a ch tr v? Nh ni trn, vi x l thc hin cc lnh mt cch tun t: lnh1, lnh2,, lnh n, lnh n+1Tuy nhin i khi n gp phi mt lnh gi chng trnh con v do phi chuyn sang thc hin chng trnh con . on m lnh ca chng trnh con thng nm mt ni khc trong b nh chng trnh, tc l c a ch khng lin tip vi lnh gi chng trnh con. Nhc li rng thanh ghi PC lc ny ang cha a ch ca lnh tip sau lnh gi chng trnh con. CPU ch bit thc hin nhng g c ti a ch cha trong PC, do vy m PC cn phi c np gi tr mi l a ch ca m lnh u tin ca chng trnh con. Vic np gi tr mi cho PC c thc hin mt cch t ng khi bn gi mt chng trnh con, ngoi ra a ch ca lnh tip sau lnh gi chng trnh con trong chng trnh chnh cng c t ng lu li sau khi thc hin xong chng trnh con, CPU s c th quay li thc hin tip chng trnh chnh mt cch ng ch, tun t nh khng c chuyn g xy ra. Ni lu gi mt cch t ng a ch tr v (a ch ca lnh tip sau lnh gi chng trnh con) y chnh l ngn xp. Ngi ta thc hin vic chia chng trnh chnh thnh cc chng trnh con (l cc on chng trnh thc hin mt nhim v c th) d dng cho vic lp trnh v d li. Bn s dn c c k nng chia nh chng trnh chnh thnh cc chng trnh con mt cch hp l trong qu trnh lp trnh cho vi x l. Ngn xp cng c vai tr tng t nh i vi ngt. Vy ngt l g? l nhng yu cu do cc ngoi vi (l cc phn cng tch hp trn IC hoc cc tc ng t bn ngoi) gi ti CPU nhm i hi nhng p ng nht nh. Mc ch ca vic thit k c ch ngt trong vi x l l nhm tit kim thi gian cho CPU. Trong hu ht cc trng hp, vi x l cn phi thc hin nhiu nhim v trong thi gian rt ngn v lin tc. c th p ng kp thi vi cc s kin cn x l, CPU c th tin hnh thm d (polling) lin tc cc s kin xem khi no chng xy
ra th x l, p ng li. Tuy nhin nu lm vy th lng ph rt nhiu thi gian ca CPU trong khi cn c rt nhiu nhim v khc ang ch c thc hin, ngoi ra CPU khng th thm d nhiu s kin cng mt lc c. Ngi ta to ra ngt CPU khng phi thm d lin tc mt hay nhiu s kin . Bng cch ghp cc s kin cn p ng vi cc c ch ngt khc nhau, khi mt s kin no xy ra, phn cng ph trch ngt tch hp trn CPU s t ng bo cho CPU bit rng s kin xy ra. CPU s dng cng vic ang lm li (nhng phi thc hin xong lnh ang c thc hin, d mi ch giai on tm np m lnh), v chuyn sang p ng bng cch thc hin chng trnh phc v ngt tng ng. p ng xong, tc l x l xong s kin gy ra ngt, CPU s tip tc quay li lm tip cng vic ang dang d (ng nhin l nh hot ng ca ngn xp). Ni n ngt khng th khng ni n mc u tin ca cc loi ngt khc nhau. C 02 loi mc u tin ngt c bn l u tin gia cc ngt xy ra ng thi (ngt A v ngt B xy ra ng thi cng mt lc) v u tin gia cc ngt xy ra khc thi im (ang thc hin chng trnh phc v ngt A th li xy ra ngt B). Trong c hai trng hp, ngt c mc u tin cao hn s lun c phc v ngay lp tc. Ty loi vi x l m mc u tin c th thay i c linh hot hoc c nh. Khc vi chng trnh con, thi im thc hin chng trnh phc v ngt trong hu ht cc trng hp l nm ngoi s kim sot ca ngi lp trnh do ngt c th xy ra bt k thi im no, khi CPU ang thc hin bt k mt lnh no trong chng trnh chnh. V th c ch hot ng mt cch t ng ca ngn xp l khng th thiu trong mt vi x l. Cng v th m cn phi xem xt k lng vic s dng cc ti nguyn (thanh ghi, nh, bin, thm ch l cc ngoi vi) ca cc chng trnh phc v ngt trnh tranh chp vi chng trnh chnh. Thng thng th khi vo u chng trnh phc v ngt, ngi ta lu li nhng ti nguyn dng chung trc khi thay i chng. Kt thc chng trnh phc v ngt, cc ti nguyn s c khi phc li gi tr ca chng trc khi tr v chng trnh chnh. Thc hin cc thao tc lu tr v khi phc ny ng nhin lin quan n ngn xp, ch c iu khng phi thc hin mt
cch t ng bi CPU m phi do ngi lp trnh ch ng thc hin bng cc lnh. Ngi lp trnh phi quyt nh ct nhng g v ly ra nhng g! Cng phi ch n c ch hot ng vo sau ra trc ca ngn xp v ct i bao nhiu th phi ly ra by nhiu. Nu khng ngi lp trnh s phm phi mt li tng t nh trn ngn xp v chng th no bit c chuyn g s xy ra khi a ch tr v khng c np ng vo thanh ghi PC. Mt trong nhng ti nguyn hay b thay i khi thc hin chng trnh phc v ngt l cc c trng thi ca CPU. l cc bit th hin trng thi hin thi ca CPU v ca kt qu thc hin cc lnh.
CHNG 2 TNG QUAN V TCP/IP

TCP/IP (Transmission Control Protocol/ Internet Protocol) l mt h thng giao thc-mt tp hp cc giao thc h tr vic lu truyn trn mng. TCP/IP l mt b giao thc c thit k t c hai mc tiu chnh: Mt l: cho php truyn thng qua cc ng dy ca mng rng (Wide Area Network WAN). Hai l: Cho php truyn thng gia cc mi trng a dng. Hiu c bn cht ca cc giao thc ny gip ta hiu c s quan trng ca chng trong cc mng ngy nay. 2.1. Mng v giao thc 2.2.1. Mng (Mng my tnh) Mng my tnh hay h thng mng (computer network hay network system) l mt tp hp cc my tnh t hot c kt ni nhau thng qua cc phng tin truyn dn nhm cho php chia s ti nguyn: my in, my fax, tp tin, d liu,. . . Vo gia thp nin 1980, ngi s dng dng cc my tnh c lp bt u chia s cc tp tin bng cch dng moderm kt ni vi cc my tnh khc. Cch thc ny c gi l im ni im, hay truyn theo kiu quay s. Khi nim ny c m rng bng cch dng cc my tnh l trung tm truyn tin trong mt kt ni quay s. Cc my tnh ny c gi l sn thng bo (bulletin board). Cc ngi dng kt ni n sn thng bo ny, li hay ly i cc thng ip, cng nh gi ln hay ti v cc tp tin. Hn ch ca h thng l c rt t hng truyn tin, v ch vi nhng ai bit v sn thng bo . Ngoi ra, cc my tnh ti sn thng bo cn mt moderm cho mi kt ni, khi s lng kt ni tng ln h thng khng th p ng c nhu cu. Qua cc thp nin 1950, 1970 cc k s in ton ca cc vin nghin cu trn khp nc M bt u lin kt my tnh ca h vi nhau thng qua cng ngh ca
ngnh lin lc vin thng. Nhng c gng ny c ARPA h tr, v mng my tnh m n cung cp c gi l ARPANET. Cc cng ngh to ra Arpanet m rng v pht trin sau . B Quc phng Hoa K pht trin cc mng din rng WAN c tin cy cao, nhm phc v cc mc ch qun s v khoa hc. Cng ngh ny khc truyn tin im ni im. N cho php nhiu my tnh kt ni li vi nhau bng cc ng dn khc nhau. Bn thn mng s xc nh d liu di chuyn t my tnh ny n my tnh khc nh th no. Thay v ch c th thng tin vi mt my tnh ti mt thi im, n c th thng tin vi nhiu my tnh cng lc bng cng mt kt ni. Trong thp nin 1990, vic pht trin ca cng ngh World Wide Web lm cho ngay c nhng ngi khng chuyn nghip cng c th s dng internet. N pht trin nhanh n mc tr thnh phng tin lin lc ton cu nh ngy nay.
Hnh 2.1. M hnh tng qut ca mng Internet Nh trong hnh 2.1 kt cu vt l ca mng Internet gm c mng chnh cha cc server cung cp dch v cho mng, mng nhnh bao gm cc trm lm vic s dng dch v do Internet cung cp. "m my Internet" hm cha v vn mng chnh, mng nhnh v bao ph ton th gii. mt h thng phc tp nh vy hot ng trn tru v hiu qu th iu kin tin quyt l mi my tnh trong mng, d khc nhau v kin trc, u phi giao tip vi mng theo cng mt quy lut. l giao thc TCP/IP. 2.2.2 . Giao thc TCP/IP
TCP/IP l b giao thc cho php kt ni cc h thng mng khng ng nht vi nhau. TCP/IP l vit tt ca Transmission Control Protocol (Giao thc iu Khin Truyn thng)/Internet Protocol (Giao thc Internet), ngy nay TCP/IP c s dng rng ri trong c c mng cc b cng nh trn mng Internet ton cu. TCP/IP khng ch gm 2 giao thc m thc t n l tp hp ca nhiu giao thc. Chng ta gi l 1 h giao thc hay b giao thc (Suite Of Protocols). TCP/IP c xem l gin lc ca m hnh tham chiu OSI vi bn tng, trong m hnh ny l (theo th t t trn xung): + Tng ng dng (Application Layer) + Tng giao vn (Transport Layer) +Tng mng (Internet Layer) + Tng lin mng (Network Interface Layer)
Hnh 2.2. Ki n trc TCP/IP Tng lin mng (Network Interface Layer): Tng Lin Mng c trch nhim a d liu ti v nhn d liu t phng tin truyn dn. Tng ny bao gm cc thit b giao tip mng(Card Mng v Cp Mng) v chng trnh cung cp cc thng tin cn thit c th hot ng, truy nhp ng truyn vt l qua thit b giao tip mng . Tng mng (Internet Layer): Nm trn tng lin mng. Tng ny c chc nng gn a ch, ng gi v nh tuyn (Route) d liu. Bn giao thc quan trng nht trong tng ny gm:
IP (Internet Protocol): C chc nng gn a ch cho d liu trc khi truyn v nh tuyn chng ti ch. ARP (Address Resolution Protocol): C chc nng bin dch a ch IP ca my ch thnh a ch MAC (Media Access Control). ICMP (Internet Control Message Protocol): C chc nng thng bo li trong trng hp truyn d liu b hng. IGMP (Internet Group Management Protocol): C chc nng iu khin truyn a hng (Multicast). Tng giao vn (Transport Layer): C trch nhim thit lp phin truyn thng gia cc my tnh v quy nh cch truyn d liu 2 giao thc chnh trong tng ny gm c hai giao thc chnh: TCP (Transmission Control Protocol) v UDP (User Datagram Protocol). TCP cung cp cc knh truyn thng hng kt ni v m bo truyn d liu mt cch tin cy, n cung cp mt lung d liu tin cy gia hai trm, n s dng cc c ch nh chia nh cc gi tin ca tng trn thnh cc gi tin c kch thc thch hp cho tng mng bn di, bo nhn gi tin, t hn ch thi gian time-out m bo bn nhn bit c cc gi tin gi i. TCP thng truyn cc gi tin c kch thc ln v yu cu pha nhn xc nhn v cc gi tin nhn. Do tng ny m bo tnh tin cy, tng trn s khng cn quan tm n na. UDP cung cp mt dch v n gin hn cho tng ng dng. UDP cung cp knh truyn thng phi kt ni, n ch gi cc gi d liu t trm ny ti trm kia m khng m bo cc gi tin n c ti ch. Cc ng dng dng UDP thng ch truyn nhng gi c kch thc nh, tin cy d liu ph thuc vo tng ng dng. Cc c ch m bo tin cy cn c thc hin bi tng trn. Tng ng dng (Application Layer): Tng ng dng l tng trn cng ca m hnh TCP/IP bao gm cc tin trnh v cc ng dng cung cp cho ngi s dng truy cp mng. Mt s giao thc thng dng trong tng ny l: DHCP (Dynamic Host Configuration Protocol): Giao thc cu hnh trm ng.
DNS (Domain Name System): H thng tn min SNMP (Simpe Network Management Protocol): Giao thc qun l mng n gin. FTP (File Transfer Protocol): Giao thc truyn tp tin TFTP (Trivial File Transfer Protocol): Giao thc truyn tp tin bnh thng SMTP (Simple Mail Transfer Protocol): Giao thc truyn th n gin. TELNET
Hnh 2.3. M t khi qut v b giao thc TCP/IP. Cng tng t nh trong m hnh OSI, khi truyn d liu, qu trnh tin hnh t tng trn xung tng di, qua mi tng d liu c thm vo mt thng tin iu khin c gi l phn header. Khi nhn d liu th qu trnh xy ra ngc li, d liu c truyn t tng di ln v qua mi tng th phn header tng ng c ly i v khi n tng trn cng th d liu khng cn phn header na.
Hnh 2.4. Qu trnh ng/m gi d liu trong TCP/IP
Hnh 2.5. Cu trc d liu trong TCP/IP Hnh v 2-5 cho ta thy lc d liu qua cc tng. Trong hnh v ny ta thy ti cc tng khc nhau, d liu c mang nhng thut ng khc nhau:
Trong tng ng dng d liu l cc lung c gi l stream. Trong tng giao vn, n v d liu m TCP gi xung tng di gi l TCP segment. Trong tng mng, d liu m IP gi ti tng di c gi l IP datagram. Trong tng lin kt, d liu c truyn i gi l frame. 2.3. Mng cc b LAN v cng ngh Ethernet 2.2.1. Mng cc b LAN Mng cc b (LAN) l h truyn thng tc cao c thit k kt ni cc my tnh v cc thit b x l d liu khc cng hot ng vi nhau trong mt khu vc a l nh nh mt tng ca to nh, hoc trong mt to nh.... Mt s mng LAN c th kt ni li vi nhau trong mt khu lm vic. Cc mng LAN tr nn thng dng v n cho php nhng ngi s dng dng chung nhng ti nguyn quan trng nh my in mu, a CD-ROM, cc phn mm ng dng v nhng thng tin cn thit khc. Trc khi pht trin cng ngh LAN cc my tnh l c lp vi nhau, b hn ch bi s lng cc chng trnh tin ch, sau khi kt ni mng r rng hiu qu ca chng tng ln gp bi. Hu ht cc mng LAN ngy nay u c thit k hot ng da trn mt cu trc mng nh trc. in hnh v s dng nhiu nht l cc cu trc: dng hnh sao, dng hnh tuyn, dng vng cng vi nhng cu trc kt hp ca chng.
Hnh 2.6. Cu trc mng hnh sao
Hnh 2.7. Cu trc mng hnh tuyn
Hnh 2.8. Cu trc mng dng vng 2.2.2. Cng ngh Ethernet Hn 20 nm trc, Ethernet ra i mang li mt mng truyn d liu ni tip tc cao; ti nay, n tr thnh mt chun c chp nhn khp th gii, v l giao thc thng tr cc mng LAN. Hn 85% kt ni mng c ci t trn th gii l Ethernet. Tc truyn d liu ph bin nht ca Ethernet l 10 triu bit/s (10 Mbps), mc d vy, hu ht cc mng hin nay ang c nhanh chng nng cp ln Fast Ethernet vi tc 100 Mbps. Ethernet thng gn vi h iu khin cng nghip qua mt iu khin c lp kt ni vi PC hay mng bng cp Ethernet. Ngy 22 thng 5 nm 1973, Robert Metcalfe thuc Trung tm Nghin cu Palto Alto ca hng Xerox PARC, bang California, a ra tng h thng kt ni mng my tnh cho php cc my tnh c th truyn d liu vi nhau v vi my in lazer. Lc ny, cc h thng tnh ton ln u c thit k da trn cc my tnh trung tm t tin (mainframe). im khc bit ln m Ethernet mang li l cc my tnh c th trao i thng tin trc tip vi nhau m khng cn qua my tnh trung tm. M hnh mi ny lm thay i th gii cng ngh truyn thng.
Chun Ethernet 10Mbps u tin c xut bn nm 1980 bi s phi hp pht trin ca 3 hng : DEC, Intel v Xerox. Chun ny c tn DIX Ethernet (ly tn theo 3 ch ci u ca tn cc hng). U ban 802.3 ca IEEE ly DIX Ethernet lm nn tng pht trin. Nm 1985, chun 802.3 u tin ra i vi tn IEEE 802.3 Carrier Sense Multiple Access with Collition Detection (CSMA/CD) Access Method vesus Physical Layer Specification. Mc d khng s dng tn Ethernet nhng hu ht mi ngi u hiu l chun ca cng ngh Ethernet. Ngy nay chun IEEE 802.3 l chun chnh thc ca Ethernet. IEEE pht trin chun Ethernet trn nhiu cng ngh truyn dn khc nhau v th c nhiu loi mng Ethernet. Cc chun Ethernet u hot ng tng Data Link trong m hnh 7 lp OSI v th n v d liu m cc trm trao i vi nhau l cc khung (frame). Cu trc khung Ethernet nh sau:
Hnh 2.9. Cu trc khung tin Ethernet Cc trng quan trng trong phn mo u s c m t di y: preamble: trng ny nh du s xut hin ca khung bit, n lun mang gi tr 10101010. T nhm bit ny, pha nhn c th to ra xung ng h 10 Mhz. SFD (start frame delimiter): trng ny mi thc s xc nh s bt u ca mt khung. N lun mang gi tr 10101011. Cc trng Destination v Source: mang a ch vt l ca cc trm nhn v gi khung, xc nh khung c gi t u v s c gi ti u. LEN: gi tr ca trng ni ln ln ca phn d liu m khung mang theo. FCS mang CRC (cyclic redundancy checksum): pha gi s tnh ton trng ny trc khi truyn khung. Pha nhn tnh ton li CRC ny theo cch tng t. Nu hai kt qu trng nhau, khung c xem l nhn ng, ngc li khung coi nh l li v b loi b. 2.3. H thng tn/a ch
*a ch vt l, cn gi l a ch MAC S d c tn gi nh vy l v a ch ny gn lin vi phn cng v i din cho mt thit b. Thng thng a ch vt l c t ngay trn bng mch my tnh hay trn thit b kt ni trc tip vi my (modem, card mng...) a ch vt l c s dng nh sau: Thit b nhn d liu kim tra a ch vt l ch ca gi d liu tng vt l. Nu a ch ch ny ph hp a ch vt l ca thit b th gi d liu s c chuyn ln tng trn, nu khng n s b b qua. *SAP: Dng i din cho giao thc bn trn tng MAC, y l IP. *a ch mng (network address) Mt thc th trong mng c xc nh ch qua a ch mng m khng cn a ch vt l. D liu c truyn qua mng ch da vo a ch mng. Khi no d liu ti mng LAN th a ch vt l mi cn thit a d liu ti ch. V d: My gi c a ch 128.1.6.7 ->a ch mng l 128.1 My nhn c a ch 132.5.8.12 ->a ch mng l 132.5 Mng Internet c trch nhim da vo 2 a ch mng trn a d liu ti mng 132.5. Khi ti mng 132.5 th da vo a ch 8.12 s tm ra a ch vt l thc truyn d liu ti ch. Nh vy c mt thc mc l: c a ch vt l ri, ti sao li cn thm a ch mng? Vic tn ti 2 loi a ch l do cc nguyn nhn: + 2 h thng a ch c pht trin mt cch c lp bi cc t chc khc nhau. + a ch mng ch c 32 bit s tit kim ng truyn hn so vi a ch vt l 48 bit. + Khi mch my hng th a ch vt l cng mt. + Trn quan im ngi thit k mng th s rt hiu qu khi tng IP khng lin quan g vi cc tng di.
Nh trn ni, t a ch mng c th tm c a ch vt l. Cng vic tm kim ny c thc hin bi giao thc ARP (Address Resolution Protocol). Nguyn tc lm vic ca ARP l duy tr mt bng ghi tng ng a ch IP - a ch vt l. Khi nhn c a ch IP, ARP s dng bng ny tm ra a ch vt l. Nu khng thy, n s gi mt gi d liu, gi l ARP request, cha a ch IP vo mng LAN. Nu my no nhn ARP request v nhn ra a ch IP ca mnh th s gi li mt gi d liu cha a ch vt l ca n. hot ng hiu qu nh trn, mi my ch DNS lu tr mt c s d liu gm cc bn ghi cha thng tin: + Tn ca DNS cp cao hn + a ch IP + a ch dng ch tng ng. Ch s ca bn ghi c ly t a ch IP tng ng, nh t a ch IP c th d dng tm ra a ch ch. d. Protocol ID ch ra giao thc ca tng giao vn. Trn Internet trng ny l TCP hoc UDP. e. Port l mt s c trng cho mt chng trnh chy trn Internet. V d, chng trnh ly th in t qua giao thc IMAP c port=143, truyn file c port =21, v.v f. Username l tn ngi ng k s dng chng trnh. IP s dng cc thng tin iu khin trong header ca gi d liu IP quyt nh ng i tip theo ca gi ny. C rt nhiu thng tin iu khin nhng y ch xin phn tch cc thng tin quan trng. u tin l a ch ch. Nu a ch ch trng vi a ch ca router th gi d liu c truyn trc tip cho host B. Nu khng trng th d liu s c truyn n
router tip theo trn ng i. Vn l router no c chn. C 2 kh nng la chn router, tc l 2 kh nng dn ng: + Th nht l tun theo mt cch nghim ngt source routing. D liu s c truyn cho router tip theo trong source routing. Nhng d liu ch c truyn i khi router c chn c trong bng cc router c th n c ca router hin ti, bng khng s sinh ra li. + Th hai l "qun i" source routing v tm ng mi ti ch. Router tip theo c chn da trn s tm ng ny. Thng thng s tm ng da trn thut ton Dijstra tm kim theo chiu rng. Trn thc t, cch ny ang c s dng rng ri v c th tr thnh chun trong tng lai. - Cc gi d liu IP thng c kch thc ph thuc vo mng con. Cc mng con khc nhau th kch thc gi IP ca chng cng khc nhau. Vy gi s mng A truyn c gi d liu c kch thc ln nht l 1024 byte, mng B truyn c gi d liu c kch thc ln nht l 256 byte th gi d liu t mng A c kch thc 1024 byte qua mng B nh th no? gii quyt vn ny, IP cung cp kh nng phn v gom mnh gi d liu. y chnh l lc IP s dng trng flags v offset trong gi d liu IP. Trng flags thc cht l cc c thng bo gi d liu ny c b phn mnh hay khng, trng offset cha gi tr tng i ca gi con trong gi to ban u. Khi phn mnh cc c c bt ln, ng thi trng offset c thit lp gi tr. Da vo cc d liu trn, IP c th d dng gom mnh gi d liu, hi phc khi d liu t ban u.
CHNG 3 KIN TRC CA H THNG

3.1. S khi h thng Ti xin a ra s khi ca H thng iu khin v gim st t xa qua h thng truyn thng vi giao thc TCP/IP, nh sau:
Hnh 3.1. S khi h thng iu khin v gim st thng qua mng Ethernet Nhng khi c lit k trong s khi c th l mt hay nhiu IC ring l, cng c th mt IC ph trch nhiu khi trong s . Khi la chn vi mch, vic u tin l xem xt s ph hp ca n cho mc ch s dng, quy m d n, s h tr ca hng cung cp linh kin, s h tr v phn mm lp trnh, ti liu, ... sau cng mi tnh n gi thnh v s ph bin ca cc vi mch trn th trng. Trong ti ny, mc d chp vi x l l ht nhn ca c d n, nhng ti chn trc tin li chnh l chp h tr truyn thng ethernet. Cn tt c cc vi mch ph tr khc qu quen thuc vi nhng k s in t v thit k mch, ti ch xin a ra v coi l la trn hin nhin v hon ton khng nh hng g n bn cht ca d n.
Trong nhng phn tip theo, chng ta tp trung xem xt hai vi mch chnh l vi mch giao tip ethernet v vi mch iu khin (vi mch vi x l). 3.2. Vi mch truyn thng ethernet Khi kho st v vi mch ethernet, i hi ngi thit k phi c trnh nht nh trong lnh vc mng Internet, tuy nhin v ti c hn, ti xin khng i su vo k thut ny. Trn th gii c rt nhiu hng cung cp vi mch h tr sn sng cho cc giao tip theo giao thc TCP/IP, nh cc hng ln: Realtek, Conexant, MicroChip,... Tuy nhin, xt trn quan im ca ngi thit k th cc chp c nh gi cao l chp p ng c nhu cu thc t (khng thiu v cng khng qu d tha tnh nng), c s h tr ti a t hng v cc th vin lp trnh, d dng giao tip vi cc vi x l, mch thit k n gin, t i hi cc linh kin ngoi. T nhng tiu ch , cng vi s ra i dng chp h tr hon ton giao thc ethernet, vic la chn ENC28J60 ca MicroChip l la chn rt ph hp, c v tnh nng k thut v gi c (ti thi im nm 2008,2009 gi ~3USD/1chp). Ngoi ra, hng h tr y ti liu v cc th vin lp trnh, rt thn thin khi ghp ni vi cc h vi x l c trn th trng. Cc ch tiu k thut * Gii thiu chung: - Tng thch chun IEEE 802.3 Ethernet Controller - Tch hp a ch MAC v 10BASE-T PHY - B m SRAM 8 Kbyte Transmit/Receive Packet Dual Port Buffer - Ch t ng gi li khi c xung t - Ch t ng hy b cc gi tin sai * B m: - Kch thc b m transmit/receive c th lp trnh c - Gim st qu trnh nhn FIFO * PHY: - B lc tn hiu ra
- C ch Loopback * MAC (Media Access Control): - H tr Unicast, Multicast v Broadcast - H tr nhiu dng ng gi tin Magic Packet, Unicast, Multicast, Broadcast
Hnh 3.2. S khi vi mch giao tip ethernet ENC28J60 Nh trnh by trn, ta xem xt ch yu vo phn giao tip ca vi mch ny vi vi x l, tt c cc phn lin quan n k thut mng ethernet s sng t khi chng ta lp trnh cho n phn tip theo. Vi mch ENC28J60 giao tip vi cc vi x l khc thng qua chun truyn d liu ni tip SPI (Serial Peripheral Interface), y l chun giao tip rt ph bin, c dng ni cc vi mch trong cng mt h thng vi u im l chy nhanh v tn rt t dy ni tn hiu, ch cn 3 dy cho c ng ghi v c, l:
Hnh 3.3. S ghp ni ENC28J60 vi vi x l SCK Serial Clock Xung ng b cho ng ni tip SI Serial Input Tn hiu ni tip vo (ghi) SO Serial Output Tn hiu ni tip ra (c) Sau y l b lnh SPI dng cho vi mch ENC28J60 v cc gin xung th hin cc qu trnh ghi, c d liu, lnh gia vi x l v ENC28J60
Hnh 3.4. Qu trnh c thanh ghi iu khin Ethernet
Hnh 3.5. Qu trnh c thanh ghi iu khin MAC
Hnh 3.6. Qu trnh ghi vo thanh ghi lnh
Hnh 3.7. Qu trnh ghi vo b m lnh
Hnh 3.8. Qu trnh ghi vo lnh ca h thng Mc d c thit k theo cu trc stand alone (mt chip lm ht cc vic) nhng vic iu khin vi mch ny hot ng c l rt phc tp v i hi c hiu bit kh ton din v vi iu khin, mch in t v mng Internet. Tuy nhin, rt may mn cho ngi thit k v lp trnh v hng MicroChip (hng sn xut vi mch ENC28J60) h tr ti a, bng cch a ra y cc th vin phc v cho vic lp trnh, lm cho vic lp trnh giao tip vi vi mch ny tr nn kh d dng. 3.3. Vi mch iu khin (vi x l) PIC l mt h vi iu khin RISC c sn xut bi cng ty Microchip Technology. Dng PIC u tin l PIC1650 c pht trin bi Microelectronics Division thuc General Instrument. PIC bt ngun l ch vit tt ca Programmable Intelligent Computer" (My tnh kh trnh thong minh) l mt sn phm ca hng General Instruments t cho dng sn phm u tin ca h l PIC1650. Lc ny, PIC1650 c dng giao tip vi cc thit b ngoi vi cho my ch 16bit CP1600, v vy, ngi ta cng gi PIC vi ci tn "Peripheral Interface Controller" (B iu khin giao tip ngoi vi). CP1600 l mt CPU tt, nhng li km v cc hot ng xut nhp, v v vy PIC 8-bit c pht trin vo khong nm 1975 h tr hot ng xut nhp cho CP1600. PIC s dng microcode n gin t trong ROM, v mc d, cm t RISC cha c s dng thi by gi, nhng PIC thc s l mt vi iu khin vi kin trc RISC, chy mt lnh mt chu k my (4 chu k ca b dao ng).
Nm 1985 General Instruments bn b phn vi in t ca h, v ch s hu mi hy b hu ht cc d n - lc qu li thi. Tuy nhin PIC c b sung EEPROM to thnh 1 b iu khin vo ra kh trnh. Ngy nay rt nhiu dng PIC c xut xng vi hng lot cc module ngoi vi tch hp sn (nh USART, PWM, ADC...), vi b nh chng trnh t 512 Word n 32K Word. Sau khi xem xt nhu cu ca h thng v dng cho nhng mc ch pht trin sau ny, ti chn s dng loi PIC 40 chn, vi rt nhiu cng vo ra s v cc u vo analog, bn cnh l gi thnh ca vi iu khin ny kh r, ch vo khong 5USD/1con. hiu r hn v chip ny, chng ta s tm hiu su hn cc mc tip theo. c tnh ni bt ca b vi x l + S dng cng ngh tch hp cao RISC CPU. + Ngi s dng c th lp trnh vi 35 cu lnh n gin. + Tt c cc cu lnh thc hin trong mt chu k lnh ngoi tr mt s cu lnh r nhnh thc hin trong 2 chu k lnh. + Tc hot ng l: Xung ng h vo l DC 20MHz + Chu k lnh thc hin trong 200ns + B nh chng trnh Flash 8Kx14 words + B nh Ram 368x8 bytes + B nh EFPROM 256x 8 bytes + Kh nng ngt ( ln ti 14 ngun ngt trong v ngt ngoi ) + Ngn nh Stack c phn chia lm 8 mc + Truy cp b nh bng a ch trc tip hoc gin tip. + Ngun khi ng li (POR) + B to xung thi gian (PWRT) v b to dao ng (OST) + B m xung thi gian (WDT) vi ngun dao ng trn chp (ngun dao ng RC ) hot ng ng tin cy. + C m chng trnh bo v.
+ Phng thc ct gi SLEEP + C bng la chn dao ng. + Cng ngh CMOS FLASH /EEPROM ngun mc thp ,tc cao. + Thit k hon ton tnh . + Mch chng trnh ni tip c 2 chn. + X l c /ghi ti b nh chng trnh . + Di in th hot ng rng : 2.0V n 5.5V + Ngun s dng hin ti 25 mA + Cng sut tiu th thp Cc c tnh ni bt ca thit b ngoi vi trn chip + Timer0: 8 bit ca b nh thi, b m vi h s t l trc + Timer1: 16 bit ca b nh thi, b m vi h s t l trc, c kh nng tng trong khi ch Sleep qua xung ng h c cung cp bn ngoi. + Timer 2: 8 bit ca b nh thi, b m vi 8 bit ca h s t l trc, h s t l sau. + C 2 ch bt gi, so snh, iu ch rng xung(PWM). + Ch bt gi vi 16 bit, vi tc 12.5 ns, ch so snh vi 16 bit, tc gii quyt cc i l 200 ns, ch iu ch rng xung 10 bit. + B chuyn i tn hiu s sang tng t vi 10 bit . + Cng truyn thng ni tip SSP vi SPI phng thc ch v I2C + B truyn nhn thng tin ng b, d b(USART/SCL) c kh nng pht hin 9 bit a ch. + Cng ph song song (PSP) vi 8 bit, vi RD, WR v CS iu khin. 3.3.1. S cc chn PIC16F87X
Hnh 3.9. S chn vi mch PIC16F87X 3.3.2. S t chc b nh PIC16F877. PIC16F877 c 3 khi b nh. B nh chng trnh PLASH, b nh d liu RAM, b nh EEPROM. a)B nh chng trnh FLASH v Stack nh Vi iu khin PIC16F877 c mt b m chng trnh 13 bit v c 8Kx14 t m ca b nh chng trnh FLASH, c chia thnh 4 trang mi trang 2Kx14 t m. Khi Reset a ch bt u thc hin chy l 0000h, Vector ngt bt u 0004h. Stack c 8 mc dng lu a ch lnh (PC) thc hin tip theo sau lnh CALL v khi xy ra ngt. b) B nh d liu RAM RAM l b nh c th c v ghi, n khng lu d liu khi mt in, b nh RAM ca PIC16F877 c 4 bank, mi bank c di a ch 027Fh(128byte) trn cc bank nhng thanh ghi a mc ch, n hot ng nh mt RAM tnh.(General purpose
register), v nhng thanh ghi chc nng c bit (Special function registers) vng a ch thp. Bit RP1(Status <6>) v bit RP0 (Status <5>) dng la chn bank lm vic. 3.3.3. Truy xut b nh a) c b nh d liu EEPROM c mt v tr b nh d liu, ta phi ghi a ch vo thanh ghi EEADR, xo bit iu khin EEPGD (EECON1<7>) sau set bit iu khin RD (EECON1<0>). D liu vn tn ti trn nhiu lnh tip theo trn thanh ghi EEDATA, do n c th c c bi lnh tip theo. EEDATA s gi gi tr ny cho ti khi c hot ng c d liu khc hoc l ti khi c ghi. b) Ghi vo b nh d liu EEPROM ghi vo b nh EEPROM th u tin a ch phi c ghi vo thanh ghi EEADR v d liu ghi vo thanh ghi EEDATA. Mt s chn ca cc cng vo/ra c tch hp vi mt s hm c th thay i ph hp vi nhng thit b ngoi vi. Nhn chung khi thit b ngoi vi hot ng, cc chn c th khng s dng vi mc ch lm chn vo ra. 3.3.4. Truy xut cc cng vo ra a) Cng A v thanh ghi TRISA Cng A l cng hai chiu vi rng ng truyn l 6 bit. iu khin vic truy xut d liu ngi ta dng thanh ghi TRISA . Nu t bit TRISA = 1 th lc ny cng A s tng ng c cc chn l chn vo. Nu xo bit TRISA = 0 th lc ny cng A s tng ng c cc chn l chn ra. Vic c cng A chnh l c trng thi ca cc chn, trong khi vic vit phi qua vic vit cc cht ca cng. Cc chn ca cng A ch yu c s dng vi mc ch chnh l nhn tn hiu tng t hoc lm cc chn vo ra. Ring chn RA4 c th a hp vi chn vo b Timer 0 v khi n tr thnh chn RA4/T0CKI. Chn ny nh mt u vo ca Schmitt Trigger v n m u ra. Cc chn khc ca cng A l chn vo vi b TTL. Vic iu khin cc chn ny thng qua vic t hay xo cc bit ca thanh ghi ADCON1. Thang ghi TRISA iu khin trc tip cc chn ca cng A, khi
s dng cc chn ny nhn tn hiu tng t vo ta phi chc chn rng cc bit ca thanh ghi TRISA c t ri. S khi chn RA3:RA0 v chn RA5 v ca chn RA4/TOCKI ca cng A. b) Cng B v thanh ghi TRISB Cng B l cng hai chiu vi rng ng truyn l 8 bit. Tng ng vi n iu khin trc tip d liu ta s dng thanh ghi TRISB. Nu t bit TRISB = 1 th lc ny cc chn cng B c nh ngha l chn vo. Nu xo bit TRISB = 0 th lc ny cc chn cng B c nh ngha l chn ra. Ni dung ca cht ra c th chn trn mi chn. C 3 chn ca cng B c th a hp vi cc chng trnh vn hnh bng in p thp. l cc chn sau: RB3/PGM, RB6/PGC, RB7/PGD. S thay i hot ng ca nhng chn ny c miu t trong phn c tnh ni bt. Mi chn ca cng B c mt kh nng dng bn trong nhng yu. iu ny c trnh by bi vic xo bit RBPU (bit 7 ca thanh ghi OPTION_REG). Kh nng dng ny s t ng tt i khi cc chn ca cng c nh ngha l chn ra. Kh nng dng ny s t ng mt i khi ta RESET. Bn chn ca cng B, t RB7 n RB4 c c tnh l ngt khi thay i trng thi. Ch nhng chn c nh dng l nhng chn vo th ngt ny mi tn ti. Mt vi chn RB7:RB4 c nh dng nh chn ra, n thi hnh ngt trn s thay i so snh. Chn vo RB7:RB4 c so snh vi gi tr c ca cht ln c cui cng ca cng B. S ghp i khng khp chn ra ca RB7:RB4 bng lnh OR lm pht ra lnh ngt vi c bit RBIF ca thanh ghi INTCON. Ngt ny c th khi ng thit b t trng thi SLEEP. c) Cng C v thanh ghi TRISC Cng C l cng hai chiu vi rng ng truyn l 8 bit .Tng ng vi vic iu khin n l thanh ghi TRISC. Nu t bit TRISC = 1 th tng ng vi chn ca cng C l chn vo. Nu ta xo bit TRISC = 0 th tng ng vi n chn ca cng C l chn ra.
t ni dung ca cht ra c th t trn chn chn. Cng C a hp vi vic vn hnh thit bi ngoi vi. Chn ca cng C thng qua b m Schmitt Trigger u vo. Khi ch I2C hot ng, th cc chn cng PORTC<4:3> c th c sp xp vi mc I2C thng hoc vi mc SMBUS bng cch s dng bit CKE (SSPSTAT<6>) l bit 6 ca thanh ghi SSPSTAT. Khi vn hnh cc thit b ngoi vi bng vic xc nh bit TRIS ca mi chn cng C. Mt s phn ph c th ghi ln bit TRISC lm cho chn ny tr thnh chn ra, trong khi th mt s phn ph khc li ghi ln bit TRIS lm cho chn ny tr thnh chn vo. T khi nhng bit TRIS ghi th trong vic tc ng trong cc thit b ngoi vi l c th, nhng lnh c, sa, ghi (BSF, BCF, XORWF) vi thanh ghi TRISC nh l ni gi ti s c trnh. Ngi s dng nn cp ti vic phn chia kt ni cc thit b ngoi vi cho vic set chnh xc cc bit TRIS. d) Cng D v thanh ghi TRISD Cng D c 8 bit c b m u vo Schmitt Trigger. Mi chn c sp xp ring l nh u vo hoc u ra. Cng D cng c th c sp xp nh l mt cng vi x l 8 bit (cng ph song song) bng vic t bit iu khin PSPMODE(TRISE<4>) v trong ch ny vng m u vo l TTL. e) Cng E v thanh ghi TRISE Cng E c 3 chn l RE0/RD/AN5, RE1/WR/AN6, RE2/CS/AN7. Cc chn ny c th sp xp ring l l cc u vo hoc cc u ra, v cc chn c vng m u vo l cc mch Schmitt Trigger. Cng vo/ra E tr thnh u vo iu khin cho cng vi x l khi bit PSPMODE(TRISE<4>) c t. V trong ch ny phi chc chn rng cc bit TRISE<2:0> c t (cc chn c nh dng l cc u vo s), thanh ghi ADCON1 phi c nh dng cho vic s vo/ra v vng m u vo l TTL. Cc chn cng E cng c tch hp vi cc u vo tng t v trong trng hp ny cc chn s c l 0. Thanh ghi TRISE iu khin trc tip cc chn RE, ngay c khi chng c dng l cc u vo tng t. 3.3.5. Cc B Timer ca chip
B vi iu khin PIC16F87X c 3 b Timer l: Timer0, Timer1, Timer2 l b nh thi hoc b m c nhng u dim ni bt sau: + 8 bit cho timer hoc b m + C kh nng c v vit + C th dng ng h bn trong hoc bn ngoi + C th chn canh xung ca xung ng h + C h s chia cho xung u vo c th lp trnh li bng phn mm + Ngt trn a) Tc truyn Tc truyn c cung cp cho c hai ch l truyn thng ng b v d b thanh ghi SPBRG iu khin chu k chy 8 bit ca timer. Trong ch d b, bit BRGH ca thanh ghi TXSTA c dng iu khin tc , cn trong ch ng b n khng c s dng. b) Ch truyn thng khng ng b Trong ch ny d liu c nh dng nh sau: u tin l bit START, tip theo l 8 hoc 9 bit d liu, cui cng l bit STOP. Thng thng d liu c nh dng dng 8 bit. Vic truyn v nhn d liu c tin hnh vi nhng bit thp trc. Vic truyn v nhn c th tin hnh c lp nhau, khi s dng c th nh dng d liu v tc truyn. Vic truyn thng d b dng khi ch SLEEP. *Truyn d liu ch d b Quan trng nht trong vic truyn d liu l thanh ghi TSR. D liu ca n c th c vit v c thng qua b m l thanh ghi TXREG. Thanh ghi TSR khng c np gi tr cho ti khi bit STOP ca ln trc chuyn i. Khi bit STOP chuyn i n s np gi tr mi ti thanh ghi TSR t thanh ghi TXREG. Nu thanh ghi TXREG rng n s t c bit TXIF ca thanh ghi PIR1. Trong khi c bit TXIF cho bit trng thi ca thanh ghi TXREG, th bit TRMT cho bit trng thi ca thanh ghi TSR. Bit trng thi TRMT ch dng c, n c t khi thanh ghi TSR rng. Vic truyn d liu hot ng khi ta t bit TXEN ca thanh ghi TXSTA. Vic truyn d liu ch hot ng khi
d liu c np ti thanh ghi TXREG v tc truyn c sn sinh t xung ng h. Khi vic truyn d liu bt u ln u tin th thanh ghi TSR lc rng. Ngay lp tc d liu c truyn t thanh ghi TXREG ti thanh ghi TSR v sau thanh ghi TXREG rng, sau n li quay li nh trn. vic truyn 9 bit d liu th bit truyn TX9 ca thanh ghi TXSTA phi c t v bit th 9 truyn i c vit ti bit TX9D. Bit th 9 ny phi c vit trc, trc khi chuyn 8 bit d liu ti thanh ghi TXREG. Bi v d liu vit ti thanh ghi ngay lp tc c chuyn ti thanh ghi TSR. *Vic nhn d liu ch d b Trong ch d b, vic nhn d liu c kch hot bng vic t bit CREN ca thanh ghi RCSTA. Phn quan trng nht trong vic nhn d liu l thanh ghi RSR. Sau khi nhn xong bit STOP, n chuyn d liu t thanh ghi RSR ti thanh ghi RCREG nu thanh ghi ny trng. Nu vic truyn nhn hon thnh th c bit RCIF ca thanh ghi PIR1 s c t, c th ngt hot ng ca n bng vic t bit RCIE ca thanh ghi PIE1. C bit RCIF ch dng c, n c xa trong phn cng. N s c xo khi thanh ghi RCREG c c l trng. Thanh ghi ny l mt thanh ghi c b m i. N c kh nng nhn 2 byte d liu v truyn ti thanh ghi RCREG FIFO v khi byte th 3 i vo thanh ghi RSR. Nu pht hin bit STOP m thanh ghi RCREG vn y th bit bo li OERR s c t. Bit bo li ch c xo trong phn mm. Nu bit OERR c t th vic truyn d liu t thanh ghi RSR ti thanh ghi RCREG b ngn cm v khng c d liu c nhn. Cu trc ca bit bo li FERR c t khi bit STOP c pht hin c xo. Bit FERR v bit th 9 l cc b dm ging nh phng php b m. Trong khi ang c thanh ghi RCREG n s np gi tr mi cho bit RX9D v FERR. c) Truyn thng ng b ch ch Trong ch ny d liu c truyn nhn dui dng bn song cng (vic truyn v nhn d liu khng th tin hnh ng thi cng mt lc). Khi ang truyn d liu
th vic nhn d liu b ngn cm, vic chn ch truyn thng ng b c xc lp bng vic t bit SYNC ca thanh ghi TXSTA, ngoi ra bit SPEN cn c t nh dng cc chn RC6/TX/CKv RC7/RX/DT cho chn xung ng h v chn truyn d liu. Ch ch cn c xc lp bng vic t bit CSRC ca thanh ghi TXSTA. Vic nhn d liu trong ch truyn thng ng b ch tng t nh truyn thng d b, n phi c thanh ghi TSR. thanh ghi ny c v vit d liu thng qua b m l thanh ghi TXREG. Thanh ghi ny c np d liu trong phn mm. Thanh ghi TSR s khng c np gi tr cho ti tn khi truyn ht bit cui cng ca ln truc . Khi truyn ht bit cui cng, th thanh ghi TSR s np gi tr mi t thanh ghi TXREG. Thanh ghi TXREG rng th bit c ngt TXIF s c t. C ngt ny c th quy nh hot ng hoc khng hoajt ng bng vic t hoc xo bit TXIE ca thanh ghi PIE1. Trong khi c bit TXIF cho bit trng thi ca thanh ghi TXREG, th bit TRMT cho bit trng thi ca thanh ghi TSR. Bit trng thi TRMT ch dng c, n c t khi thanh ghi TSR rng. Vic truyn d liu hot ng bng vic t bit TXEN ca thanh ghi TXSTA, bit d liu u tin s c di chuyn trn xung i ln ca xung clock trn chn CLK. Vic truyn d liu c bt u bng thanh ghi TXREG v t bit TXEN. u dim y l tc thp c th c la chn. Tc truyn c gi nguyn trong khi RESET xo 3 bit TXEN, CREN, SREN. Vic truyn d liu c bt u ln u tin khi thanh ghi TSR rng, khi chuyn d liu ti thanh ghi TXREG n ngay lp tc chuyn ti thanh ghi TSR v kt qu l thanh ghi TXREG rng. Xo bit TXEN trong khi ang truyn d liu l l do vic truyn d liu b gin on v n phi dng li, v nu bit CREN hoc bit SREN c t trong khi ang truyn cng l nguyn nhn gy ra vic truyn d liu b gin an. Vi mc dch truyn 9 bit d liu th bit TX9 ca thanh ghi TXSTA phi c t v bit th 9 ny phi c vit ti bit TX9D. Bit th 9 ny phi c vit trc khi vit 8 bit d liu ti thanh ghi TXREG. Bi v d liu c vit ti thanh ghi TXREG ngay lp tc c chuyn ti thanh ghi TSR, nu thanh ghi ny rng. Nu thanh ghi TSR rng v thanh
ghi TXREG c vit trc khi vit gi tr mi ti bit TX9D, th hin ti n s np gi tr c trong bit TX9D. Vic nhn d liu ch ng b ch ch nhn d liu ch ng b ch c chn bng vic t bit SREN hoc bit CREN ca thanh ghi RCSTA. D liu c a chn RC/RX/DT trn cnh xung ca xung ng h. Nu bit SREN c t th ch c 1 t c nhn. nu bit CREN c t th vic nhn c tip din cho ti tn khi bit ny c xo mi thi. C hai bit ny u c t th bit CREN c u tin trc ri theo th t . Sau khi d liu c nhn vo trong thanh ghi RSR n s chuyn ti thanh ghi RCREG. Khi vic chuyn dch ny hon thnh th c bit RCIF ca thanh ghi PIR1 s c t. Hot ng ca c ny c th c hoc khng nh vic t hoc xo bit RCIE ca thanh ghi PIE1. RCREG l 1 thanh ghi c 2 b m l 2 thanh ghi. N c kh nng nhn 2 byte d liu chuyn ti thanh ghi RCREG FIFO v byte th ba bt u chuyn ti thanh ghi RSR. Trong khi ri bit cui cng ca byte th ba m thanh ghi RCREG vn y th bit bo li OERR s c t v t trong thanh ghi RSR s b li. Bit OERR c xa trong phn mm. Nu bit ny c t th vic chuyn d liu t thanh ghi RSR ti thanh ghi RCREG b ngn cm. Vic nhn bit th 9 cng tng t nh vic nhn bit d liu. Trong khi thanh ghi RCREG ang c n s np gi tr mi cho bit RX9D. l iu cn ch khi ngi s dng dng truyn thng chn bit d liu d) Truyn thng ng b ch ph Truyn thng ng b ch ph khc vi truyn thng ng b ch chnh trong trng hp xung ng h bn ngoi cung cp ti chn RC6/ TX / CK. N c th cho php thit b nhn hoc truyn d liu trong ch SLEEP. Ch ph c tin hnh bng vic xo bit CSRC ca thanh ghi TXSTA. *Truyn d liu trong ch truyn thng ph Hot ng ca ch truyn thng ng b chnh v truyn thng ng b ph hon ton ging nhau, ch khc l ch truyn thng ph c th hot ng ch
SLEEP. Nu hai t c vit ti thanh ghi TXREG v lnh SLEEP c tin hnh th n s tn ti nhng im sau : + T u truyn ti thanh ghi TSR v n chuyn i ngay lp tc. + T th hai c cha trong thanh ghi TXREG. + C bit TXIF s khng c t. + Khi t u tin c chuyn ra khi thanh ghi TSR. Thanh ghi TXREG s chuyn t th hai vo thanh ghi TSR v by gi c bit TXIF s c t. + Nu bit TXIE c t ngt s c gi t SLEEP v ngt tnh ton cu ca ngt s c gi. *Nhn d liu ch truyn thng ng b ph Hot ng ca ch truyn thng ng b ch ph v truyn thng ng b ch chnh hon ton ging nhau, nhng ch ph n c th hot ng lnh SLEEP. Bit SREN khng c s dng ch ny. Nu vic nhn d liu c hot ng bng vic t bit CREN trc khi lnh SLEEP c thc hin. T c nhn trong khi SLEEP, khi vic nhn d liu hon thnh, th thanh ghi RSR s chuyn d liu ti thanh ghi RCREG v nu bit RCIE c t, th ngt c th gi t lnh SLEEP. 3.3.6. B chuyn i tng t sang s B chuyn i tng t sang s c 8 knh i vi PIC16F877. Tn hiu tng t c np vo b np in v gi in dung. Tn hiu ra in hnh v gi in dung duy tr l u vo b chuyn i. B chuyn i A/D pht ra kt qu s 10 bit. B chuyn i A/D c s chuyn in th cao v thp u vo c la chn trong phn mm c s kt hp ca VDD, VSS, RA2, RA3. B chuyn i A/D c c trng duy nht c th hot ng trong khi thit b l trong trng thi SLEEP. hot ng trong phng thc ny A/D phi c ly t ngun ng h bn trong mch dao ng RC. B chuyn i A/D c 4 thanh ghi. l nhng thanh ghi: - A/D thanh ghi kt qu cao(ADRESH)
- A/D thanh ghi kt qu thp(ADRESL) - Thanh ghi iu khin chuyn i A/D ( ADCON0) - Thanh ghi iu khin chuyn i A/D ( ADCON1) Tc chuyn i l c nh nh l TAD. Quy nh thi gian chuyn i A/D nh nht 12TAD cho 10 bit chuyn i. Ngun ca thi gian chuyn i la chn trong phn mm. 3.3.7. Cc ngt ca PIC16F877 PIC16F877 c 14 ngun ngt, thanh ghi INTCON l thanh ghi iu khin cc ngt, mi ngt c mt bit c ngt v mt bit cho php hoc cm ngt. Bit GIE(INTCON<7>) iu khin chung cho 14 ngt. Khi bit ny set th cc ngt mi c tc dng, khi bit GIE xo th tt c cc ngt b cm. Bit GIE b xo khi reset. Khi bit c ngt thit lp bit GIE thit lp v bit PEIE thit lp vi ngt ngoi vi ng thi bit cho php ngt ca ngt cho php th ngt xy ra. Khi mt ngt xy ra b m chng trnh PC c np gi tr 0004h v bit GIE b xo cm s chng ngt, khi ch lnh RETFIE thc hin tr li a ch cho PC ni xy ra ngt, ng thi thit lp li bit GIE. Khi xy ra ngt PC lun c np gi tr 0004h v cc ngt c phn bit bi bit c ngt ca ngt . Ngt ngoi t chn RB0/INT, v ngt t s thay i trng thi cc chn RB4:RB7 c th nh thc b x l t ch SLEEP. Cc thanh ghi PIE1, PIR1, PIE2, PIR2 iu khin cc ngt ngoi vi. 3.4. Cc vi mch ph tr khc 3.4.1. Mn hnh LCD 16 k t, 2 dng
Hnh 3.10. Mn hnh LCD
Bng 3.1. Thng s k thut ca LCD
Hnh 3.11. S khi chc nng LCD 3.4.2. Vi mch chuyn i mc MAX232 Vi mch ph bin c s dng cho mc ch chuyn i mc TTL/CMOS sang RS-232 l vi mch MAX232 ca hng Maxim.
Bng 3.2. Thng s k thut phn pht ca MAX232
Bng 3.3. Thng s k thut phn thu ca MAX232
Hnh 3.12. S mch p dng in hnh ca MAX232 3.4.3. Vi mch n p 3V3 LD1117S33 Vi mch n p ny dng cp in +3.3V cho ring vi mch ENC28J60
Hnh 3.13. S mch p dng in hnh ca LD1117S33

3.4.4. Bin p mng Bin p mng dng cch ly v mt in 1 chiu gia thit b vi cc mng bn ngoi, trong ti s dng loi bin p c km jc RJ-45.
Hnh 3.14. S chn ca bin p mng 3.4.5. Cc linh kin khc Cc linh kin ph tr khc c a vo thit k: - Vi mch o nhit LM335 - Vi mch RTC DS1307 - PIN, thch anh, .. 3.5. S nguyn l ca h thng
Hnh 3.15. S nguyn l ca h thng 3.6. V mch in trn s nguyn l tin cho vic th nghim, n gin ha m khng lm mt i tnh tng qut ca s khi a ra phn trn, thit k thc t c 1 s thay i cho ph hp hn, l: - Cc c cu chp hnh (rle, n bo, ..) c thay bng n LED. - Mt s cng khng s dng c a ra ngoi bng jc cm dng cho mc ch m rng hay cc th nghim khc. - Tn hiu analog vo c l vi mch o nhit LM335 - Phn ngun DC5V dng trc tip qua cng USB ca PC (hay ngun ngoi +5VDC c n p), trn mch ch cn n p +3.3VDC. - Thm vi mch DS1307 lm nhim v to ng h thi gian thc cho h thng, dng cho mc ch ghi li thi gian ca nhng s c, ca ngi cu hnh, .. S nguyn l c thit k trn c s cc mch kt ni in hnh c trnh by phn trn. Phn mm thit k mch v v s nguyn l c th dng bt k chng trnh no ang c trn th trng nh ORCAD, PROTEL. Tuy nhin, do thi quen s dng, ti chn phn mm ORCAD cho vic thit k mch in v s , v v mch kh phc tp, nn phi v bng 2 lp.
CHNG 4 LP TRNH CHO H THNG

4.1. Phn mm lp trnh v bin dch 4.1.1. Tng quan v CCS S ra i ca mt loi vi iu khin i km vi vic pht trin phn mm ng dng cho vic lp trnh cho con vi iu khin . Vi iu khin ch hiu v lm vic vi hai con s 0 v 1. Ban u vic lp trnh cho vi iu khin l lm vic vi dy cc con s 0 v 1. Sau ny khi kin trc ca Vi iu khin ngy cng phc tp, s lung thanh ghi lnh nhiu ln, vic lp trnh vi dy cc s 0 v 1 khng cn ph hp na, i hi ra i mt ngn ng mi thay th. V ngn ng lp trnh Assembly. y ta khng ni nhiu n Assmebly. Sau ny khi ngn ng C ra i, nhu cu dng ngn ng C thay cho ASM trong vic m t cc lnh lp trnh cho Vi iu khin mt cch ngn gn v d hiu hn dn n s ra i ca nhiu chng trnh son tho v bin dch C cho Vi iu khin : Keil C, HT-PIC, MikroC, CCS Ti chn CCS cho bi ti ny v CCS l mt cng c lp trnh C mnh cho Vi iu khin PIC. Nhng u v nhc im ca CCS s c cp n trong cc phn di y. 4.1.2. Gii thiu v CCS CCS l trnh bin dch lp trnh ngn ng C cho Vi iu khin PIC ca hng Microchip. Chng trnh l s tch hp ca 3 trnh bin dich ring bit cho 3 dng PIC khc nhau l: - PCB cho dng PIC 12-bit opcodes - PCM cho dng PIC 14-bit opcodes - PCH cho dng PIC 16 v 18-bit
Tt c 3 trnh bin dch ny uc tch hp li vo trong mt chng trnh bao gm c trnh son tho v bin dch l CCS, phin bn mi nht l PCWH Compiler Ver 3.227. Ging nh nhiu trnh bin dch C khc cho PIC, CCS gip cho ngi s dng nm bt nhanh c vi iu khin PIC v s dng PIC trong cc d n. Cc chng trnh iu khin s c thc hin nhanh chng v t hiu qu cao thng qua vic s dng ngn ng lp trnh cp cao Ngn ng C. Ti liu hng dn s dng c rt nhiu, nhng chi tit nht chnh l bn Help i km theo phn mm (ti liu Ting Anh). Trong bn tr gip nh sn xut m t rt nhiu v hng, bin, ch th tin xa l, cu trc cc cu lnh trong chng trnh, cc hm to sn cho ngi s dng 4.1.3. To PROJECT u tin trong CCS to mt Project trong CCS c nhiu cch, c th dng Project Wizard, Manual Creat, hay n gin l to mt Files mi v thm vo cc khai bo ban u cn thit v bt buc. Di y s trnh by cch to mt project hp l theo c 3 phng php. Mt iu ta cn ch khi to mt Project l: khi to bt c mt Project no mi th ta nn to mt th mc mi vi tn lin quan n Project ta nh lm, ri lu cc files vo . Khi lp trnh v bin dch, CCS s to ra rt nhiu files khc nhau, do nu chung cc Project trong mt th mc s rt mt thi gian trong vic tm kim sau ny. y cng l quy tc chung khi ta lm vic vi bt k phn mm no, thit k mch hay lptrnh. To mt PROJECT s dng PIC Wizard Trc ht bn khi ng chng trnh lm vic PIC C Compiler. T giao din chng trnh di chut chn Project -> New -> PIC Wizad. Sau khi nhn chut, mt ca s hin ra yu cu ban nhp tn Files cn to. Bn to mt th mc mi, vo th mc v lu tn files cn to ti y.
Hnh 4.1. To file mi trong PCW compiler Nh vy l xong bc u tin. Sau khi nhn nt Save, mt ca s New Project hin ra. Trong ca s ny bao gm rt nhiu Tab, mi Tab m t v mt vi tnh nng ca con PIC. Ta s chn tnh nng s dng ti cc Tab tng ng.
Hnh 4.2. Lu file vo th mc c sn Di y s trnh by ngha tang mc chn trong mi Tab. Cc mc chn ny chnh l cp n cc tnh nng ca mt con PIC, ty theo tng loi m s c cc Tab tng ng. i vi tng d n khc nhau, khi ta cn s dng tnh nng no ca con PIC th ta s chn mc . Tng cng c 13 Tab ta la chn. Sau y xin gii thiu nhng Tab chnh thng hay c s dng. 4.1.3.1. Tab General Tab General cho php ta la chn loi PIC m ta s dng v mt s la chn khc nh chn tn s thch anh dao ng, thit lp cc bit CONFIG nhm thit lp ch hot ng cho PIC.
Hnh 4.3. Tab General - Device: Lit k danh sch cc loi PIC 12F, 16F, 18F Ta s chn tn Vi iu khin PIC m ta s dng trong d n. Ly v d chn PIC16F877A - Oscilator Frequency: Tn s thch anh ta s dng, chn 20 MHz (ty tng loi) - Fuses: Thit lp cc bit Config nh: Ch dao ng (HS, RC, Internal ), ch bo v Code, Brownout detected - Chn kiu con tr RAM l 16-bit hay 8-bit 4.1.3.2. Tab Communications Tab Communications lit k cc giao tip ni tip m mt con PIC h tr, thng l RS232 v I2C, cng vi cc la chn thit lp ch hot ng cho tng loi giao tip. - Giao tip RS232: Mi mt Vi iu khin PIC h tr mt cng truyn thng RS232 chun. Tab ny cho php ta la chn chn Rx, Tx, tc Baud, Data bit, Bit Parity - Giao tip I2C: s dng I2C ta tch vo nt chn Use I2C, khi ta c cc la chn: Chn SDA, SCL, Tc truyn (Fast - Slow), ch Master hay Slave, a ch cho Salve.
Hnh 4.4. Tab Communications 4.1.3.3. Tab SPI and LCD Tab ny lit k cho ngi dng cc la chn i vi giao tip ni tip SPI, chun giao tip tc cao m PIC h tr v phn cng. Ch khi ta dng I2C th khng th dng SPI v ngc li. c th s dng c hai giao tip ny cng mt lc th buc mt trong 2 giao tip phi lp trnh bng phn mm (ging nh khi dng I2C cho cc chip AT8051, khng c h tr phn cng SSP).
Hnh 4.5. Tab SPI and LCD
4.1.3.4. Tab Timer Lit k cc b m/nh thi m cc con PIC dng Mid-range c: Timer0, timer1, timer2, WDT Trong cc la chn cu hnh cho cc b m /nh thi c: chn ngun xung ng h (trong/ngoi), khong thi gian xy ra trn
Hnh 4.6. Tab Timer
4.1.3.5. Tab Analog Lit k cc la chn cho b chuyn i tng t/s (ADC)ca PIC. Ty vo tng IC c th m c cc la chn khc nhau, bao gm: - La chn cng vo tng t - Chn chn in p ly mu (Vref) - Chn phn gii: 8-bit = 0 ~ 255 hay 10-bit = 0~1023 - Ngun xung ng h cho b ADC (trong hay ngoi), t m ta c c tc ly mu, thng ta chn l internal 2-6 us. - Khi khng s dng b ADC ta chn none
Hnh 4.7. Tab Analog
4.1.3.6. Tab Other Tab ny cho php ta thit lp cc thng s cho cc b Capture/Comparator/PWM. Capture - Bt gi - Chn bt gi xung theo sn dng (rising edge) hay sn m (falling edge) ca xung vo. - Chn bt gi sau 1, 4 hay 16 xung (copy gi tr ca TimerX vo thanh ghi lu tr CCCPx sau 1, 4 hay 16 xung). Compare - So snh Ta c cc la chn thc hin lnh khi xay ra bng nhau gia 2 i tng so snh l gi tr ca Timer1 vi gi tr lu trong thanh ghi so snh. Bao gm: - Thc hin ngt v thit lp mc 0 - Thc hin ngt v thit lp mc 1 - Thc hin ngt nhng khng thay i trng thi ca chn PIC. - a Timer1 v 0 nhng khng thay i trng thi chn. PWM - iu ch rng xung
- La chn v tn s xung ra v duty cycle. Ta c th la chn sn hay t chn tn s, tt nhin tn s ra phi nm trong mt khong nht nh. Comparator - So snh in p - La chn mc in p so snh Vref. C rt nhiu mc in p ta la chn. Ngoi ra ta cn c th la chn cho u vo ca cc b so snh.
Hnh 4.8. Tab Other
4.1.3.7. Tab Interrupts v Tab Driver Tab Interrupts cho php ta la chn ngun ngt m ta mun s dng. Ty vo tng loi PIC m s lng ngun ngt khc nhau, bao gm: ngt ngoi 0(INT0), ngt RS232, ngt Timer, ngt I2C-SPI, ngt onchange PORTB.v.v Tab Drivers c dng la chn nhng ngoi vi m trnh dch h tr cc hm giao tip. y l nhng ngoi vi m ta s kt ni vi PIC, trong cc IC m CCS h tr, ng ch l cc loi EEPROM nh 2404, 2416, 2432, 9346, 9356Ngoi ra cn c IC RAM PCF8570, IC thi gian thc DS1302, Keypad 3x4, LCD, ADC Chi tit ta c th xem trong th mc Driver ca chng trnh: \...\PICC\Drivers.
Hnh 4.9. Tab Interrupts Sau cc bc chn trn, ta nhn OK kt thc qu trnh to mt Project trong CCS, mt Files ten_project.c c to ra, cha nhng khai bo cn thit cho PIC trong mt Files ten_project. h. 4.2. Lu thut ton v chng trnh 4.2.1. M hnh iu khin ca h thng iu khin v gim st t xa cho vic xem xt lu thut ton c sng sa v gip cho vic lp trnh d dng hn, m hnh iu khin v gim st s c a ra. Trong m hnh, b iu khin v gim st c t trong mt mng LAN (v coi nh mt phn t trong mng), trong mng gm 1 SWITCH, 1 DHCP Server v bao gm nhiu my trm (cc my PC) c ci chng trnh duyt WEB, cc phn mm duyt web ph bin l IE (Internet Explorer), FireFox, .. B iu khin v gim st t xa s c nhit t sensor nhit LM335, c trng thi cc phm bm, iu khin cc n LED (tng ng vi cc c cu chp hnh), hin th thng ip ngn ln mn hnh LCD. B iu khin ny ng vai tr nh mt Mini Web Server, tt c cc my trong mng c yu cu Web n a ch IP ca b iu khin u c tr v di dng 1 trang WEB. Nh vy, tt c cc my trong mng, d bt k u cng u nhn c thng tin v iu khin c nh mt trnh duyt web sn c.
Hnh 4.10. M hnh h thng iu khin v gim st t xa thng qua mng LAN 4.2.2. Lu thut ton
Hnh 4.11. Lu thut ton ca h thng 4.2.3. Chng trnh cho vi x l - Chng trnh c vit bi phn mm bin dch CCS.
- Mt s th vin, hm phc v cho vic lp trnh c ly t trang WEB chnh thc ca hng sn xut phn cng MicroChip v hng CCS. - Chng trnh c s dng 1 s m ngun ly t Internet - Chng trnh c lc b phn cu hnh vi mch PIC, cc hm, th tc vic theo di c d hiu. xem ton b chng trnh, xin hy tham kho bn soft copy trn a CD km theo. - Chng trnh sau khi bin dch c np vo vi x l bng thit b np IC hoc c th np qua cng RS-232 nu c ci BootLoader.
#include "tcpip/stacktsk.c" //include Microchip's TCP/IP stack #include "ccshelper.c" //include CCS's PICDEM.net/PICNET helper functions #include "ccshelperui.c" /////***** WEB PAGES STORED INTO PROGRAM MEMORY *****///// //The following escape characters are used: // %0 - AN0 // %1 - AN1 // %2 - BUTTON0 // %3 - BUTTON1 // %4 - Current LCD Message // %5 - CHECKED if LED1 is ON // %6 - CHECKED if LED1 is OFF // %7 - CHECKED if LED2 is ON // %8 - CHECKED if LED2 is OFF // %9 - Temperature (EWL ONLY) // %F - Message stack //here is this examples / page const char HTML_INDEX_PAGE[]= "<html><body bgcolor=#FFFFFF text=#000000> <br/> <h1>CCS HTTP/CGI EXAMPLE</h1> <h1>leethanhnc_nhim</h1> <p><b><i>%F</i></b></p>
<form method=post> <table border=0> <tr><th>LCD:</th><td colspan=4><input type=\"text\" name=\"lcd\" size=20 maxlength=16 value=\"%4\"></td></tr> <tr><th>LED1:</th><td><input type=\"radio\" name=\"led1\" value=1 %5></td><td>ON</td> <td><input type=\"radio\" name=\"led1\" value=0 %6></td><td>OFF</td></tr> <tr><th>LED2:</th><td><input type=\"radio\" name=\"led2\" value=1 %7></td><td>ON</td> <td><input type=\"radio\" name=\"led2\" value=0 %8></td><td>OFF</td></tr> </table> <input type=\"hidden\" name=\"msgStack\" value=\"LCD/LEDs changed!\"> <br/><input type=\"submit\"></form> <p><a href=\"/analog\">Analog Readings</a></p> </body></html>"; //<img src=\"http://www.ccsinfo.com/images/CCSlogotiny.gif\"> const char HTML_ANALOG_PAGE[]= "<html><body bgcolor=#ffffff text=#000000> <h1>leethanhnc_nhim</h1> <h1>PICNET ADC READINGS</h1> <p>%0</p> <br/>%1 <p>%2</p> <br/>%3 <p>%9</p> <p><a href=\"/\">Change LCD/LEDs</a></p> </body></html>"; /////***** END OF WEB PAGES STORED INTO PROGRAM MEMORY *****///// char g_HTTPMessageStack[20]=""; char g_HTTPLCDMessage[20]="CCS Webserver";
//this is a callback function to the HTTP stack. see http.c //this demo provides to web "pages", an index (/) and an about page (/about) int32 http_get_page(char *file_str) { int32 file_loc=0; static char index[]="/"; static char about[]="/analog"; if (stricmp(file_str,index)==0) file_loc=label_address(HTML_INDEX_PAGE); else if (stricmp(file_str,about)==0) file_loc=label_address(HTML_ANALOG_PAGE); return(file_loc); } //this isn't a required callback, this is an application function being //used by http_format_char. int http_format_char_checked(int8 flag, char *str) { int len=0; if (flag) { sprintf(str,"checked=\"checked\""); len = 7; } return(len); } //this is a callback function to the HTTP stack. see http.c //The following escape characters are used: // %0 - AN0 // %1 - AN1 // %2 - BUTTON0 // %3 - BUTTON1
// %4 - Current LCD Message // %5 - CHECKED if LED1 is ON // %6 - CHECKED if LED1 is OFF // %7 - CHECKED if LED2 is ON // %8 - CHECKED if LED2 is OFF // %F - Message stack int8 http_format_char(int32 file, char id, char *str, int8 max_ret) { char new_str[25]; int8 len=0; int8 i; switch(id) { #if defined(ADC_CHAN_0) case '0': set_adc_channel(ADC_CHAN_0); delay_us(100); i=read_adc(); sprintf(new_str,"<B>AN%U = </B>0x%X",ADC_CHAN_0,i); len=strlen(new_str); break; #endif #if defined(ADC_CHAN_1) case '1': set_adc_channel(ADC_CHAN_1); delay_us(100); i=read_adc(); sprintf(new_str,"<B>AN%U = </B>0x%X",ADC_CHAN_1,i); len=strlen(new_str); break; #endif #if defined(USER_BUTTON1) case '2': sprintf(new_str,"<B>BTN1 = </B>");
if (!BUTTON_PRESSED(USER_BUTTON1)) sprintf(&new_str[14], "UP"); else sprintf(&new_str[14], "DOWN"); len=strlen(new_str); break; #endif #if defined(USER_BUTTON2) case '3': sprintf(new_str,"<B>BTN2 = </B>"); if (!BUTTON_PRESSED(USER_BUTTON2)) sprintf(&new_str[14], "UP"); else sprintf(&new_str[14], "DOWN"); len=strlen(new_str); break; #endif case '4': strncpy(new_str, g_HTTPLCDMessage, sizeof(new_str)); new_str[sizeof(new_str)-1] = 0; len = strlen(new_str); break; case '5': len = http_format_char_checked(g_LEDState[0], new_str); break; case '6': len = http_format_char_checked(!g_LEDState[0], new_str); break; case '7': len = http_format_char_checked(g_LEDState[1], new_str); break; case '8': len = http_format_char_checked(!g_LEDState[1], new_str);
break; #if STACK_USE_TEMP case '9': sprintf(new_str, "Temp: %6.2w&ordm F", read_full_temp()); len=strlen(new_str); new_str[len]=0; break; #endif case 'F': strncpy(new_str, g_HTTPMessageStack, sizeof(new_str)); new_str[sizeof(new_str)-1] = 0; len = strlen(new_str); g_HTTPMessageStack[0] = 0; break; } if (len){ strncpy(str, new_str, max_ret); }else *str=0; return(len); } //this is a callback function to the HTTP stack. see http.c //in this example it verifies that "pwd" is "master", if it is //then it sets led1 and led2 ("led1" and "led2") based on their value //and changes the lcd screen ("lcd"). void http_exec_cgi(int32 file, char *key, char *val) { static char led1_key[]="led1"; static char led2_key[]="led2"; static char lcd_key[]="lcd"; static char msgStack_key[]="msgStack"; int8 v; // #if defined(USER_LED1)
if (stricmp(key,led1_key)==0) { v=atoi(val); g_LEDState[0]=v; } // #endif // #if defined(USER_LED2) if (stricmp(key,led2_key)==0) { v=atoi(val); g_LEDState[1]=v; } // #endif if (stricmp(key, msgStack_key)==0) { strncpy(g_HTTPMessageStack, val, sizeof(g_HTTPMessageStack)); g_HTTPMessageStack[sizeof(g_HTTPMessageStack)-1] = 0; } if (stricmp(key,lcd_key)==0) { strncpy(g_HTTPLCDMessage, val, sizeof(g_HTTPLCDMessage)); g_HTTPLCDMessage[sizeof(g_HTTPLCDMessage)-1] = 0; #if STACK_USE_PICDEM_LCD printf(lcd_putc,"\f%s",val); #endif } } void splash(void) { #IF STACK_USE_PICDEM_LCD printf(lcd_putc,"\fCCS Webserver"); #ENDIF #if STACK_USE_ANNOUNCE InitAnnounce(" - EX_ST_WEBSERVER"); #endif #if STACK_USE_SERIAL
fprintf(USER,"\r\n\r\nCCS ex_st_webserver\r\n"); ui_settings(); ui_menu(); #endif } void main(void) { fprintf(USER,"Init..."); init(); // ccshelpers.c printf(lcd_putc,"\nAll Init OK "); fprintf(USER,"\nInit OK"); delay_ms(1000); splash(); while (TRUE) { restart_wdt(); #if STACK_USE_SERIAL if (kbhit(USER)) { ui_handle(); } #endif //every second: refresh current IP, blink LED if (second_counter>=1) { display_ip_lcd(); #if defined(USER_LED3) output_toggle(USER_LED3); #endif second_counter=0; } //just something to test the buttons #if STACK_USE_CCS_PICNET if (BUTTON_PRESSED(USER_BUTTON1)) { output_low(USER_LED1);
} else { if (g_LEDState[0]) output_low(USER_LED1); else { output_high(USER_LED1); } } if (BUTTON_PRESSED(USER_BUTTON2)) { output_low(USER_LED2); } else { if (g_LEDState[1]) output_low(USER_LED2); else { output_high(USER_LED2); } } #elif STACK_USE_CCS_PICENS if (g_LEDState[0]) output_high(USER_LED1); else { output_low(USER_LED1); } if (g_LEDState[1]) output_high(USER_LED2); else
{ output_low(USER_LED2); } if (BUTTON_PRESSED(USER_BUTTON1)) output_low(USER_LED3); #endif #if STACK_USE_PPP if (ppp_is_connected()) { #endif StackTask(); //Microchip's TCP/IP stack handler. Must be called routinely. #if STACK_USE_PPP } #endif } }
KT LUN V KIN NGH

1.Kt lun. Kt qu t c sau qu trnh nghin cu v thit k: - Ngi thit k tm hiu su thm v cc lnh vc nh k thut in t, k thut my tnh, v c bit l k thut vi x l, k thut mng v k thut lp trnh. - ti l nn mng cho s pht trin cc ng dng trong mng LAN, trn mi trng Internet. - C th ng dng cho nhiu mc ch khc nh thit b cnh bo, gim st trong mng ni b, mng internet, .. 2. Kin ngh. Cc kin ngh v hng pht trin: - y l mt ti lin quan n nhiu lnh vc khc nhau, i hi ngi thit k phi c nhiu kinh nghim v thi gian, do rt mong rng vi cc ti tng t hoc c quy m ln hn, nh trng s b tr mt nhm hc vin cng thc hin chung kt qu c tt hn. - Sau khi nhn nhn li, vi m hnh ti ny khi a vo s dng trong thc t mng Internet, s gp phi nhng kh khn trong vic xy h thng bo mt, chng ph hoi v thm nhp tri php, v h thng ny kh t tin v i hi phn software ti server kh phc tp. - Hng pht trin ca ti c tnh n v th hin thng qua hnh v ca h thng tng lai chy trong mi trng Internet. c c sn phm dng thc t, mc u t ti thiu khong 5,000 USD cng vi s lm vic nhit tnh ca nhm 4 ngi.
PH LC

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I HC THI NGUYN

TRNG I HC K THUT CNG NGHIP

LUN VN THC S K THUT

LUN VN THC S K THUT

Ngi hng dn khoa hc

PGS-TS Xun Tin

Thi Nguyn- 2009

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

CHNG 1 KHT QUT CHUNG V VI IU KHIN

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

+ B gii m s thc hin cc bc cn thit thc thi lnh.

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

CHNG 2 TNG QUAN V TCP/IP

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 2.4. Qu trnh ng/m gi d liu trong TCP/IP

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 2.6. Cu trc mng hnh sao

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Hnh 2.7. Cu trc mng hnh tuyn

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S ha bi Trung tm Hc liu i hc Thi Nguyn

CHNG 3 KIN TRC CA H THNG

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 3.4. Qu trnh c thanh ghi iu khin Ethernet

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 3.5. Qu trnh c thanh ghi iu khin MAC

Hnh 3.6. Qu trnh ghi vo thanh ghi lnh

Hnh 3.7. Qu trnh ghi vo b m lnh

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 3.10. Mn hnh LCD

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Bng 3.1. Thng s k thut ca LCD

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Bng 3.2. Thng s k thut phn pht ca MAX232

Bng 3.3. Thng s k thut phn thu ca MAX232

S ha bi Trung tm Hc liu i hc Thi Nguyn

Hnh 3.13. S mch p dng in hnh ca LD1117S33

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S ha bi Trung tm Hc liu i hc Thi Nguyn

S ha bi Trung tm Hc liu i hc Thi Nguyn

CHNG 4 LP TRNH CHO H THNG