Wong & Lok: Theory of Digital Communications

3. Synchronization

Chapter 3 Synchronization
Information about the communication channel, such as the channel phase response, is necessary for the construction of the various receivers discussed in Chapter 2. In many practical situations, this information is not known a priori and the relevant channel parameters have to be estimated from the received signal. The three main channel parameters required by most receivers are the carrier frequency, the carrier phase1 , and the symbol timing of the received signal. The carrier frequency of the received signal may be different from that of the nominal value of the transmitter carrier frequency. This discrepancy can be the results of the deviation of the transmitter oscillator from the nominal frequency and, more importantly, the Doppler effect when the transmitter is in motion relative to the receiver. In reality, it takes a nite amount of time for the information-bearing electromagnetic wave to travel from the transmitter to the receiver. This transmission delay introduces a mismatch between the symbol timing at the transmitter and that at the receiver. Recall that we need to sample the output of the matched lter at an exact time2 to optimize the error performance. We need to know the symbol timing at the receiver (or equivalently, the transmission delay) in order to eliminate the performance degradation due to the timing mismatch. The carrier phase of the received signal is the sum of three major components, namely, the random phase of the transmitter oscillator, the channel phase response, and the phase due to the transmission delay. In order to model all the three channel defects, we need to augment the simple non-dispersive channel model we employ in the previous chapters. The received
1 2

Carrier phase information is not needed if noncoherent demodulation is employed Equivalently, we need to know the exact integration interval for the correlator implementation.

3.1

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signal in the augmented model3 is given by

where

and

(3.1)

is the baseband signal and the new parameter

are employed to model the de-

viation of the received carrier frequency from the nominal carrier frequency and the transmission delay, respectively. Very often, we can combine the phase terms in (3.1) to a single phase term

modeling the received carrier phase.

The process of estimating these parameter is called synchronization. As an brief introduction to the subject, we focus on the estimation of the carrier phase and the transmission delay while neglecting the carrier frequency mismatch (to be justify in a short while). The process of estimating the carrier phase is known as carrier phase synchronization, which, we will show, can be accomplished by a phaselocked loop (PLL) circuit. The process of estimating the transmission delay is known as symbol timing synchronization, which, we will show, can be accomplished by a delay-locked loop (DLL) circuit. It turns out that the same PLL circuit used for carrier synchronization can also be employed to track the carrier frequency mismatch when it is signicant.

3.1 Effect of Synchronization Errors

First, we investigate the effect of errors in the estimation of the three parameters on the performance of a typical communication system. For simplicity, let us consider a BPSK system in which the received signal is given by

(3.2)

where

is an AWGN process with noise spectral density . By some synchronization process,

, , and of the parameters , , and , respectively. Therefore, we form the

we obtain estimates

correlator demodulator based on these estimated parameters as shown in Figure 3.1. It is straightfor3

Here, we assume that only the in-phase channel is used for simplicity. If the quadrature channel is also employed, we

can either add the corresponding term to (3.1) or use the complex baseband representation.

3.2

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T +^

3. Synchronization

+Ap T (t- ) cos [2 (fc+fd)t + ] + n(t) cos [2 (fc+fd)t + ]

^ ^

dt

? > <

Figure 3.1: Correlator receiver for BPSK with estimated parameters ward to show that when

, the average bit error probability of error (assuming the bit values

0 and 1 are sent with equal probabilities) given by

where

(3.3)

We note that

with equality only if

, , and

(3.4)

(modulo

). Hence, errors in the

estimation of any of the parameters will cause the error probability go higher than the optimal value

.
, then

From the result above, we see that if estimation error in

, i.e., the data rate is much higher than the

where

and

(3.5)

. Therefore, errors in estimating both the transmission delay and

the carrier phase cause signicant bit error performance degradation.

3.2 Carrier Phase Synchronization

For simplicity, we assume that

and

and focus on the estimation of the carrier phase

We start by developing the maximum likelihood estimator of

under the non-dispersive channel model

and the assumption that the transmitted signal is known to the receiver (i.e., the transmitted signal is not data-modulated). Then we discuss several common phase-locked mechanisms which are practical approximations to the ML phase estimator under different situations.

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3.2.1 Maximum likelihood carrier phase estimation

Under the assumption that

and

, the channel model in (3.1) reduces to

(3.6)

where

is AWGN with spectral density and is the known transmitted signal. Our goal is
of the carrier phase based on the maximum likelihood principle used in the

to obtain an estimator

previous chapter. This means that we need to specify and evaluate the likelihood function. To do so, we employ the vector space representation in Session 2.5.1. First, we note that the signal space in this case is two dimensional and is spanned by

(3.7) (3.8)

We can complete the basis by adding the orthonormal signals

. Based on an argument similar

to those in Sections 2.5.3 and 2.5.4, we can show that the rst two elements of the vector representing

(3.9) (3.10)

form a sufcient statistic for the estimation of the phase . From (3.6), we see that

where and are iid zero-mean Gaussian random variable with variance hood function is given by

(3.11)

(3.12)

. Hence, the likeli

(3.13)

As before, the ML estimator of the log-likelihood function, i.e.,

is the one that maximizes the likelihood function or, equivalently,

3.4

(3.14)

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3. Synchronization

dt X r(t)

v(t) cos ( 2

fc t )

arctan(Y/X)

ML

Y dt

- v(t) sin ( 2 fc t )
Figure 3.2: ML phase estimation circuit This reduces to

(3.15)

Thus, the ML phase estimator can be implemented by the circuit shown in Figure 3.2. An additional (more popular) way to implement the ML phase estimator can be obtained by differentiating the metric

with respect to

and setting the derivative to zero. By doing so, we can show that

the ML estimator has to satify

(3.16)

We can construct the feedback loop structure as shown in Figure 3.3 to solve for (3.16) above. Phase estimation circuits based on the structure in Figure 3.3 are generally known as phase-locked loops.

3.5

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r(t)

dt

^ - v(t) sin ( 2 fc t + )

^ If > 0, increase ^ If < 0, decrease

Figure 3.3: ML phase estimation loop

3.2.2 Phase-locked loops

The ML phase estimation circuit based on the feedback loop structure in Figure 3.3 has several advantages over the non-feedback structure in Figure 3.2. First, due to its feedback structure, the phaselocked loop (PLL) structure can track variations in the channel phase. We will see later that this is true (with a slight modication to the loop) even when the received signal is data-modulated. Hence, the PLL can be employed to track the channel phase response throughout the whole duration of communication, while the non-feedback ML phase estimation circuit in Figure 3.2 can only operate during the initial training phase. Second, in practice the phase-control device in Figure 3.3 is implemented by a voltage-controlled oscillator (VCO). With the VCO, the PLL also can be employed to track the carrier frequency of the received signal. Phase-locked loop for unmodulated carrier A typical practical implementation of the PLL structure in 3.3 is shown in Figure 3.4. For simplicity, we assume that

is a constant signal, which approximates the case where a training signal with a
contains only the carrier. With this assumption, the operation of the PLL
3.6

very long duration is employed to perform the phase synchronization, and that the AWGN is absent. The received signal

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3. Synchronization

phase detector
e(t) r(t)

LPF

loop filter

e(t)

x(t)
Figure 3.4: Practical phase-locked loop circuit can be described as follows:

VCO

The carrier to be locked is

The reference signal is

(3.17)

(3.18)

In the simplest case, the phase detector is just a multiplier followed by a low-passed lter (to remove the double frequency term). Therefore the output of the phase detector is the error signal

(3.19)

where is the constant gain of the lter over its passband. The loop lter is employed to limit the variance of the noise in the error signal. Hence its bandwidth determines the performance of the PLL when noise is present. The smaller the bandwidth of the loop lter, the smaller is the variance of the noise in the error signal. On the other hand, the tracking ability of the PLL is also determined by the loop lter bandwidth. A larger bandwidth enables the PLL to track rapidly changing channel phase. Therefore, the bandwidth of loop lter is chosen as a compromise between robustness toward noise and tracking ability. For
3.7

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simplicity, we assume that it provides a constant gain when noise in absent. Therefore,

(3.20)

The VCO adjusts the frequency (and, hence, phase) of its output according to the relations

where is a constant gain. From above,

(3.21)

where the overall gain

(3.22) . Then, approximately, (3.23)

. Suppose that

is close to

The solution of this simple differential equation is given by

(3.24)

Clearly,

the initial phase reference that

is not close to . The situation is depicted in Figure 3.5, which shows will drift to the vicinity of for some integer . Then locking begins.

tends to

. Notice that the overall gain controls the speed of convergence. In case that

For practical communication systems, such as BPSK systems, the carrier phase cannot be tracked with such the simple approach above. It is because the data, which can possibly change in every symbol interval (typically a very short time), affect the phase of the carrier. However, if extra power is spent to send an unmodulated carrier together with the data signal, i.e., the transmitted signal is of the form

where

(3.25)

is the information signal and is the power of the unmodulated carrier, then a BPF with
can be used to lter off the data signal, and

a very narrow pass-band around the carrier frequency

the phase of carrier can be tracked with the PLL in Figure 3.4.

3.8

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3. Synchronization

1.5 1

0.5

e(t)

0.5

1.5

2 8

Figure 3.5: Drift of the phase reference to a stable equilibrium Phase-locked loops for modulated carrier Instead of using extra power to send an unmodulated carrier, carrier phase of modulated signal can also be tracked in the following way if the modulation method is BPSK. The received signal is

(3.26)

neglecting the noise. The effect of the data signal can be removed by squaring. We get, after squaring,

Passing the result through a BPF tuned at , we get an unmodulated carrier whose phase,

(3.27) , can be

tracked with the PLL in Figure 3.4. Using this approach, we obtained the squaring loop in Figure 3.6. Notice that since we are only able to determine

, there is a phase ambiguity of or

in our estimate of

, i.e., we do not know the actual carrier phase is

. To overcome this problem, the data must

be differentially encoded at the transmitter and differentially decoded at the receiver. A similar approach to carrier phase recovery for BPSK is the Costas loop in Figure 3.7. The idea
3.9

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r(t)

BPF

LPF

Loop Filter

VCO

Figure 3.6: Squaring loop

r(t)

LPF e(t)

VCO

Loop Filter

/2 shifter

LPF
Figure 3.7: Costas loop

3.10

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3. Synchronization

A m ( t ) cos ( 2 fc t + ) m(t)

LPF

Loop Filter

VCO

Figure 3.8: Phase-locked loop with clean data is quite similar to the squaring loop. The data signal is again removed by the multiplication before the loop lter. The input to the loop lter is given by

Hence, again, we are tracking

(3.28)

, and a phase ambiguity of

remains just as in the squaring loop.

Differential encoding and decoding are again needed. Actually, with suitable choices of lters, it can be shown that the squaring loop and the Costas loop are equivalent. Both the squaring loop and the Costas loop remove the data in the received signal by multiplying the noisy received data by itself. However, if we assume that we know the original data, we can remove the data in received signal with the known clean data as shown in Figure 3.8. Of course, in general, the receiver does not know the transmitted data. However, a slight modication of this approach can be used under the following conditions: 1. A training sequence is available, i.e., before the actual transmission of data, the transmitter sends a standard sequence of symbols that are known a prior by both the transmitter and the receiver. 2. The signal-to-noise ratio

is high. is

If a long enough training sequence is available, the receiver can lock onto the carrier during the training period. After the training period, the receiver has a good estimate of the carrier phase. If

high, the probability of error is very small. Hence, the decisions made by the receiver are most likely to be correct. These correctly decided symbols are fed back to the PLL to continue to track the carrier phase. This PLL based approach is called the decision-directed PLL, which is shown in Figure 3.9.
3.11

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3. Synchronization

A m ( t ) cos ( 2 fc t + ) cos ( 2 fc t + )

dt

? > <

/2 shifter

VCO

Filter

Delay

Figure 3.9: Decision-directed PLL receiver Under high SNR, decision directed loops work better than non-decision directed loops because clean data are used instead of noisy data. If clean data is available, it can be shown that the decision-directed PLL is actually performing for the ML phase estimation for the case of a modulated carrier.

3.3 Symbol Timing Synchronization

For simplicity, we assume that know the value of received signal is

and we have achieved carrier phase synchronization, i.e., we

and focus on the estimation of the symbol timing . The simplied model for the

(3.29)

3.3.1 ML symbol timing estimation with training signal

First, we assume that the baseband signal

is known, i.e., a training signal is sent to allow the

receiver to perform symbol timing synchronization. Based on this assumption, we work out the ML estimator for . Again, we start from a basis represent the signals in (3.29) by vectors:

for the space of all nite-energy signals and

(3.30)

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3. Synchronization

where the th elements of ,

, and are

(3.31)

(3.32) (3.33)

can be a sufcient statistic for the estimation of in general. Therefore, we need to employ the whole vector instead. However, in order to keep our the development simple (not strictly rigorous though), we start by the truncated observation vector and then let increase to innity. For a xed (and nite) , the likelihood function is given by
Unlike the previous cases, no truncation of

(3.34)

As in the previous cases, it is easy to see that the ML estimator is given by

(3.35)

Now, letting approaches innity, we have

(3.36)

A necessary condition that the ML estimator has to satisfy in general is

(3.37)

For the special case where the training signal is a (known) sequence of BPSK pulses, i.e.,

the necessary condition in (3.37) becomes

(3.38)

(3.39)

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bi d dt ^ iT+

r(t)

pT (t)

cos (2 f ct + ) VCC

Figure 3.10: Delay-locked loop using a BPSK training signal where

loop (DLL), to solve for

(3.40)

As in the case of carrier phase estimation, we can employ a feedback structure, known as delay-locked

as shown in Figure 3.10. The estimate of

is varied by the voltage-

controlled clock (VCC) in the DLL. When the SNR is high, after the initial training period, we can replace the known symbols by the decisions made by the demodulator. In this way, we can keep the DLL running for the whole duration of transmission. The DLL so obtained is called a decision-directed DLL.

3.3.2 Non-decision-directed ML symbol timing estimation

When the SNR is low, the decision-directed DLL becomes ineffective. We need an estimator which does not need the data symbol information to estimate the symbol timing. To simply our discussion here, we assume that a nite but large number of bits are transmitted using the BSPK format dened in (3.38). Let of be the vector which contains all the transmitted BPSK symbols and the dimension be . Then for each bit pattern , we can construct an equation describing the received signal in

the vector notation based on the basis in the previous section:

(3.41)

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Again, we work on the truncated observation

and then let approach innity. Since our goal

as a random vector with

is to avoid using the symbol information, we model the symbol vector

equal-probable bit patterns. With this assumption, the likelihood function is obtained by averaging the conditional density function

over all possible bit patterns:

(3.42)

Taking logarithm, letting go to innity, and removing the irrelevant term

, we get

(3.43)

is given by (3.40). Since this estimator is supposed to work in situations that the SNR is low, we can use the approximation , for small , to simplify the non-decision-directed
where

ML estimator in (3.43) to

(3.44)

Again, by differentiating the metric and setting the derivative to zero, we obtain a necessary condition the ML estimator must satisfy

(3.45)

and can be implemented by the DLL structure shown in Figure 3.11. We can further approximate the derivative of

by

where is a small time derivation. The resulting DLL, shown in Figure 3.12, based on this approximation is known as the early-late gate DLL.

(3.46)

3.15

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3. Synchronization

r(t)

pT (t)

( )

d dt ^ iT+

cos (2 f ct + ) VCC

Figure 3.11: Non-decision-directed delay-locked loop

^ iT+ - delay

( )

r(t)

pT (t) advance

VCC

+ cos (2 f ct + )

^ iT+ +

( )

Figure 3.12: Early-late gate delay-locked loop

3.16