PRESENTATION ON

UART
TO, H.S. JATANA HEAD, VDD

CONTENTS

INTRODUCTION FEATURES OPERATION OVERVIEW TRANSMITTER RECIEVER INTERRUPT

INTRODUCTION

The Universal Asynchronous Receiver Transmitter (UART) is a popular and widely-used device for data communication in the field of telecommunication.

There are different versions of UARTs in the industry. Some of them contain FIFOs for the receiver/transmitter data buffering and some of them have the 9 Data bits mode (Start bit + 9 Data bits + Parity + Stop bits).

This UART reference design contains a receiver and a transmitter. The receiver performs serial-to-parallel conversion on the asynchronous data frame received from the serial data input SIN. The transmitter performs parallel-to serial conversion on the 8-bit data received from the CPU.

BLOCK DIAGRAM

Receiver and Transmitter: In the UART, there are a total of ten registers only eight registers can be accessed through the CPU interface. RSR is a serial-in-parallel-out register and TSR is a parallel-in-serial-out register, they are the two registers for the shift in and shift out of the Data bits portion of the serial frame and can't be accessed by the CPU. RBR and THR are the buffers for data receiving and transmitting. The UART frame format is configured through LCR and the status of receiver and transmitter are stored in LSR.

MODEM: MCR controls the output state of DTRn and RTSn. The line status of DCDn, CTSn, DSRn, and RIn are monitored by the MODEM control block and stored in MSR. Interrupt Arbitrator: The UART common interrupt request pin INTR will go high active when any of the interrupt conditions are matched and enabled by Interrupt Enable Register (IER).The UART prioritizes interrupts into four levels to minimize external software interaction, and records these in the Interrupt Identification Register (IIR). The four levels of interrupt conditions in order of priority are: Receiver

Internal Registers The UART contains two data buffering registers (RBR and THR)

Three status registers (IIR, LSR, and MSR)

Three control registers (IER, LCR, and MCR).