Cc lnh

lp trnh bc thang
v mnemonic

Chng II

Cc lnh lp trnh c bn

2. Bc u vi lp trnh (Programming)
2.1 Cc ch lm vic ca PLC
PLC c th c t mt trong 3 ch t phn mm lp trnh CXProgrammer.

ch lm vic ca PLC

PROGRAM mode : L ch dng khi vit chng trnh hay thc

hin cc thay i hoc sa i i vi chng trnh hin hnh
MONITOR mode : L ch c dng khi thay i ni dung b
nh trong khi PLC ang chy (Run).
RUN mode
: L ch dng thc hin (chy) chng
trnh m ta lp v np vo PLC. Chng trnh bn trong PLC
khng th c thay i khi ang trong ch ny.

Theo mc nh, PLC ca Omron u c th c lp trnh song song bng 2

ngn ng: Dng lnh (Statement List hay mnemonic code) & S bc thang
(Ladder diagram). Trong ti liu ny s ch yu trnh by v S bc thang,
km theo bn cnh l cc lnh tng ng tng ng dng Dng lnh
(Statement List).
2.1.1)

V d v mt mch t gi (self-holding)

START

{ {
z

STOP

{ {

INPUT

a)

MC

OUTPUT

Power Supply

Input

Thit b ngoi

Output

Thit b

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Trang 2-2
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Chng II

Cc lnh lp trnh c bn
00000
00001

Nt bm Start
Nt bm Stop

Ladder Diagram
00000

ngoi
Motor

100.00

Mnemonic Codes

00001

. ch
00000
0001
0002
0003
0004

100.00
100.00

END

Lnh
LD
OR
AND NOT
OUT
END(01)

b)

Th. s
00000
100.00
00001
100.00

c)

Hnh 24: a) S ni PLC vi mch bn ngoi

b) Chng trnh dng ngn ng bc thang (Ladder Diagram)
c) M chng trnh dng Mnemonic Codes
Chng trnh ny s m bo u ra 100.00 s lun trng thi ON khi
00000 ln 1 bt k sau trng thi ca u vo 00000 nh th no.

2.1.2) Lp trnh bng S BC THANG (LADDER

DIAGRAM)
Ban u, PLC c s dng ch yu thay th cc s in phc tp
gm rt nhiu cc rle, tip im, timer, mch gi, .. v cc phn t in
trung gian khc lm nhim v ca cc mch logic. Tuy nhin khi dng PLC,
cc phn t logic trung gian ny c thay th hon ton bng cc s
in "o" bn trong PLC do ngi thit k lp trnh. Vic m phng cc s
in ny c lp bng mt dng ngn ng iu khin gi l s bc thang
(LADDER DIAGRAM).
V d v mt s bc thang
Tip im
thng m

Tip im
thng ng
Power bus phi

Power bus
tri

00

01

Nt_Bt

Nt_Tt

100.00

00000
100.00

Rle 1

Cun dy
(ht/nh tip
im)

END

00004

Thnh phn c bn ca mt s bc thang bao gm :

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Trang 2-3
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Cc lnh lp trnh c bn

Chng II

Power bus tri v phi : ging vi dy ngun "nng" v dy "ngui" ca s

in. Cc power bus ny lun c v thng ng nh trn hnh.
Cc tip im thng ng (NC) v thng m (NO)
Cc cun dy ht/nh cc tip im khc
Cc phn t in khc nh timer, counter,.. v cc lnh khc.

Trong s ny, cun dy rle ngoi cng bn phi s ch nhn c in

t power bus tri (tc dy "nng") khi cc tip im i trc bn tri n "cho
php" dng in i qua, tc u ng. Do vy cc tip im (v t hp u
ni ca chng) thng c gi l iu kin thc thi (execution condition)
cho cun dy hay cc lnh khc i sau.
Cc cun dy, cc tip im v mt s cc phn t khc lun c mt a ch
trong b nh tham chiu v s dng trong chng trnh. a ch ny c
ghi pha trn k hiu ca phn t nh trn hnh. Cn cc tn m t chc nng
ca chng nh Nt_Bt, Nt_Tt, .. c ghi bn di. a ch ca tip im
s iu khin (ng/m) tip im ny; ngc li, cun dy li iu khin bt
tt ON/OFF a ch i km ca cun dy.

2.2 Cc lnh lp trnh c bn

PLC thng c lp trnh bng mt ngn ng m phng ging nh s
in gi l Ladder Diagram. Mi phn t ca s l mt lnh (Instruction).
Cc lnh phc tp thng c mt m lnh (Code) ring.
2.2.1) Lnh tip im: Load (LD) v Load Not (LD NOT)
Lnh LOAD hay LOAD NOT l lnh tip im thng h & tip im thng
ng, dng lm iu kin khi u mt thang mi trong s bc thang v
c chc nng ging vi mt tip im ca s in. Cc tip im khi ni
vi cc phn t khc thng ng vai tr lm iu kin thc hin (execution
condition) cho cc phn t i sau n. Lnh ny lun c gn vi mt a ch
bit xc nh trng thi ca tip im ny.
Ch l 2 lnh ny lun lun nm pha tri nht ca mt khi logic trong s
bc thang (ngha l khng c mt lnh no loi khc c php nm
pha tri ca lnh ny trong khi logic).
C 2 loi:
- Lnh LD : Tng ng vi mt tip im thng m (Normally Open
- NO) trong s in. Khi bit i km l 1 (ON), tip im s ng v
cc phn t (lnh) i sau tip im s c hot ng (c in) v
ngc li khi bit i km l 0 (OFF), tip im s m v cc phn t i
sau tip im s khng c hot ng (khng c in chy qua tip
im)
- Lnh LD NOT : Tng ng vi mt tip im thng ng
(Normally Closed - NC) trong s in. Khi bit i km l 0 (OFF), tip
im s ng v cc phn t (lnh) i sau tip im s c hot
ng (c in) v ngc li khi bit i km l 1 (ON), tip im s m
v cc phn t i sau tip im s khng c hot ng (khng c
in chy qua tip im)

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Trang 2-4
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Chng II

Cc lnh lp trnh c bn

LOAD-LD (Normally open)

LOAD NOT-LD NOT
(Normally Closed)

B : BIT

IR, SR, AR, HR, TC, LR,

Cc a ch c th truy cp dng bit

V d :
00001

a ch
00000
00001
00002
00003

0
Lnh LD
00000

Lnh
LD
Lnh khc...
LD NOT
Lnh khc ....

Th. s
00000
.......
00000
......

Lnh LD NOT

2.2.2) Lnh tip im: AND v AND NOT

Lnh AND (AND NOT) dng to ra cc tip im thng m (thng
ng) theo sau (ni tip) vi cc tip im to ra bi lnh LD hay LD NOT.
AND-AND

B : BIT

AND NOT-AND NOT

IR, SR, AR, HR, TC, LR

B
Cc a ch c th truy cp dng bit

V d: AND, AND NOT

a ch
00000
00001
00002
00003

Lnh
LD
AND NOT
AND
Lnh ..

Th. S
00000
00100
LR 00000

2.2.3) Lnh tip im: OR, OR NOT

Lnh OR (OR NOT) to ra cc tip im thng m (thng ng) ni song
song vi mt nhnh khc.
B : BIT

OR-OR
B

OR NOT-OR NOT
B

IR, SR, AR, HR, TC, LR

Cc a ch c th truy cp dng bit

V d : OR, OR NOT
00000
Instruction.
00100

LR
00000

a ch

Lnh

Tham s

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Trang 2-5
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Chng II

Cc lnh lp trnh c bn
00000
00001
00002
00003

LD NOT
OR NOT
OR
Instruction

00000
00100
00000

LR

2.2.4) Lnh AND LD v OR LD

AND LOAD-(AND LD)

OR LOAD-(OR LD)

Lnh AND LD ni tip 2 khi logic vi nhau trong mt s bc

thang.
Lnh OR LD ni song song 2 khi vi nhau trong mt s bc
thang

Cn ch th t nhp lnh ny: cc khi logic cn ni vi nhau c nhp

ring r trc, sau mi nhp lnh OR LD hoc AND LD.
Lnh ny khng cn tham s & ch cn dng khi vit chng trinh dng
mnemonic.
V d:

AND LD
00000

00002

00001

00003

Instruction.

. ch
00000
00001
00002
00003
00004
.
.

V d

Lnh
LD
OR
LD
OR NOT
AND LD
.
.

Th. s
00000
00001
00002
00003
.
.

OR LD
00000

00002
Instruction.

00001

00003

a ch
00000
00001
00002
00003
00004
00005

Lnh
LD
AND NOT
LD
AND
OR LD
Lnh ...

Th. s
00000
00001
00002
00003
.....

2.2.5) Lnh cun dy: OUT v OUT NOT

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Trang 2-6
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Chng II

Cc lnh lp trnh c bn

Lnh OUT (OUT NOT) s bt bit c gn cho lnh ny ln ON (xung OFF)

khi iu kin thc thi i trc n l ON v s reset bit ny v OFF khi iu
kin i trc l OFF. Lnh OUTPUT ging vi chc nng cun dy trong s
in l khi mt cun dy nhn c in t tip im (iu kin) i trc
n s ht (ng) hay nh (m) tip im i km.
K hiu:

OUTPUT-OUT
B : BIT

IR, SR, AR, HR, LR, TR

Cc a ch c th truy cp dng bit

V d: Lnh OUT
00000

100.00

. ch
00000
00001

Lnh
LD
OUT

Th. s
00000
100.00

Tip im 00000 l iu kin thc thi ca cun dy 100.00.

K hiu:

OUTPUT NOT-OUT NOT

B : BIT

IR, SR, AR, HR, LR, TR

Cc a ch c th truy cp dng bit

V d: OUT NOT
00001
100.00

. ch
00000
00001

Lnh
LD
OUT NOT

Th. s
00001
100.00

2.3 Cc hm chc nng c bit - Function ( FUN )

Ngoi cc lnh iu kin v u ra n gin trn, trong PLC loi CP1L/1H
cn c cc lnh vi cc chc nng phc tp khc. Mi lnh ny u c mt
m lnh (code) ring. Khi dng CX-Programmer, ta s dng cng c
Instruction thm 1 hm chc nng v c th nhp m lnh hoc tn lnh
u c.
Di y l m ca mt s lnh trong PLC loi CP1L/1H :

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Chng II

Cc lnh lp trnh c bn

FUN 01
FUN 02
FUN 03
FUN 04
FUN 05
FUN 10
FUN 11
FUN 12
FUN 13
FUN 14
Ch :
-

l lnh
,,
,,
,,
,,
,,
,,
,,
,,
,,

END ( End Instruction )

IL ( Interlock )
ILC ( Interlock Clear )
JMP ( Jump End )
JME ( Jump End )
SFT ( Shift Register )
KEEP ( Latching Relay )
CNTR ( Reversible Counter )
DIFU ( Differentation - Up )
DIFD ( Differentation -Down )

Cc s 0 u cc m lnh (v d 01 (END), 02 (IL),...) phi c

nhp vo. Nu ch nhp ch s sau th kt qu c th khng ng.
Khi biu din lnh, ngi ta thng ghi km c m lnh ca lnh
trong du ngoc n theo sau tn lnh. V d: END(01), IL(02),..
Tuy nhin khi nhp lnh vo chng trnh th ch cn nhp tn lnh
hoc m lnh l .

2.3.1) Lnh END (01)

Lnh END(01) dng nh du im kt thc ca chng trnh. Mt
chng trnh c th c nhiu lnh END (01) nhng PLC s ch x l cc lnh
t u chng trnh n lnh END u tin m n gp, sau chng trnh
li bt u t lnh u tin ca chng trnh. Nu khng c lnh END trong
chng trnh, khi PLC chuyn sang ch RUN th trn mn hnh ca b lp
trnh cm tay s bo li "NO END INSTR" v chng trnh s khng c
thc hin.
V d Chng trnh dng s bc thang (trn) v dng Mnemonic tng
ng (di) u khng c lnh END(01), do s b bo li v khng th
chy c:
00000

00002
Instruction.

0
00001

00003

. ch
00000
00001
00002
00003
00004

Lnh
LD
OR
LD
OR NOT
AND LD

Th. s
00000
00001
00002
00003
---

Li s bo nh sau trn phn mm CX-Programmer:

NO END INSTRUCTION!

2.3.2) Lnh IL (02 ) v ILC (03)

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Trang 2-8
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Chng II

Cc lnh lp trnh c bn

Lnh IL (Interlock) v ILC (Interlock Clear) lun c dng i km vi nhau.

Khi mt lnh IL c t trc mt on chng trnh, iu kin thc hin
ca IL s iu khin iu kin thc hin ca ton b cc lnh bt u t sau
lnh IL cho n lnh ILC u tin sau lnh IL ny. Khi iu kin thc hin ca
lnh IL l ON, chng trnh vn c thc hin bnh thng. Khi iu kin
thc hin ca lnh IL l OFF, tt c cc lnh theo sau lnh IL cho n lnh
ILC u tin u c thi hnh vi iu kin thc hin l OFF. Ngha l cc
lnh Output nm gia IL v ILC s l OFF.
Chng trnh s tr li hot ng bnh thng sau lnh ILC.
V d:
. ch
00000
00001
00002
00003
00004
00005
00006
00007
00008
00009
00010

Lnh
LD
IL (02)
LD
AND
OUT
LD
OUT
LD NOT
OUT
ILC(03)
END(01)

Th. s
00002
00003
00004
100.00
00005
100.01
00006
100.02
-

Ch :
Cc bit c set hoc reset bi lnh KEEP t trong khi INTERLOCK
vn trng thi c ca chng.
- Timer nm trong khi INTERLOCK s b reset khi iu kin thc thi ca IL
l OFF hoc khi mt in.
- PV ca counter nm trong khi INTERLOCK s khng b reset khi iu kin
thc thi ca IL l OFF.
02
IL(02)
00003

00004
01000

00005

01001
00006
01002
ILC(03
END

2.3.3) Bit phn nhnh - TR (Temporary Relay)

_______________________________________________________________________
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Chng II

Cc lnh lp trnh c bn

Trong cc nhnh chng trnh, cc bit phn nhnh (7 bit t TR0-TR7) c

dng lu iu kin thc hin ti im phn nhnh, gip cho vic thc hin
chng trnh ti nhnh chng trnh c ng n.
00000

TR0 00002

TR1

00003

00005

01000
01001

00006
00007

TR000008

TR1

00009

01002
01003

00010

01004

00011
01005

Chng trnh sau sai do dng hai ln bit TR0 trong cng mt thang chng
trnh:

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-10
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Chng II

Cc lnh lp trnh c bn

00002

TR0

00003

TR0

00004
01000

00005
00006

01001
01002

V d :

Dng bit TR lu cc iu kin thc hin khi phn nhnh

02

TR0

03

TR1

04
05

01000
01001

Nhnh r

06

01002

07

01003

END

Di y l chng trnh trn dng Mnemonic. Cc bit TR c nhp vo

bng lnh OUT, vi tham s l s ca bit TR, sau c dng li bng lnh
LD bt u mt nhnh khc ca chng trnh:
a ch
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015

Lnh
LD
OUT
AND
OUT
AND
OUT
LD
AND
OUT
LD
AND
OUT
LD
AND-NOT
OUT
END (01)

Th. s
00002
TR 0
00003
TR1
00004
100.00
TR1
00005
100.01
TR0
00006
100.02
TR0
00007
100.03
-

Ch : Cc bit TR ch c dng khi lp trnh dng mnemonic code. Cn khi

lp trnh vi ladder diagram (dng phn mm CX-PROGRAMMER), bit ny
khng cn thit v chng trnh t ng thc hin vic ny.
2.3.4)

Lnh JMP (04) v JME (05)

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Chng II

Cc lnh lp trnh c bn

Mi lnh JUMP gm cp lnh JMP v JME c s t 00 n 99; JMP v JME

lun i theo cp vi nhau. Khi chng trnh gp lnh JMP n (n= s ca lnh
JUMP), n s b qua khng thc hin cc lnh theo sau lnh ny cho n
lnh JME n c cng s. Khi gp lnh JME, chng trnh sau li thc hin
bnh thng. Mc d hot ng ca JMP kh ging vi hot ng ca
INTERLOCK khi iu kin thc hin ca IL l OFF, nhng i vi lnh JMP,
cc ton t nm gia lnh JMP v JME khng b OFF m vn gi nguyn
trng thi trc khi thc hin lnh JUMP ny.
V d : Lnh JUMP
02

03
JMP(04)

04
01000

05

01001

06

01002
JME(05)
1

END

Chng trnh dng mnemonic :

. ch
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010

Lnh
LD
AND
JMP(04)
LD
OUT
LD
OUT
LD
OUT
JME(05)
END(01)

Th. s
00002
00003
1
00004
100.00
00005
100.01
00006
100.02
1

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Hng dn t hc PLC Omron
Trang 2-12
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

2.4 V d ng dng: Dng ng c khi c qu ti

C 5 motor ni lin ng vi nhau. Khi nt PB Start c nhn, c 5 Motor
u khi ng v chy nu nh khng c motor no ang b qu ti
(overload). Nu 1 trong 5 motor ny b qu ti hoc khi nt Stop c nhn,
c 5 motor s dng. n bo Overload s sng nu c motor no ang b
qu ti.
I/O
u vo
00000
00001
00002
00003
00004
00005
00006

u ra
PB Start
PB Stop
Overload M1
Overload M2
Overload M3
Overload M4
Overload M5

100.00
100.01
100.02
100.03
100.04
100.05

Chng trnh dng s bc thang

00002

00003 00004 00005

00000

Chng trnh dng mnemonic

00006
IL(02)

00000

00001

100.01

00006
100.01
100.02

100.02
100.03

100.03
100.04
100.04
100.05
100.05

00018

ILC(03)
00002

00019

Lamp Overload
Motor 1
Motor 2
Motor 3
Motor 4
Motor 5

100.01
00003
00004

00000
00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025

LD
AND
AND
AND
AND
IL
LD
OR
OR
OR
OR
OR
AND
OUT
OUT
OUT
OUT
OUT
ILC
LD
OR
OR
OR
OR
OUT
END

NOT
NOT
NOT
NOT
NOT
(02)

NOT

00002
00003
00004
00005
00006
00000
100.01
100.02
100.03
100.04
100.05
00001
100.01
100.02
100.03
100.04
100.05

(03)
00002
00003
00004
00005
00006
100.01
(01)

00005
00006
00025

END

_______________________________________________________________________
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Trang 2-13
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

Cc lnh AND LD v OR LD c th c dng lp cc s vi cc

phn t kt ni phc tp khi vit chng trnh bng mnemonic:

V d : Cch nhp cc lnh AND LD v OR LD:

AND LD

00002

Dng ni ni tip 2 khi logic chng trnh

00004

00003

01000

00005

OR LD

00002

Lnh
LD
OR
LD
OR NOT
AND LD
OUT

Th. s
00002
00003
00004
00005
--100.00

Dng ni song song 2 khi logic chng trnh

. ch
00000
00001
00002
00003
0004
00005

00003
01001

00005

00004

. ch
00000
00001
00002
00003
00004
00005

Lnh
LD
AND NOT
LD
AND
OR LD
OUT

Th. s
00002
00003
00004
00005
--100.01

V d : ta c 1 on chng trnh vi cc khi logic chng trnh ni kt kh

phc tp nh hnh di :
00000

00001

01000

01001

00002 00003

00004 00005
01000
00006

00200

c th nhp c chng trnh ny cng nh cc khi chng trnh phc

tp khc vo bng b lp trnh cm tay, cn thc hin cc bc sau :
(1) Chia nh on chng trnh thnh cc khi block c bn [1] - [5]

_______________________________________________________________________
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Chng II

Cc lnh lp trnh c bn

a)
00000

00001

e)

00004 00005
b)

01001

d)

01001

00002

00003

f)
00006

c)
00200

2) Nhp tng khi ny vo b lp trnh, bt u t trn xung di, t tri

qua phi nh bnh thng theo th t cc khi n r trn v d di y:
(a) 00000 00001
LD
AND

(b) 01000 01001

00000
00001
OR
LD

(c)

LD
AND

01000
01001

n
o
p
(e)

00200

LD
AND

OR 00200
(d) 0002

(f)

0003

AND
0002
AND NOT 0003

0004

0005
0004
0005

0006
OR 0006

AND
LD

01000
OUT 01000

Ch : Cc khi logic c bn l cc khi vi cc phn t c th c ni

vi nhau bng cc lnh LD, LD NOT, AND, AND NOT, OR, OR NOT, ..
Bi n tp :
Cho mt chng trnh di dng Ladder Diagram di y. Hy nhp
vo chuyn i chng trnh sang dng Mnemonic Code :

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-15
Vn phng i din ti Vit nam

r
q

Chng II

Cc lnh lp trnh c bn

Ladder Diagram
00000

Mnemonic Codes
. ch
Lnh
Th.s

00001
01000
00002

00004
00006

00003

00005
00007

END

2.5 Cc lu khi lp mt chng trnh dng Ladder Diagram

1. Hai thang khc nhau khng c php ni bng mt tip im thng
ng :
00

02
100.00

01

04

03
100.01

on chng trnh trn khng ng v hai thang c ni vi nhau bng mt

tip im thng ng v s c sa nh on chng trnh di y :
01

04

02
100.00

00
00

04

03
100.01

01

2. Nu mt lnh OUTPUT hoc mt FUN lun lun cn iu kin thc

hin l ON, lnh ny khng c ni trc tp vi thanh power bus
bn tri. Thay vo , phi ni qua mt tip im dng c
"ALWAYS ON" ( c a ch l 25313)

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Chng II

Cc lnh lp trnh c bn

OUT
01000
END(01)

01000

25313

LD
25313
OUT
01000
END(01)

01000

Trng hp ngoi l : Cc lnh INTERLOCK CLEAR, JUMP END,

STEP, END khng tun theo quy tc ny.
3. Ch n cc s lng lnh cn thit nhp mt chng trnh.
00

01
100.00
02

03

Hnh A :
s hnh A trn, ta cn c thm lnh OR LD v AND LD ni
nhnh di vi nhnh trn.
Cc lnh dng mnemonic cho s hnh A
. ch
0000
0001
0002
0003
0004
0005
0006

Lnh
LD
LD
LD
AND
OR
LD
AND
LD
OUT

Th. s
00
01
02
03
100.00

on chng trnh trn c th c sa li nh hnh B sau y

:
Cc lnh dng mnemonic cho s hnh B
. ch
0000
0001
0002
0003
0004

Lnh
LD
AND
OR
AND
OUT

Th. s
02
03
01
00
100.00

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-17
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

R rng l vi cch biu din tng ng nh hnh B, vic biu din

n gin hn v gim i c 2 lnh AND LD v OR LD.
4. Mt nhnh khng c xut pht t mt nhnh song song khc.
00

04
100.00

01

02
03
100.01

Khi cc bit 01, 02, 04

l ON s bt 1000
ln ON

Hnh A
hnh A, ta mun khi cc bit 00, 02 v 03 l ON hoc khi 01 v
03 l ON, bit 100.01 s c bt ln ON. Tuy nhin l cch biu
din khng thch hp vi vic nhp bng Console.
on chng trnh trn c sa li nh hnh B sau :
01

02

04
100.00

00
00

02

03
100.01

01

Hnh B
5.
Lnh OUT hoc OUT NOT (nu c) phi l lnh cui cng trn
thang v phi c ni vo power bus bn phi.
100.00

00

01

on chng trnh trn khng ng v lnh OUT 100.00 khng c

ni trc tip vo power bus m qua mt tip im v s c sa li nh sau
:
00

01
100.00

6. Nu mt a ch bit c dng lp li trn hai lnh OUTPUT khc

nhau, lnh OUTPUT i trc s khng c tc dng.
_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-18
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn
Lnh OUTPUT
ny khng c tc
dng

00000
100.00
00011
100.00

Do , nu 2 bit 00000 v 00011 u dng iu khin lnh

OUTPUT vi bit 100.00 th on chng trnh trn s c sa li nh sau :
00000
100.00
00011

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-19
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

Bi n tp v Lp trnh c bn trn CP1L/1H

dng Mnemonic Code v Ladder Diagram
1. Hy vit chng trnh dng Mnemonic Code cho chng trnh dng s
bc thang di y
. ch
00000
00001
00002
00003
00004
00005
00006
00007
00008
00009

Lnh

Th. s

2. Cho mt chng trnh dng Mnemonic Code bn di, hy vit chng

trnh tng ng di dng Ladder Diagram :
. ch
00000
00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012

Lnh
LD
AND
LD NOT
AND
OR LD
LD
AND NOT
LD NOT
AND
OR LD
AND LD
OUT
END (01)

Th. s
00000
00001
00002
00003
00004
00005
00006
00007
100.00

3. Hy nhp chng trnh di dng Mnemonic Code cho on chng trnh

dng s bc thang di y :
00000

00001
100.00
00002
100.01
00003
100.02
100.03
END(01)

. ch
00000
00001
00002
00003
00004
00005
00006
00007
00008
00009
00010

Lnh

Th. s

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-20
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

p n :
1)

00000
00001
00002
00003
00004
00005
00006
00007
00008
00009

LD
AND
AND NOT
LD
AND NOT
OR LD
AND
AND
OUT
END(01)

00000
00001
00002
00003
00004
00005
00006
100.00

2)
00000

00000 00001 00004 00005

01000

00002 00003 00006 00007

00012

3)

00000
00001
00002
00003
00004
00005
00006
00007
00008
00009
00010

[ END ]

LD
OUT
AND
OUT
AND
OUT
LD
AND
OUT
OUT
END(01)

00000
0
00001
100.00
00002
100.01
TR
0
00003
100.02
100.03

TR

Ch : Nhnh r vi lnh AND 00002 v OUT 00001 khng cn thm bit TR

v gia im r nhnh v lnh OUT 100.00 khng c tip im no.

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-21
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

2.6 Cc lnh c bit thng dng khc:

2.6.1) Bt bit (SET) v Xo bit (RESET) SET- RSET
Lnh SET s bt bit i km ln ON khi iu kin thc thi ca n
l ON. Sau , bit s vn trng thi ON khng ph thuc vo vic
lnh SET c iu kin thc hin l ON hay OFF cho n khi lnh
RESET (RSET) xo n v OFF.
K hiu

B: Bit
IR, SR, AR, HR, LR

SET B
Cc a ch c th truy cp
dng bit

RSET B

V d: Bit 100.00 s c bt ln ON khi iu kin thc hin ca lnh SET

(l bit 00000) l ON. cc chu k qut sau, bit 100.00 s vn gi (Hold)
trng thi ON cho d bit 00000 l ON hay OFF. Bit 100.00 s ch b xo bi
lnh Reset khi bit 00001 l ON.
S bc thang

Cc lnh dng Mnemonic

000.00
SET

100.00
000.01
RSET

00000
00001
00002
00003
00004

LD
SET
LD
RSET
END

000.00
100.00
000.01
100.00

100.00

END(01)

Ch : Trng thi ca bit c SET hay RSET s khng thay i khi nm

trong khi INTERLOCK hay JUMP.
2.6.2) Lnh gi KEEP - KEEP(11)
Lnh KEEP hot ng nh mt r le cht vi hai u vo l SET (S) v
RESET (R). Bit B s c Set ln ON khi u vo S l ON v s vn gi
ON cho n khi B b reset v OFF khi u vo R l ON.
K hiu

KEEP(11)

B: Bit
IR, SR, AR, HR, LR
Cc a ch c th truy cp
dng bit

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-22
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

Ch : Cc bit c set hay reset bi KEEP khng b reset khi nm trong

khi INTERLOCK.
V d : Bit 100.00 s c set ln ON khi bit 00000 ln ON v s vn ON
cho d sau bit 00000 l ON hay OFF. Bit 100.00 ch b reset v OFF khi bit
00001 l ON ( u vo RESET s tc ng)

000.00

000.01

S
R

00000
00001
00002
00003

KEEP (11)

100.00

LD
LD
KEEP
END

000.00
000.01
100.00

END(01)

2.6.3) DIFFERENTIATE UP v DOWN - DIFU(13) & DIFD(14)

-

DIFU(13) : Lnh ny s bt bit i km ln 1 trong vng mt chu k

qut (scan/cycle) khi iu kin thc hin chuyn t OFF chu k
qut trc sang ON chu k qut ln ny. Sau bit li tr v
trng thi OFF.
DIFD(14) : Lnh ny s bt bit i km ln 1 trong vng mt chu k
qut (scan/cycle) khi iu kin thc hin chuyn t ON chu k
qut trc sang OFF chu k qut ln ny. Sau bit li tr v
trng thi OFF.
K hiu

B: Bit
IR, SR, AR, HR, LR

DIFU(13) B
Cc a ch c th truy cp
dng bit

DIFD(14) B

V d: Khi bit 000.00 chuyn t OFF chu k qut trc ln ON chu

k qut hin hnh, bit 002.00 s c bt ln ON trong vng mt chu k.
chu k qut sau, bit 002.00 li c quay tr v OFF.
000.00
DIFU(13)

002.00

002.00

000.01

100.00

100.00

00000
00001
00002
00003
00004
00005
00006

LD
DIFU
LD
OR
AND NOT
OUT
END

000.00
002.00
002.00
100.00
000.01
100.00

END(01)

2.6.4) Lnh copy d liu MOVE - MOV(21)

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-23
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn
K hiu

S: Source word
IR, SR, AR, DM, HR, TC, LR, #
Cc a ch b nh truy cp
dng word hoc hng s (#)
D: Destination word
IR, SR, AR, DM, HR, LR

(@) MOV(21)
S
D

S = L a ch ca word ngun (Source word) hoc mt hng s

(# l k hiu ca mt hng s, v d #155,...c nhp vo ngay khi lp
trnh)
D = L a ch ca word ch (Destination word)
Khi lnh MOV(21) c iu kin thc hin l ON, lnh ny s copy hng
s hoc ni dung ca word c a ch ch nh bi S sang word c a ch ch
nh bi D. Ni dung ca word ngun S khng thay i khi thc hin lnh ny.
V d: Khi Source word l 000, cn Destination word l 100
Source word
CH 000
00000
1
00001
1
00002
0
00003
1
00004
1
00005
0
00006
0
00007
1
00008
1
00009
1
00010
1
00011
0
00012
0
00013
0
00014
0
00015
1

.
.
.

Destination word
CH 100
100.00
1
100.01
1
100.02
0
100.03
1
100.04
1
100.05
0
100.06
0
100.07
1
100.08
1
100.09
1
100.10
1
100.11
0
100.12
0
100.13
0
100.14
0
100.15
1

V d:
v d di y, a ch word ngun l S = HR01 (v ni dung ca word ny
l gi tr 1500) cn a ch ca word ch l D = LR 05. Khi bit 000.00 ln ON,
lnh MOV(21) s copy ni dung ca HR01 (tc gi tr 1500) sang word LR05.

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-24
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn
000.00

00000
00001

MOV(21)

HR 01

S
D

00003

DM05

LD 000.00
MOV(21)
HR01
DM05
END

END(01)

iu kin thc hin ON

u vo II

OFF

iu kin thc hin ON

u vo DI

OFF

Completion Flag

ON
OFF

SV

PV

SV

SV-1
SV-2

00001
00000

SV-1

00000

SV-2

2.6.5) B m ln xung - Reversible Counter CNTR (FUN 12)

(hay cn gi l UP/DOWN Counter)
Ch : Mi b counter v timer c mt s duy nht t 0 n 127 v khng
c php dng trng lp trong lnh m/timer khc ca chng trnh.
S ca b m v timer c 2 cch dng nh sau :
- Khi dng nh mt bit, n c dng lm c bo m xong
(completion flag).
- Khi dng nh mt word, n c dng truy cp gi tr m hin
ti (PV).
CNTR l mt b m c th m theo hai chiu tng - gim:
- B m s tng gi tr ca PV (Present Value) ln 1 mi khi u
vo II (Increment Input) chuyn t OFF ln ON.
- B m s gim gi tr ca PV (Present Value) i 1 mi khi u vo
DI (Decrement Input) chuyn t OFF ln ON. Khi b m gim n
0, gi tr hin ti ca PV c gn cho SV v c bo hon thnh
(completion flag - chnh l bit CNTR n vi n = s ca counter) s
ln ON cho n khi b m li gim tip.
- B m s reset PV v 0 khi u vo Reset Input (R) chuyn t
OFF ln ON.

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-25
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

Khi PV bng vi gi tr t SV (Set Value), PV c reset v 0 v

c bo hon thnh s bt ln ON cho n khi b m li tip tc
m tng.
Khi c II v DI u cng chuyn t OFF ln ON, b m vn gi
nguyn gi tr.
K hiu

N : s ca counter
# (0-127)

SV: Set Value (word, BCD)

IR, SR, AR, DM, HR, LR, #

II

CNTR(12)

DI

V d minh ho

SV

II : u vo m tng
DI : u vo m gim
R : u vo reset gi tr PV
SV : Gi tr t trc

B m tng gim (UP/DOWN counter)

Ladder Diagram
0001

0002

0003

0004

Mnemonic Code
CNTR
010
#9999

0005

CNT 010
0200
0001

0002

0003

0004

CNTR
011

01
0005
R

. ch
0200
0201
0202
0203
0204
0205

Lnh
LD
AND-NOT
LD
AND-NOT
LD
CNTR(12)

0206
0207
0208
0209
0210
0211
0212
0213

LD
OUT
LD
AND-NOT
LD
AND-NOT
LD
CNTR(12)

0214
0215

LD
OUT

CNT 011
0201

Th. s
0001
0002
0003
0004
0005
010
#
9999
CNT
010
0200
0001
0002
0003
0004
0005
011
01
CNT
011
0201

2.6.6) Thanh ghi dch - SHIFT REGISTER - SFT(10)

I

SFT(10)

P
R

St
E

St =
E =
I =
P =
R =

Word u tin ca thanh ghi dch

Word cui ca thanh ghi dch
Bit dch (Input bit)
Bit xung nhp ((Shifting) Pulse Input)
u vo xo (Reset Input)

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-26
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

Thanh ghi dch c nh ngha l cc word bt u t Word u tin St cho

n Word cui E (a ch Word cui phi > Word u).
Bit
ngoi
cng s
mt !

End word
15

14

...
... 01 00

...

15 14 13

.. 01 00

Start word
15 14

.. . 01 00

V d minh ho:
v d di y, ta c 1 thanh ghi dch di 1 word (St= 010, E =010) ti a ch 010.
Lnh SFT(10) s dch cc bit ca ca thanh ghi dch sang bn tri mt v tr bit v bit
000.00 c dch vo bit ngoi cng bn phi (tc bit 010.00) ca thanh ghi ny mi
khi bit 255.02 chuyn t OFF ln ON. Bit 255.02 ny l mt bit xung nhp 1 giy do
thanh ghi dch s c dch sang tri, bit ngoi cng bn tri (tc bit 010.15) s
mt mi giy mt ln. Khi bit 000.01 (u vo Reset) ln ON, ni dung ca thanh ghi
dch s c reset v 0 (cc bit u b reset v 0).
000.00

. ch
00000
00001
00002
00003

SFT(10)
255.02
010
000.01

Lnh
LD
LD
LD
SFT(10)

Th. s
00000
25502
00001
010
010

010

00004

END(01)

END(01)

2.6.7) Rle thi gian (TIMER) - TIM

K hiu

N: S ca Timer
Hng s (#)

TIM

N
SV

SV: Set Value (Word, BCD)

IR, SR, AR, DM, HR, LR, #
Cc a ch b nh truy cp dng word
hoc hng s (#)

N = S ca timer hin dng (Timer Number) (s hp l l t 000 - 127)

SV = Gi tr t trc Set Value tnh theo n v l 0,1s (SV phI dng s BCD
hoc ch n mt Word c cha gi tr BCD). Gi tr ca SV phi nm trong khong t
0000 - 9999 (0 - 999,9 Giy.)

Khi u vo iu kin thc thi ca hm TIM l ON, hm TIM s m gim thi

gian t gi tr thi gian t trc SV n khi bng 0 th completion flag (TIM

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-27
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

n) ln ON. Completion flag s vn ON cho n khi b reset bi u vo iu

kin thc hin v OFF.
V d: Timer s 000 (TIM000) c u vo iu kin thc hin do hai bit
000.00 v 000.01 quyt nh. Khi bit 000.00 l ON v bit 000.01 l OFF, timer
bt u m gim thi gian PV theo tng n v l 0,1 giy t gi tr t trc
SV l 5,0 giy. Khi gi tr thi gian hin ti PV v n 0, c completion flag
TIM000 s ln ON v bt bit 010.00 ln ON cn bit 010.01 v OFF.
Ladder Diagram
000.00

000.01

Mnemonic Code

TIM

00000
00001
00002
00003
00004
00005
00006
00007

000
#0050

TIM000

100.00

TIM000

100.01

LD
AND NOT
TIM
LD
OUT
LD NOT
OUT
END

000. 00
000. 01
000
#0050
TIM000
100.00
TIM000
100.00

END(01)

2.6.8) B m gim (COUNTER) - CNT

Lc khi u gi tr PV c t bng SV (Set Value). Mi khi u vo xung
m CP chuyn t OFF ln ON, gi tr m hin ti PV (Present Value) s
gim mt n v. Khi PV gim n 0, c bo kt thc s ln ON v s ON
cho n khi counter c reset bi u vo R (Reset).
N: S ca b m
Hng s (#)
SV: Set Value (Word, BCD)
IR, SR, AR, DM, HR, LR, #
CP

CNT

N
SV
CP
R

:
:
:
:

N
SV

Cc a ch b nh truy cp dng
word hoc hng s (#)

S ca b m (t 000 n 127)
Gi tr t (t 0 n 9999) v phi dng BCD
u vo xung m
u vo reset

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-28
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

V d:

B m ang m

B m b reset

CP
CNT

CP

N
SV

CNT

N
SV

V d: Gi tr hin hnh (PV) ca b m CNT001 s gim t gi tr SV khi

u vo Input 00000 chuyn t OFF ln ON. Khi s ln chuyn t OFF ln
ON ca input 00000 l 10 ln (bng vi SV=10), c CNT001 s ln ON v do
bt u ra 100.02 ln ON. C CNT001 v PV ca b m s b reset khi
u vo input 00002 ln ON.

000.00

000.02
C001

CNT
001
#0010

100.02

00000
00001
00002
00003
00004
00005

LD
000.00
LD
000.02
CNT 001
#0010
LD
CNT001
OUT 100.02
END

END
(01)

2.6.9) V d v ng dng COUNTER v TIMER

V d 1 M rng kh nng m ca counter
Mt Photo Switch c dng pht hin sn phm v a vo u vo ca
counter. Yu cu cn phi m c 20.000 sn phm th cho ra n
OUTPUT LAMP (tuy nhin b m CNT chun ch cho php m ti 9.999).
I/O
PHOTO SWITCH
OUTPUT LAMP
PB RESET
Ladder

000.00
010.00
000.01
Mnemonic Code

_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-29
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

000.00

. ch
00000
00001

Lnh
LD
LD

Th.s
00000
CNT 001

00002

CNT

00003
00004
00005

LD
LD
CNT

00006
00007
00010

LD
OUT
END(01)

001
#0100
CNT 001
00001
002
#0200
CNT 002
100.02

CNT

000.02

001
#0010

CNT001

100.02

00000
00001
00002

LD
LD
CNT

00003
00004
00005

LD
OUT
END

000.00
000.02
001
#0010
CNT001

100.02

END(01)

V d 2

Ko di thi gian tr ca timer ln 1.000 gi

TIM chun ch cho php t thi gian ti 999,9 giy. Chng trnh sau y
cho php ko di kh nng ca TIM ln 1.000 gi.
I/O
PB START
000.00
PB RESET
000.01
VALUE LUBRICATE
100.00
Ladder
00000

Mnemonic Code

TIM 001
TIM

600 sec

001

. ch
00000
00001
00002

Lnh
LD
AND-NOT
TIM

00003
00004
00005

LD
LD
CNT

00006
00007
00008

LD
OUT
END (01)

#6000

TIM 001

Count
Input
CP

00001

CNT 002

CNT 002
#6000
Reset

R
6000
counts

Th.s
00000
TIM 001
001
# 6000
TIM 001
00001
002
# 6000
CNT 002
100.00

100.00

END(01)
_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-30
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

V d 3 Chng trnh ny s lm nhp nhy (flicker) u ra 100.00 (bt 1

giy, tt 1 giy) ON/OFF 10 ln sau khi bit 000.00 ln ON.
00000

C000

00000

20000

Self-holding bit

20000

20000

T002

TIM 001

00004

#0010
20000

T002

TIM 002

00007

#0020
20000

T001

1-second timer

Count signal

2-second timer

CP

00010

CNT 001
20000

20000

Reset signal

#0010

10-second timer

T001

00014

100.00

00017

END(01)

Flicker output (10 counts)

ON
OFF
15

. ch
00000
00001
00002
00003
00004
00005
00006

Lnh
LD
OR
AND NOT
OUT
LD
AND NOT
TIM

00007
00008
000009

LD
AND NOT
TIM

00010
00011
00012
00013

LD
AND
LD NOT
CNT

00014
00015
00016
00017

LD
AND NOT
OUT
END(01)

Th. s
00000
20000
C*
000
20000
20000
T**
002
001
#
0010
20000
T
002
002
#
0020
20000
T
001
20000
000
#
0010
20000
T
001
100.00
---

Ch thch
(1) Self-holding bit

(2) 1-Second timer

(3) 2-Second timer

(4) 10-count counter

(5) Flicker output (10 counts)

(6) END(01) Lnh

* : C= Counter
** : T = Timer
_______________________________________________________________________
Hng dn t hc PLC Omron
Trang 2-31
Vn phng i din ti Vit nam

Chng II

Cc lnh lp trnh c bn

V d 4: Mt h thng iu khin my bm n gin

Khi nt Khi ng START c bm, bm s kim tra mc nc xem c th
bm c khng qua tn hiu t sensor o mc nc, nu mc nc t th
bm s bm lin tc c khi nt Khi ng nh. Bm s dng khi nt dng
STOP c bm hoc khi mc nc xung thp qu. Km theo l cc n
ch th tnh trng bm.
Bm
B

Nt khi ng
Nt dng
Bm ang hot ng
Bm ang ngh

Sensor pht
hin mc
n-c

Cc u vo ra (I/O)
I/O
INPUT

a ch trn PLC
00000
00001
00002
100.00
100.01
100.02

OUTPUT

Chc nng
Nt khi ng
Nt dng
Sensor pht hin mc nc
u ra iu khin bm
n bo bm ang chy
n bo bm ang ngh

Chng trnh dng s bc thang

00000

00001

Chng trnh dng Mnemonic code:

100.00

00002

00000
100.00

100.01

100.00

100.02
[

END

. ch
00000
00001
00002
00003
00004
00005
00006
00007
00008

Lnh
LD
OR
AND NOT
AND
OUT
OUT
LD NOT
OUT
END (01)

Th. s
00000
01000
00001
00002
100.00
100.01
100.00
100.02

PLC Training Manual OMRON Corporation

by TNBINH Rev 2008

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