Indian Institute of Technology, Delhi EEL 201: Digital Electronic Circuits Tutorial 7, 22nd September, 2008 1.

Design a counter with the following repeated binary sequence: 0, 1, 2, 4, 6. Use J-K ip-ops. 2. Construct a 4-bit Johnson counter. List the eight unused states of the counter. Determine the next state for each of these states, and show that if the counter nds itself in an invalid state, it does not recover to a valid state. How will you modify the circuit to avoid this problem? 3. Construct a 4-bit Johnson counter using J-K ip-ops. 4. Design the sequential circuit specied by the state diagram of Fig. (a), using T-ip-ops.
0/0 A 1/1 B 0/0 D 1/1 0/0 1/0 0/0 1/1
G 0/1 F E 0/1 A 1/0 B 1/0 1/0 1/1 C

0/0
H

1/0

1/1 0/1 0/1 0/0 0/0 1/0 0/0

1/0 0/0 D

(a)

(b)

5. Reduce the number of states in the state diagram shown in Fig. (b), and draw the reduced state diagram. Construct the state table, assign codes for each of the states, and design the sequential circuit. Determine the output sequence, if the input sequence, starting from state A, is 01110010011.