RAM MY TNH

SIMM RAM (Single In-Line Memory Module) y l loi ra i sm v c hai loi hoc l 30 pins hoc l 72 pins. Ngi ta hay gi r l 30-pin SIMM hoc 72-pin SIMM. Loi RAM (c cu hnh SIMM) ny thng ti thng tin mi ln 8bits, sau pht trin ln 32bits. Bn cng khng cn quan tm lm n cch vn hnh ca n, nu ra ngoi th trng bn ch cn nhn dng SIMM khi n c 30 hoc 72 pins. Loi 72-pin SIMM c chiu rng 41/2" trong khi loi 30-pin SIMM c chiu rng 31/2"

-----------------------------------------------DIMM RAM (Dual In-line Memory Modules) Bao gm cc loi nh sau - SDRAM : 168 pin - DDRAM : 184 pin - DDRAM 2,3 :240 pin Hnh DIMM 168 PIN (SDRAM)

Hnh DIMM 184 PIN (DDRAM) [IMG] [/IMG] Hnh DIMM 240 PIN (DDRII v DDRIII) ---------------------------------------------RIIM RAM (Rambus Inline Memory Modules) L tn thng mi ca loi module b nh Direct Rambus. RIMM c hnh dng gn ging nh module DIMM ca cc loi SDRAM thng v c kh nng truyn d liu 16-bits mi ln.RIMM Connector : l khe gn b nh RIMM (RDRAM) trn Mainboard

Hnh RIMM RAM vi 184 PIN ------------------------------------------CC THNG S RAM MY TNH * SDR SDRAM c phn loi theo bus speed nh sau: o PC-66: 66 MHz bus. o PC-100: 100 MHz bus. o PC-133: 133 MHz bus. * DDR SDRAM c phn loi theo bus speed v bandwidth nh sau: o o o o DDR-200: DDR-266: DDR-333: DDR-400: Cn Cn Cn Cn c c c c gi gi gi gi l l l l PC-1600. PC-2100. PC-2700. PC-3200. 100 133 166 200 MHz MHz MHz MHz bus bus bus bus vi vi vi vi 1600 2100 2667 3200 MB/s MB/s MB/s MB/s bandwidth. bandwidth. bandwidth. bandwidth.

* DDR2 SDRAM c phn loi theo bus speed v bandwidth nh sau: o DDR2-400: Cn bandwidth. o DDR2-533: Cn bandwidth. o DDR2-667: Cn bandwidth. o DDR2-800: Cn bandwidth. o DDR2-1066: c gi l PC2-3200. 100 MHz clock, 200 MHz bus vi 3200 MB/s c gi l PC2-4200. 133 MHz clock, 266 MHz bus vi 4267 MB/s c gi l PC2-5300. 166 MHz clock, 333 MHz bus vi 5333 MB/s c gi l PC2-6400. 200 MHz clock, 400 MHz bus vi 6400 MB/s

* DDR3 SDRAM c phn loi theo bus speed v bandwidth nh sau: o o o o DDR3-1333: DDR3-1600: DDR3-1800: DDR3-2000:

................................................ ---------------------------------------------NH NGHA RAM Ram (Random Access Memory ) l b nh truy cp ngu nhin. Khc vi truy cp tun t. C th ly v d c 100 nh c nh a ch t 1n 100. Vi cch truy cp tun t mun ly d liu t nh th 99,cn phi truy cp tun t t nh th 1,2,3.cho n nh th 99.Nhng vi phng thc truy cp ngu nhin, c th truy cp ngay n nh th 99 m khng cn phi qua cc nh trc . C 2 loi Ram c bn l SRAM ( Static Ram ) hay cn gi l Ram tnh v DRAM ( Dynamic RAM) hay cn gi l RAM ng . SRAM l loi Ram ko cn phi refesh m d liu vn khng b mt. Do dung lng ln hn v cng t tin hn. Trong DRAM cn phi c refresh thng xuyn (Hng triu ln mi giy ) m bo d liu lu tr khng b mt i. C SRAM v DRAM u s b mt d liu sau khi tt my. -----------------------------------------------NHIM V CA RAM Ram l ni h iu hnh,ng dng lu tr data CPU c th nhanh chng truy xut. Tng dung lng Ram ng ngha vi vic gim s ln CPU phi ly d liu t Hard Disk, mt qu trnh mt nhiu thi gian hn c d liu trc tip t RAM. (Thi gian truy xut RAM c tnh = ns trong khi thi gian truy xut HD c tnh = mili s) My tnh c nhn cn 1 lng RAM nht nh cho mi ng dng,cng nhiu ng dng bn m, lng RAM cn dng cng nhiu. Vy iu g s xu ra khi RAM y. Rt may l h iu hnh ca chng ta c thit k x l trng hp ny. Khi Ram gn y h iu hnh s ly bt 1 phn d liu t RAM v ghi vo cng, thng l phn t c dung nht. Phn HD dung ghi d liu tm thi ny c gi l PAGE FILE hay SWAP FILE dch sang ting vit c ngha l Tp tin tro i.RAM ca chng ta v th s khng bao gi b y nhng ci gi phi tr s l vic h thnghot ng ch v CPU phi ly qu nhiu d liu t cng. Mt cu hi c t ra l v sao my tnh ca chng ta khng phi l mt c my ch c RAM thay lun cho chc nng ca cng v RAM c tc truy xut rt nhanh. L do rt n gin l RAM b mt d liu sau khi tt my v hn th na gi thnh ca RAM qu t trong vic dng lu tr d liu ln n hng trm GB thm ch vi TB trong cc my tnh ngy nay. -------------------------------------------------CCH TNH BNG THNG CA RAM _ ch Single Channel : S ch c 1 BANK c truy xut trong cng 1 thi im. Data Bus Width s l 64 bit. Nh vy BandWidth = Bus Speed * Bus Width/8 = Bus Speed * 64/8 = Bus Speed *8(S d chia 8 l do Bus width tnh theo n v Bit cn BandWidth litnh theo n v l MB/s 1byte = 8 bit) VD: Vi 1 thanh DDR-SDRAM 400 MHZ th BandWidth = 400 * 64/8 = 3200MB/s v th m ngi ta cn k hiu PC3200

_ th Dual Channel :S c 2 BANK 2 DIMM khc nhau c truy xut cng 1 lc. Lc ny miBank s m 1 knh v Mem Controler. Mi knh c BandWidth l 64 bit nhvy tng BandWidth ca ton b h thng l 128 Bit. Lc ny BandWidth = Bus Speed * 128/8 = Bus Speed * 8. -------------------------------------------------CU TO TRN CHIP NH TRN RAM _RAS ( Row Address Strobe ) L tn hi u xc nh a ch nh theo hng. _CAS ( Column Address Strobe) l tn hi u xc nh a ch nh theo ct. _Address Bus l ng truyn tn hiu RAS v Cas. _Data Bus l ng truyn d liu gia Memory Controler v chip nh. _Khi cn truy xut n 1 a ch nh bt k Memory Controler s gi cc tn hiu RAS v CAS tng xng n Chip nh tng ng vi d liu cnly. -----------------------------------------------------------------ECC V NON ECC CA RAM ECC = Error Correcting Code, l Ram c bit sa li, tc l thay v ram non-ecc c 64 bits th ram ecc s c 64 bits + 1bit ecc. Ram ECC v sau mi ln c c th check c qu trnh c c li hay khng, nn gim thiu li d liu trao i qua ram. Ram bnh thng c th pht sinh li sau mi vi triu tc v, vi Ram ecc, xc sut t hn nhiu ln, gn nh l chnh xc tuyt i. V yu cu bng thng kh c bit (65bits) nn ch c main v CPU h tr mi c th dng c ram ecc, bn cnh , ecc sn xut phc tp v t hn ram thng. Ram ecc thng c dng trong mi trng i hi s chnh xc cao v bn b nn n xut hin trong nhng my server v mini computer, cn PC th khng cn thit phi s dng ram ecc lm g cho tn km. ---------------------------------------------------------------CHNG MINH DUAL CHENNEL CH TNG V BAND WIDTH KHNG TNG BUS SPEED Vi loi RAM DDR - Double Data Rate (DDR, DDR2, DDR3), ta c th thy cc con s 400Mhz, 533Mhz, 667Mhz, 800Mhz, 1066Mhz ghi trn sn phm. Gi l tc Data Tranfer Rate, cn tc Bus thc ca n l Bus Speed = Data Tranfer Rated : 2, nh vy DDR 400 s c Bus Speed = 200, DDR2 800 s c Bus Speed = 400, v.v... Vn tip theo l i vi h thng Intel (nht l dng chipset Intel), ta lun c 1 t l nht nh gia bus thc ca CPU vi bus thc ca RAM, gi l b chia (divider). Trong , Bus thc ca CPU = tc nh danh ca n : h s nhn hoc = FSB : 4 (do cng ngh Quad Data Rate ca Intel ta mi c FSB nh vy).

Nh vy chn RAM th no l ph hp? phi nhn vo Bus thc ca CPU v RAM cng vi b chia ti thiu m bo trnh tht c chai. l t l CPU:RAM = 1:1 (tc l bus CPU < hoc = bus RAM). Do , nu c 1 CPU FSB 800Mhz, ta chn RAM ti thiu l DDR 400Mhz (c 2 cng c Bus Speed = 200, t l l 1:1). Ngoi ra chn RAM cao hn cng ko h lng ph, Chipset c th chy c cc b chia khc nh 2:3, 4:5...=> nh vy ta gii quyt vn th nht: chn RAM vi CPU ko phi da v cch tnh nh on trch trn! Th hai: l Dual channel cho ta ci j? Dual channel ko cho ta tc Bus gp i (bn ch c th tng Bus khi Overclock!), m l bng thng (Bandwidth) gp i, nh rng ca Bus (Bus width) c m rng gp i. Ta c cng thc: Bandwidth = Data Tranfer Rate x Bus Width = (Bus Speed x 2) x Bus Width. Bus ca RAM hay CPU .... l tn s hat ng ca RAM hay CPU (tnh theo MHz). Bus hiu nh ng i ca Data t thnh fn ny ti thnh fn khc. y l Bus t CPU ti RAM. Single Channel l ng ch c 1 chiu t CPU ti RAM, sau mi dng chiu chuyn Data t RAM v li CPU. n gin nh l 1 giy th Data chy t CPU ti RAM, giy k tip li chy t RAM v CPU. Dual Channel cng l ng truyn nhng c 2 chiu: 1 chiu t CPU ti RAM, 1 chiu t RAM ti CPU. n gin hn l trong 1 giy Data chy t CPU ti RAM v ng thi 1 Data khc chy t RAM ti CPU cng trong giy vn tc ko i ca Bus Speed. Ch khc l n c 2 chiu! Ngha l rng ca Bus (Bus width) gp i ch khng phi l bus tng gp i. Ni r thm 1 cht l Single channel, Bus s c rng l 64bits = 8bytes, Dual channel l 128bits = 16bytes. Nh vy l Dual channel cho Bus width gp i dn n Band width tng gp i (theo l thuyt) cn Bus speed ko i, do Data Tranfer Rate cng ko i! ... ------------------------------------------------------NT RING CA DDR3 Xt v hnh thc, DDR3 cng ging vi DDR2, c 240 chn nhng nu bn cm thanh RAM DDR3 vo khe DDR2 s khng va v rnh chia ca DDR3 khc DDR2. dng c DDR3, bn phi c bo mch ch h tr DDR3 hay chn bo mch h tr c 2 chun DDR2 v DDR3 (c 2 khe cm cho ring DDR2 v DDR3). V d, bo mch ch MSI dng Combo gm MSI P35 Platinum Combo, MSI P35 Neo Combo, hoc Gigabyte c GA P35C-DS3R... (xem bng 1) Bng 1: c t DDR2 v DDR3 ca JEDEC DDR2 DDR3

Tc 400-800 MHz 800-1600 MHz in th/dao ng 1,8V +/- 0,1V 1,5V +/- 0,075V Data prefetch 4-bit 8-bit Cu hnh lin kt M hnh T M hnh Fly-by Cm bin nhit Khng C (ty chn) tr CAS 3-5 6-10 Dung lng chip 256Mb 4Mb 512Mb 8Mb Theo JEDEC (xem bng 2), bn d nhn thy DDR3 c tc t 800MHz n 1600MHz. Nh vy c th xem mc 1333MHz l chun thng thng ca dng DDR3 nu da vo BXL sp n ca Intel trn cng ngh 45nm s c FSB 1333MHz. Hin thi v trong tng lai gn, BMC, BXL FSB 1333MHz nht l chipset vn s h tr ngc vi DDR2, nhng vi suy lun thng thng da trn tn s xung chng ta dng nh s gp phi tnh trng tht c chai do h thng khng khai thc ht lung FSB ca CPU. Tuy vy, mt s th nghim ban u ca chng ti ti Test Lab cho thy s khc bit hiu nng h thng gia DDR2 v DDR3 vn cha thc s n tng. n y, bn c th phn no cm nhn c DDR3 xut hin do mt phn sc p ca dng cun CPU. Chng ta s th xem xt 2 tc cao nht ca mi chun: DDR3-1600 v DDR2-800. Theo JEDEC, DDR3-1600 s c tr l 8-8-8, tng ng vi 10ns (xem bng 2). Trong khi , DDR2-800 t mc tr 4-4-4 vi thi gian tng ng 10ns. Nu da trn chi tit ny, bn s d dng nh ng v tc ca DDR2-800 tng ng vi DDR3-1600 (bng 2). Bng 2 Tn s Timings Bng thng ch knh i tr (TRCD) Nm DDR3-800 6-6-6 12.8 GB/s 15.0 ns 2007 DDR3-800 5-5-5 12.8 GB/s 12.5 ns 2007 DDR3-1066 8-8-8 17.1 GB/s 15.0 ns 2007 DDR3-1066 7-7-7 17.1 GB/s 13.1 ns 2007 DDR3-1366 6-6-6 17.1 GB/s 11.2 ns 2007 - 2008 DDR3-1333 9-9-9 21.3 GB/s 13.5 ns 2008 DDR3-1333 8-8-8 21.3 GB/s 12.0 ns 2008 DDR3-1333 7-7-7 21.3 GB/s 10.5 ns 2008 - 2009 DDR3-1600 10-10-10 25.6 GB/s 12.5 ns 2009 DDR3-1600 9-9-9 25.6 GB/s 11.3 ns 2009 - 2010 DDR3-1600 8-8-8 25.6 GB/s 10.0 ns 2009 - 2010 Vy ti sao tr ca DDR2 l 4-4-4 v sang DDR3 tng ln 8-8-8? Tn s ca DDR3 t 1600MHz, gp i ca DDR2 800MHz nh c thng s data prefetch ca DDR3 gp i DDR2. Data prefetch c nhim v chuyn d liu t DRAM lu tr thng tin sang b m xut/nhp. DDR2 dng mu 4-bit v DDR3 dng mu 8-bit nn lu lng d liu t DRAM n b m ca DDR3 gp i DDR2 nhng vn chy trn cng mt bng thng. Do vy, y l nguyn nhn dn n tr ca DDR3 cao gp i ca DDR2. Ngoi ra, b m xut/nhp ca DDR3 phi ti nng hn DDR2. ----------------------------------------------------------------------------------SO SNH DOUBLE DATA RATE VI DUAL CHENNEL

i vi RAM my tnh hin nay, v c bit l DDRAM n s vn chuyn 2 phn d liu trong mt chu k ng h (clock cycle) gi l DOUBLE DATA RATE v hiu sut n s tng ln 2 ln so vi SDRAM ch vn chuyn 1 phn d liu trong mt chu k ng h. V n khng c lin quan g ti vic 2 thanh Ram mnh chy theo cu hnh Dual Channel. chy c theo cu hnh DDR Dual Channel th trc ht main bn phi h tr v cc thanh ram bt buc phi cng tc , dung lng v cng loi (DDR/DDR2/DDR3) v cng nh sn xut l tt nht (mt s trng hp khng cng nh sn xut vn chy c dual nhng t thi). -----------------------------------------------------------------------------------