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Vit chng trnh thc hin iu khin n LED theo s schematic di y trn board NU-LBNUC140. Theo cc yu cu: a. Bt LED5, LED7. Tt LED6, LED8. b. Delay 1s. c. Tt LED5, LED7. Bt LED6, LED8. d. Delay 1s. e. Quay li a.
Hin thc:
Ta c s trng thi sau:
Da vo schematic ta thy cc led tch cc mc thp. C ngha l led sng th phi cho cc port clear v 0. Da vo material timer v board support packet
Bc 1: Kch hot v la chn ngun xung clock cho timer. y s dng tn s 22 MHz v timer 0.
/* Step 1. Enable and Select Timer clock source */ SYSCLK->CLKSEL1.TMR0_S = 0; //Select 12Mhz for Timer0 clock source SYSCLK->APBCLK.TMR0_EN =1; //Enable Timer0 clock source
Bc 3: Thit lp cc s tnh chu k. Chn Prescale = 1. Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP) 1s=(1/12MHz) * (1+1) * TCMP TCMP=6000000.
/* Step 3. Select Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP)*/ TIMER0->TCSR.PRESCALE=1; // Set Prescale [0~255] TIMER0->TCMPR = 6000000; // Set TICR(TCMP) [0~16777215] // (1/12000000)*(1+1)*( 6000000)= 1s
Cho php ngt timer 0 bng lnh: TIMER0 ->TCSR.IE=1 t c ngt ln mc cao: TIMER0 -> TISR.TIF=1 Kch hot ngt timer 0
Bc 5: Kch hot module timer Reset li b m Kch hot timer 0. (cho php nhn xung clock timer 0) Cho php load d liu vo TDR
/* Step 5. Enable Timer module */ TIMER0->TCSR.CRST = 1; //Reset up counter TIMER0->TCSR.CEN = 1; //Enable Timer0 TIMER0->TCSR.TDR_EN = 1; // Enable TDR function
/*---------------------------------------------------------------------------Interrupt subroutine ----------------------------------------------------------------------------*/ static unsigned char count=0; void TMR0_IRQHandler(void) // Timer0 interrupt subroutine { TIMER0->TISR.TIF =1; // set timer interrup flag if(count%2 == 0){ //nu chn DrvGPIO_ClrBit(E_GPC,12); // sng led 1,3 DrvGPIO_ClrBit(E_GPC,14); DrvGPIO_SetBit(E_GPC,13); DrvGPIO_SetBit(E_GPC,15); } else{ //nu l DrvGPIO_ClrBit(E_GPC,13); // sng led 2,4 DrvGPIO_ClrBit(E_GPC,15); DrvGPIO_SetBit(E_GPC,12); DrvGPIO_SetBit(E_GPC,14); } count++; } void Timer_initial(void) { /* Step 1. Enable and Select Timer clock source */ SYSCLK->CLKSEL1.TMR0_S = 0; //Select 12Mhz for Timer0 clock source SYSCLK->APBCLK.TMR0_EN =1; //Enable Timer0 clock source
/* Step 2. Select Operation mode */ TIMER0->TCSR.MODE=1; //Select periodic mode for operation mode /* Step 3. Select Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP)*/ TIMER0->TCSR.PRESCALE=1; // Set Prescale [0~255] TIMER0->TCMPR = 6000000; // Set TICR(TCMP) [0~16777215] // (1/12.000.000)*(1+1)*( 6.000.000)= 1s /* Step 4. Enable interrupt */ TIMER0->TCSR.IE = 1; // enable interrupt TIMER0->TISR.TIF = 1; //Write 1 to clear for safty- enable interrup flag NVIC_EnableIRQ(TMR0_IRQn); //Enable Timer0 Interrupt /* Step 5. Enable Timer module */ TIMER0->TCSR.CRST = 1; TIMER0->TCSR.CEN = 1; TIMER0->TCSR.TDR_EN=1; TDR registers } //Reset up counter //Enable counter // Enable TDR function : load data vo
int main(void) { int i=0,j=0; /* Unlock the protected registers */ UNLOCKREG(); /* Enable the 12MHz oscillator oscillation */ DrvSYS_SetOscCtrl(E_SYS_XTL12M, 1); /* Waiting for 12M Xtal stalble */ SysTimerDelay(5000); hm delay trong library systimer // gi
/* HCLK clock source. 0: external 12MHz; 4:internal 22MHz RC oscillator */ DrvSYS_SelectHCLKSource(0); /*lock the protected registers */ LOCKREG(); DrvSYS_SetClockDivider(E_SYS_HCLK_DIV, 0); /* HCLK clock frequency = HCLK clock source / (HCLK_N + 1) */