ECE590

Tut#4: Transistor (BJT)

1. For the network of Figure 1, determine

(a) IB
(b) IE
(c) VCE
(d) re
(e) Zi
(f) Zo
(g) Av
(h) Ai

(i) Use =80, VBE = 0.7v and ro=  Ω

Figure 1

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2. For the common emitter amplifier circuit below,

(a) Taking =200 and VBE = 0.7v, determine I C and VCE. Hence, sketch
the DC load line and state whether the Q point is in active region or
not.
(b) Using a suitable transistor model, find the voltage gain Av, input
impedance Zi and output impedance Zo of the amplifier. Hence,
determine Vout if the input signal is 1 mV.

Figure 2

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3. Figure 3 shows a single-stage common emitter amplifier using a BJT
transistor having the DC gain  of 120. Given that Vcc = 25 V,
R1 = 40 kΩ, R2 = 4 kΩ, RC = 8 kΩ and RE = 1.2 kΩ. For the transistor,
take VBE = 0.7 V, determine;

(a) VB
(b) VE
(c) VC
(d) IE
(e) IB
(f) IC
(g) the DC load line for the transistor
(h) re
(i) Zi
(j) Zo
(k) Av

State any assumptions made during the analysis.

Figure 3

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4. Design the Voltage Divider bias network as shown in Figure 4 below with
VCC = 25 V,  = 150, IC = 5 mA and VCE = 10 V. Calculate all the
resistance values and sketch the DC load-line for the design. State all
assumptions made. Assume VBE = 0.7 V.

Figure 4