HBK Tp HCMKhoa TBMT GVPT: H Trung M Mn: Vi X L AY1213 Bi tp Chng 1.

1. Gii thiu h VXL tng qut Ch : Trong tt c cc bi tp chng ny chng ta gi s l cc chn chn chip ca b nh ROM, RAM, v thit b I/O l tch cc thp (/CS hay /CE) nu khng c qui nh trc trong bi hay hnh v. 1. Vit cc t iu khin (control word) (hnh 1.14 trong sch VXL) thc hin cc php ton sau: d) R1 Input/4 + (b 1 ca R3)/2 a) R3 2R1 3R2 e) Output (b 2 ca R1) + (b 2 ca R2) b) R3 3R1 2R2 f) R5 16R1 + 8R2 4R32R4 c) R5 4R1 2(R2 R4) 2. Hy cho bit dung lng b nh ln nht (tnh theo byte v word) m CPU c th qun l c nu n c: a) S ng a ch l 16 v s ng d liu l 8. b) S ng a ch l 20 v s ng d liu l 8. c) S ng a ch l 20 v s ng d liu l 16. d) S ng a ch l 24 v s ng d liu l 32. e) S ng a ch l 32 v s ng d liu l 64. 3. Hy cho bit gi tr ca cc c trong thanh ghi trng thi sau khi CPU 8 bit thc thi lnh sau (gi s ban u tt c cc c c tr l 0 trc khi thc thi lnh) a) Cng 2 s 8 bit: +125 vi 18 d) Tr 2 s 8 bit: 104 vi 12 b) Cng 2 s 8 bit: 125 vi 18 e) Tr 2 s 8 bit: 118 vi 37 c) Cng 2 s 8 bit: F5H vi 0BH f) Tr 2 s 8 bit: 128 vi +57 4. Vit m tnh biu thc F = A * (B + C) + D trn cc CPU c lnh 3, 2, 1, v 0 a ch. Khng sp xp li biu thc v khi tnh ton khng lm thay i cc bin A, B, C, v D. 5. Vit m tnh biu thc F = (A + B) * C + D trn cc CPU c lnh 3, 2, 1, v 0 a ch. Khng sp xp li biu thc v khi tnh ton khng lm thay i cc bin A, B, C, v D. 6. Vit m tnh biu thc F = A * C + (B + C)* D trn cc CPU c lnh 3, 2, 1, v 0 a ch. Khng sp xp li biu thc v khi tnh ton khng lm thay i cc bin A, B, C, v D. 7. Hy in vo cc ch trng trong hnh sau cho thy hiu ng ca cc cch nh a ch

Hnh 1. Cc cch nh a ch BT-VXL-Ch 1 trang 1

8. Xt mt b nh c dung lng 2M x 16, word u tin ca b nh ny c byte thp l EDH v byte cao l 05H. Hai byte ny biu din gi tr ca 1 s nguyn c du 16 bit, hy tm gi tr thp phn ca s nguyn ny nu: a) B nh c lu tr theo little endian b) B nh c lu tr theo big endian 9. Xt mt b nh c dung lng 2M x 16, word u tin ca b nh ny c byte thp l D3H v byte cao l 25H, v word k tip c byte thp l 17H v byte cao l 36H. Bn byte ny biu din gi tr ca 1 s nguyn c du 32 bit, hy tm gi tr thp phn ca s nguyn ny nu: a) B nh c lu tr theo little endian b) B nh c lu tr theo big endian 10. Xt cc b nh 32K x 8, 64K x 4, 128K x 16, v 256K x 1, vi mi loi b nh hy cho bit a) S chn a ch v s chn d liu ca b nh ny? b) Dung lng ca b nh ny tnh theo bit, byte v word? 11. Gi s mt b nh 1M x 16 bit c xy dng t cc chip SRAM 256K x 8 bit v word nh c t chc nh a ch theo word 16 bit. a) S SRAM cn dng l bao nhiu? b) Mt word b nh cn truy cp bao nhiu chip SRAM? c) S bank b nh l bao nhiu? (bank b nh l 1 vng nh c xy dng t cc b nh c cng kt ni a ch) d) S bit a ch cn cho 1 chip RAM ? e) S bit a ch cn cho b nh ny? 12. Thit k ROM 3K x 8 t cc chip ROM 1K x 4. 13. Thit k ROM 2K x 8 t cc ROM 256 x 4. 14. Thit k module ROM 64K x 8 t ROM 16K x 32 15. Thit k SRAM 8 x 32 t cc SRAM 8 x 8. 16. Thit k SRAM 16 x 4 t cc SRAM 4 x 4. 17. Thit k SRAM 16K x 8 t: a) Cc SRAM 1K x 1; b) Cc SRAM 2K x 4; c) Cc SRAM 1K x 8 18. S dng cc RAM 64K x 8 (hnh 2) v 1 mch gii m, xy dng s khi cho RAM 256K x 32.

Hnh 2. RAM 64K x 8 Hnh 3. RAM 19. Cho mt chip b nh chun nh hnh 3. a) Tnh s nh ca chip ny (theo K vi 1 K=1024) b) Vit phng trnh tnh s ng a ch khi bit s nh? c) Hy thit k b nh 40K t cc chip b nh trn (c th s dng thm cc cng logic). 20. Hy dng cc mch logic thch hp thit k mch nhn d liu n v ch vi truyn d liu song song bt ng b dng xung strobe (xung ly mu) xut pht t n v ngun. 21. Hy dng cc mch logic thch hp thit k mch pht d liu n v ngun vi truyn d liu song song bt ng b dng xung strobe (xung ly mu) xut pht t n v ch. 22. V dng sng ca khung truyn trong truyn d liu ni tip bt ng b khi truyn 1 byte 57H vi LSB c truyn i trc cho cc trng hp sau: (nu bit tc truyn l 4800 bps) a) D liu 7 bit, khng c parity v 1 bit stop. b) D liu 7 bit, c parity l v 2 bit stop. c) D liu 8 bit, khng c parity v 1 bit stop. d) D liu 8 bit, c parity l v 1 bit stop. BT-VXL-Ch 1 trang 2

e) D liu 8 bit, c parity chn v 1 bit stop. Ch : Phi ghi r chu k bit, tn ca cc bit Start, Stop, Parity, v d liu (D0=LSB . . .) 23. Hy lp bng b nh cho cc tn hiu CS trong hnh sau:

Hnh 4. 24. Hy lp bng b nh ca cc mch hnh 5 v 6, t suy ra dung lng ca cc h thng b nh ny. Cc mnh ny dng kiu gii m a ch g? (ton phn hay 1 phn). Bit h thng ny dng CPU c 20 ng a ch v c tn hiu IO/M iu khin truy cp b nh hay I/O (0: b nh, 1: I/O)

Hnh 5. Gii m a ch ch bng decoder.

Hnh 6. Gii m a ch ch bng cc cng logic.

BT-VXL-Ch 1 trang 3

25. Hy lp bng b nh ca hnh sau, t suy ra dung lng ca cc h thng b nh ny. Mnh ny dng kiu gii m a ch g? (ton phn hay 1 phn).Bit h thng ny dng CPU c 16 ng a ch v c tn hiu IO/M iu khin truy cp b nh hay I/O (0: b nh, 1: I/O)

Hnh 7. Gii m a ch ch bng decoder. 26. Hy tm dung lng ca mi SRAM v lp bng b nh ca mch sau: (74139 l mch gii m 2 sang 4)

Hnh 8. Gii m a ch ch bng decoder v cc cng logic. 27. Thit k 1 module b nh ch bng cc ROM 4K, SRAM 1K v cc mch gii m 74138 vi di a ch ca cc cc b nh nh sau: ROM 1: 0000H0FFFH ROM 3: 2000H2FFFH SRAM 2: 6400H67FFH ROM 2: 1000H1FFFH SRAM 1: 6000H63FFH 28. Thit k 1 module b nh ch bng ROM 4K, SRAM 1K v cc mch gii m 74138 vi di a ch ca cc cc b nh nh sau: ROM 1: 0000H0FFFH ROM 3: 4000H4FFFH SRAM 2: A000HA3FFH ROM 2: 2000H2FFFH SRAM 1: 8000H83FFH 29. Thit k mch gii m a ch dng 74138 vi bng b nh sau SRAM 1: 2000H3FFFH ROM 2: 6000H7FFFH ROM 3: C000HDFFFH ROM 1: 4000H5FFFH SRAM 2: A000HBFFFH 30. Xt 1 h VXL dng CPU c 8 ng d liu v 16 ng a ch. H ny dng 1 ROM 8K x 8 v 2 SRAM 8K x8 vi bng b nh sau: ROM: 0000H1FFFH SRAM 1: 2000H3FFFH SRAM 2: 4000H5FFFH BT-VXL-Ch 1 trang 4

Hy thit k mch gii m a chi theo: a) gii m ton phn; b) gii m mt phn. 31. Thit k mch gii m a ch cho CPU c 20 bit a ch, 8 bit d liu c th truy cp RAM 64KB vi vng a ch l 00000H 0FFFFH. Bit RAM c s hiu l HM62864 vi cc ng tn hiu: /CS1, CS2 l 2 ng chn chip /OE cho php xut /WE cho php ghi 16 ng a ch A15...A0 8 ng d liu I/O7...I/O0 v CPU c cc ng iu khin b nh l /MEMW v /MEMR. 32. Thit k mch gii m a ch cho CPU c 20 bit a ch, 8 bit d liu vi bng b nh nh sau: 00000 H 3FFFFH : RAM 0 256 KB 40000 H 7FFFFH : RAM 1 256 KB 80000 H BFFFFH: RAM 2 256 KB E0000 H EFFFFH: ROM 0 64 KB F0000 H EFFFFH: ROM 1 64 KB 33. Hy lp bng I/O cho cc mch gii m a ch I/O sau:

Hnh 9.

Hnh 10.

34. Vi mch gii m a ch thit b I/O sau hnh 11. Bit khi truy cp I/O th tn hiu /IORQ = 0. a) Hy cho bit cc PORT 1 v PORT 2 ng vai tr g? (cng xut hay nhp) b) Tm a ch ca cc PORT 1 v PORT 2. M t lm cch no CPU c th c vo hay xut ra qua cc chn IO ca mch.

Hnh 11. Gii m a ch ca cng I/O. BT-VXL-Ch 1 trang 5

35. Thit k mch gii m a ch dng 74138 v 1 s cng logic nu cn chn 8 thit b I/O c ng CS tch cc thp vi cc a ch I/O tng ng l F0HF7H. Bit CPU c ng /IORQ, cc ng /RD v /WR, v 8 ng a ch dnh cho cc thit b xut nhp. 36. Vi s mt kit VXL (CPU c 16 bit a ch v 8 bit d liu) nh hnh 12, hy tm bng b nh v I/O ca kit (c 6 RAM 8 KB, 1 cng nhp, 1 cng xut). Ta phi truy cp a ch g v ni dung D0 l bao nhiu : a) c c trng thi ca nt nhn SW b) lm tt hoc lm sng n LED (Q=0 s lm n LED sng)

Hnh 12. 37. Thit k mch gii m a ch cho CPU c 16 bit a ch, 8 bit d liu vi bng b nh v I/O nh sau: 0000H 5FFFH : EPROM 24 KB 6000H 7FFFH : Ngoi vi 8 KB 8000H FFFFH : SRAM 32 KB 38. V lu minh ha tnh giai tha ca n (n!). 39. V lu minh ha tnh gi tr tuyt i ca mt s N 40. V lu minh ha nhn 2 s 8 bit bng php ton cng v dch bit.

BT-VXL-Ch 1 trang 6