module LFSR_5bit (Serial_out2, clk_B, enable2,seed2,Coefficient2);

//-------------------PARAMETERS---------------parameter Length2 = 5;
//-------------------INPUTS---------------------input [Length2-1:0] Coefficient2;
input clk_B, enable2;
input [0:Length2-1] seed2;
//-------------------OUTPUTS------------------output Serial_out2;
wire Serial_out2;
//----------------------VARIABLES---------------reg [0: Length2-1] Y_B;
integer ptr;
//------------------MAIN_LOGIC-----------------always @ (posedge clk_B)
begin
if (enable2 == 1) Y_B<= seed2; // Active-low reset to initial state
else begin
for(ptr=0;ptr<Length2-1;ptr=ptr+1)
begin
Y_B[ptr]<=Y_B[ptr+1];
end //-----end of for loop
Y_B[Length2-1]<=(Coefficient2[4]&Y_B[4])^(Coefficient2[3]&Y_B[3])^(Coefficien
t2[2]&Y_B[2])^(Coefficient2[1]&Y_B[1])^(Y_B[0]);
end //----end of else
end//------end of always
assign Serial_out2= Y_B[Length2-1];
endmodule