Tng quan cc c tnh

2005 2006 Microchip Microchip Technology Technology Incorporated. Incorporated. All Rights All Rights Reserved. Reserved.

101 ASP

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T kha cu hnh
CP bit 13 DEBUG WRT1 WRT0 CPD LVP BOREN \PWRTEN WDTEN FOSC1 FOSC0 bit 0

c nh v trong khng gian b nh chng trnh, bn ngoi phm vi ca b m chng trnh.

c dng ci t tnh nng cho thit b :

Bo v m lnh: CP,CPD Ch cho b dao ng Watchdog Timer: WDTEN Power Up Timer: PWRTEN Brown Out Reset: BORTEN Lp trnh ch in p thp:LVP Ghi b nh Flash: WRT1,WRT0

C th c ti cc thi im ca chng trnh vi hu ht cc PIC16. ( PIC16F877A: a chi 2007h, mc nh 3FFFh)

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CHN B TO DAO NG CHO PIC16

XT HS LP B dao ng thch anh vi tn s chun B dao ng thch anh vi tn s cao B dao ng thch anh vi tn s thp 100kHz - 4MHz 4MHz - 20MHz 5kHz - 200kHz

RC INTRC

B dao ng RC bn ngoi B dao ng RC bn trong

DC - 4MHz 4 or 8 MHz 2%

La chn c xung clock thch hp s mang n s linh ng cho ngi thit k:

B dao ng LP c thit k gim dng tiu th RC hay INTRC gip gim gi thnh cho b to dao ng XT c ti u cho hu ht cc tn s dao ng thng thng HS c ti u hot ng vi thch anh hay b dao ng tn s cao

Nhng di tn s trn chi dng tham kho (tham kho chi tit trong Datasheet phn Oscilator)
2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP

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POR, OST, PWRT

POR: Power On Reset
Khi MCLR t n VDD th mt xung reset s c to ra Thit bi s reset trong TPWRT=72ms (bnh thng) cho phep VDD tng n mc chp nhn (chi sau POR) Gi cho thit bi reset trong TOST=1024 chu k thch anh hay b dao ng n inh tn s v bin ; khng tc dng ch RC. Bt u sau POR hay thc dy (Wake Up) t ch ng (SLEEP)
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VDD MCLR TPWRT PWRT TOST OST

PWRT: Power Up Timer

OST: Oscillator Start-up Timer

Reset

Execution

2006 Microchip Technology Incorporated. All Rights Reserved.

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Ch Sleep

B x l c th c t ch gim cng sut bng cch thc thi chi th Sleep

B dao ng h thng c dng li Trng thi b x l c duy tr (thit k tnh) Watchdog timer tip tc chy, nu cho phep Dng cung cp gim xung ti thiu gn bng dng r (0.1 - 2.0A ty loi)
Nhng s kin nh thc b x l t trng thi ng
MCLR WDT INT TMR1 ADC CMP CCP PORTB SSP PSP Master Clear chn c xc nhn (xung mc thp) Watchdog Timer n gi t Chn ngt ni ( INT interrupt PIN) Ngt Timer 1 (hay TMR3 trn PIC18) Ngt khi chuyn A/D xong Ngt khi b so snh ng ra thay i S kin bt ng vo Thay i ngt trn PORT B Ngt do bit Start/ Stop trong cng truyn ng b ni tip (Ch I2C ) Cng song song ph c hay ghi
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2006 Microchip Technology Incorporated. All Rights Reserved.

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Watchdog Timer

Phc hi khi phn mm b s c S dng chnh b dao ng RC ca chip WDT b xa bi chi th CLRWDT WDT c cho php khng th hin trn phn mm WDT trn s reset chip Khong thi gian lp trnh: 18ms n 3.0s ty chn Hot ng SLEEP; khi n gi, nh thc CPU
WDT Ripple Counter Postscaler

WDTEN Configuration Bit

2006 Microchip Technology Incorporated. All Rights Reserved.

8:1 Mux WDT Timeout

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BOR-Brown Out Reset

Khi st p di gi tr ngng th thit b s gi trng thi reset. Ngn cn s hot ng khng n nh hoc khng mong mun. Thay th cho mch BOR ngoi
Bi ging VI IU KHIN NG DNG Slide 7

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PBOR-Lp trnh BOR

1.
2.

3.

La chn cu hnh(set at program time) - Khng cho php/cm trong phn mm. Bn chn la im ngt ca BVdd . - 2.5V_gi tr nh nht cho OTP PIC - 2.7V - 4.2V - 4.5V i vi gi tr ngng khc,s dng b gim st bn ngoi.(MCP1xx,MCP8xx,/TCM8xx,or TC12xx)

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(P)BOR-Brown out set

Gi PIC reset trong ~72ms sau khi VDD tng li n gi tr ngng.

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PLVD-Lp trnh kim tra in p thp.

1.

2.

3.

Cnh bo sm trc khi Brown out 16 im ngt chn: - 1.8V~4.5V - Bc p 0.1~0.2v - Ng vo l Analog bn ngoi VREF ly bn trong.

2006 Microchip Technology Incorporated. All Rights Reserved.

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In-Circuit Serial Programming

Chi cn 2 chn lp trnh. Thun li cho lp trnh trc tip h thng

inh c d liu Sp xp d liu

Pin VPP VDD VSS RB6 RB7

Function in p lp trnh= 13V in p ngun cp Ground Ng vo clock ng vo d liu I/O

c h tr bng MPLAB PM3 & ICD2

Application PCB

VDD

VDD

MCLR/VPP

PIC16Fxxx

ICSP Connector

ICSP Connector

VDD VSS RB6 RB7

To application circuit

Isolation circuits

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I/O Ports
VDD

Kh nng li dng cao

Data Bus Write PORTx

Q Q

C th iu khin LED trc tip

RESET D Q Q VSS

I/O Pin

Thao tc bit trc tip

Mi chn c iu khin ring l bi phn mm

Write TRISx

Read PORTx

Mi chn c ESD diode bo v Chn RA4 thng m x Tt c cc chn I/O c set mc cao khi khi ng Tt c cc tch hp chc nng analog c xc lp l u vo analog khi khi ng
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Cu trc cc chn I/O

Bit 1 of TRISB Register

movwf PORTB
Write Operation

PORTB Bit 1 Latch

1 = RB1 is input 0 = RB1 is output

Bit 1 of Data Bus

RB1

Read Operation

movf PORTB,w
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I/O Ports
I/O Pin Direction Control
TRISB PORTB
1 1 0 1 1 0 0 0

In

In

Out

In

In

Out Out Out

Bit th n TRISx iu khin gi tr ca bit th n PORTx 1 = Input, 0 = Output

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Cc bi thc hnh
2005 2006 Microchip Microchip Technology Technology Incorporated. Incorporated. All Rights All Rights Reserved. Reserved. 101 ASP

Slide Slide 15 15

MPLAB ICD2
Phng th nghim Trn lp

Proteus Simulation

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PICDEM 2 Plus Board

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Mu hp ng MPASM
Chng trnh MPASM mu
1 2 3 4 5 6 RESET_V 7 8 9 INT_V 10 11 START 12 13 LIST p=16f877a #include <p16f877a.inc> org 0x0000 goto START org 0x0004 retfie {Begin your code here} END ;Xc nh r b x l ;nh ngha nhn th vin cha lnh ;t dng m tip theo ti a ch 0x0000 ;Vector Reset ;t dng m tip theo ti a ch 0x0004 ;Vector Ngt ;M lp trnh ca bn nm y ;Cho MPASM bit y l ch kt thc

Nu khng dng ngt, dng 8 v 9 c b i Cc nhn bn ct tri c th l bt c g bn mun; y chi l cc v d

2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP

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18

nh r C s

Mc nh, trnh hp ng MPASM cho rng cc s h thp lc (Hex) C th thay i mc nh bng IDE hoc bng cch thm r=hex hoc r=dec nh l thng s trc tip vo LIST
LIST p=16f877a, r=dec

Thc t mun lp trnh tt ngh c s phi c nh ngha r rng:

C s Nh phn Thp phn

C php MPASM b10101010 d25 or .25

Thp lc phn
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h2A or 0x2A
Bi ging VI IU KHIN NG DNG Slide 19

Lab 1: Nhim v

Bt LED c kt ni vo bit 0 ca PORTB (RB0)

RB0 37 470 R21

PIC16F877A

D2 J6

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Lab 1: Cu trc chng trnh

START Xa cc cht u ra PORTB Cho 4 bit thp ca PORTB l u ra Bt LED RB0 (PORTB,0)
Chuyn qua Bank 1

1 lnh

Np s vo W

4 lnh

Chuyn gi tr vo TRISB Chuyn qua Bank 0

1 ln

1 lnh: goto $ (i ti chnh n)

Lp mi y

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Lab 1: Mu
Lab 1: Hello, world! cho cc Vi iu khin 1 2 3 4 5 6 RESET_V 7 8 START 9 10 11 12 13 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> org goto 0x0000 START

;Vector Reset ;Xa cc cht u ra PORTB ;Chuyn qua bank 1 ;Np vo g.tr 4 bit thp lm u ra ;Chuyn gi tr voTRISB ;Chuyn qua bank 0 ;Bt LED RB0 ;Lp mi y

{1st Instruction} {2nd Instruction} {3rd Instruction} {4th Instruction} {5th Instruction} {6th Instruction} goto $ END

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Lab 1: Li gii
Lab 1: Hello, world! cho cc Vi iu khin 1 2 3 4 5 6 RESET_V 7 START 8 9 10 11 12 13 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> org goto clrf bsf movlw movwf bcf bsf goto $ END 0x0000 START PORTB STATUS,RP0 b11110000' TRISB STATUS,RP0 PORTB,0

;Vector Reset ;Xa cc cht u ra PORTB ;Chuyn qua bank 1 ;Np vo g.tr 4 bit thp lm u ra ;Chuyn gi tr vo TRISB ;Chuyn qua bank 0 ;Bt LED ti RB0 ;Lp mi y

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Lab 1: Kt qu

Bn va hc c:
Lm cch no lp trnh mt thit bi v chy lnh dng MPLAB ICD2 Lm sao thit lp mt port I/O Lm sao thao tc cc chn I/O Lm sao vit mt lnh lp v hn (tng ng vi while(1) trong C)

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Lab 2: Nhim v

Lm LED c kt ni vo bit 0 ca PORTB (RB0) nhp nhy

37 470 R21

RB0

PIC16F877A

D2 J6

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Lab 2: Nhim v

Cn mt tr (delay) to nhp nhy chm m mt quan st c. Ti 4MHz, mt lnh thc thi trong 1 s Mt b m bng phn mm 16 bit l thc hin tr.

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t tn cc Thanh ghi / Hng s

Cch gn: MyReg0 equ 0x20 MyReg1 equ 0x21 MyReg2 equ 0x23 Cch Block hng s: CBLOCK 0x20 MyReg0 MyReg1: 2 MyReg2 ENDC

;MyReg0 = 0x20 ;MyReg1 = 0x21 ;MyReg2 = 0x23

;MyReg0 = 0x20 ;MyReg1 = 0x21 ;MyReg2 = 0x23

Bi ging VI IU KHIN NG DNG Slide 27

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Lab 2: Cu trc chng trnh

START

Ging Lab 1

Ci t PORTB

1 lnh

Bt LED ti RB0

1 lnh Gi chng trnh con

1 lnh 1 lnh Gi chng trnh con

Delay

Tt LED ti RB0

Delay

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Lab 2: Cu trc chng trnh

Delay

Chng trnh con to tr

1 lnh

START

COUNTERL--

Gi : dng decfsz
1 lnh
COUNTERL = 0?

No Yes
1 lnh
COUNTERH--

No
1 lnh
COUNTERH = 0?

Yes
1 lnh
RETURN

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Lab 2: Mu Phn 1
Lab 2: Nhp nhy LED 1 2 3 4 5 6 7 8 9 10 11 RESET_V 12 13 START 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> cblock 0x020 COUNTERL COUNTERH endc org goto clrf bsf movlw movwf bcf 0x0000 START PORTB STATUS,RP0 b11110000' TRISB STATUS,RP0

;Vector reset ;Xa cc cht ng ra PORTB ;Chuyn qua bank 1 ;Np g.tr 4 bit thp lm u ra ;Chuyn gi tr vo TRISB ;Chuyn qua bank 0

;TIP TC SLIDE K TIP

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Lab 2: Mu Phn 2
Lab 2: Nhp nhy LED - Tip theo 18 LOOP 19 20 21 22 23 24 DELAY 25 26 27 28 29 30 {1st Instruction} {2nd Instruction} {3rd Instruction} {4th Instruction} {5th Instruction} {6th Instruction} {7th Instruction} {8th Instruction} {9th Instruction} {10th Instruction} END ;Bt ;Gi ;Tt ;Gi ;Lm LED ti RB0 chng trnh con to tr LED ti RB0 chng trnh con to tr li LOOP chnh

;Gim COUNTERL ;Nu cha bng 0, tip tc gim COUNTERL ;Gim COUNTERH ;Nu cha bng 0, gim tip COUNTERL ;Tr v chng trnh chnh

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Lab 2: Bi gii Phn 1

Lab 2: Nhp nhy LED 1 2 3 4 5 6 7 8 9 10 11 RESET_V 12 13 START 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> cblock 0x020 COUNTERL COUNTERH endc org goto clrf bsf movlw movwf bcf 0x0000 START PORTB STATUS,RP0 b11110000' TRISB STATUS,RP0

;Vector reset ;Xa cc cht ng ra PORTB ;Chuyn qua bank 1 ;Np g.tr 4 bit thp lm u ra ;Chuyn gi tr vo TRISB ;Chuyn qua bank 0

;TIP TC SLIDE K TIP

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Lab 2: Bi gii Phn 2

Lab 2: Nhp nhy LED - Tip tc 18 LOOP 19 20 21 22 23 24 DELAY 25 26 27 28 29 30 bsf call bcf call goto decfsz goto decfsz goto return END PORTB,0 DELAY PORTB,0 DELAY LOOP COUNTERL DELAY COUNTERH DELAY ;Bt ;Gi ;Tt ;Gi ;Lm LED ti RB0 chng trnh con to tr LED ti RB0 chng trnh con to tr li LOOP chnh

;Gim COUNTERL ;Nu cha bng 0, tip tc gim COUNTERL ;Gim COUNTERH ;Nu cha bng 0, gim tip COUNTERL

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Lab 2: Kt qu

Bn va hc c:
Lm th no inh nhn thanh ghi Lm sao thc hin mt thao tc lp (loop) Lm sao thc hin to tr bng phn mm Lm sao dng lnh b qua (skip) Lm sao gi mt chng trnh con

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34

Lab 3: Nhim v

Dng mt trong cc lnh xoay, di chuyn LED sng dc 4 bit thp ca PORTB. Khi n ti mt bn, a n v ch bt u.

RB3

RB2

RB1

RB0

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Lab 3: Cu trc chng trnh

START M ci t ging Lab1 Ci t PORTB Set c nh Xoay tri PORTB

Ch : lnh xoay hot ng vi 9 bit, bao gm mt bit nh trong thanh ghi trng thi nh bit th 9

1 lnh

1 lnh

1 lnh
1 lnh

RB3=0?

Set c nh

1 lnh Gi chng trnh con t Lab2

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Delay
Slide 36

Lab 3: Hng dn Phn 1

lab 3: xoay LED 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> Cblock 0x020 COUNTERL COUNTERH Endc Org RESET_V goto START clrf bsf movlw movwf bcf 0x0000 START PORTB STATUS, RP0 b11110000 TRISB STATUS, RP0

; reset vector ;xo chn cht u ra portB ; chuyn n BANK1 ; Load gi tr lm 4 bit thp tt ; chuyn gi tr n PORTB ; chuyn n BANK0

; CONTINUED ON NEXT SLIDE

PHM NGUYN HUY CNG Bi ging VI IU KHIN NG DNG Slide 37

Lab 3: Hng dn Phn 2

lab 3: xoay LED tip theo 18 19 20 21 22 23 24 25 26 27 28 29 30 31 LOOP {lnh th nht} {lnh th hai} {lnh th ba} {lnh th t } { lnh th nm } { lnh th su } ; t bit c nh khi xoay ln u tin ; xoay tri PORTB ; gi chng trnh con DELAY ; xem LED chn RB3 c sng ko? ; nu c set bit c nh ; lp vng chng trnh chnh ; gim gi tr thanh ghi COUNTERL ; nu cha bng 0 th tip tc gim COUNTERL ; gim gi tr thanh ghi COUNTERH ; nu cha bng 0 tip tc gim COUNTERL ln na ; tr v chng trnh chnh

DELAY decfsz COUNTERL Goto DELAY Decfsz COUNTERH Goto DELAY Return END

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38

Lab 3: Bi gii Phn 1

lab 3: xoay LED 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 LIST p=16f877a #include <p16f877a.inc> Cblock 0x020 COUNTERL COUNTERH Endc Org RESET_V goto START clrf bsf movlw movwf bcf 0x0000 START PORTB STATUS, RP0 b11110000 TRISB STATUS, RP0

; reset vector ;xo chn cht u ra portB ; chuyn n BANK1 ; Load gi tr lm 4 bit thp tt ; chuyn gi tr n PORTB ; chuyn n BANK0

; CONTINUED ON NEXT SLIDE

PHM NGUYN HUY CNG Bi ging VI IU KHIN NG DNG Slide 39

Lab 3: Bi gii phn 2

lab 3: xoay LED tip theo 18 19 20 21 22 23 24 25 26 27 28 29 30 31 LOOP bsf rlf call btfsc bsf goto STATUS, C PORTB, f DELAY PORTB, 3 STATUS, C LOOP ; t bit c nh khi xoay ln u tin ; xoay tri PORTB ; gi chng trnh con DELAY ; xem LED chn RB3 c sng ko? ; nu c set bit c nh ; lp vng chng trnh chnh ; gim gi tr thanh ghi COUNTERL ; nu cha bng 0 th tip tc gim COUNTERL ; gim gi tr thanh ghi COUNTERH ; nu cha bng 0 tip tc gim COUNTERL ln na ; tr v chng trnh chnh

DELAY decfsz COUNTERL Goto DELAY Decfsz COUNTERH Goto DELAY Return

END

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Lab 3: Kt qu

Bn c hc:
Cch s dng cc lnh xoay. Cch s dng cc lnh kim tra v nh mt bit.

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Lab 4: Yu cu

Ging nh Lab 3, nhng ln ny xoay LED c thc hin lin tc.

Rotate Left
RB3 RB2 RB1 RB0

Rotate Right

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Lab 4: Cu trc chng trnh

START

Ci t ging m trong Lab 1

Setup PORTB

bsf STATUS,C
1 lnh 1 lnh gi chng trnh con 2 lnh 1 lnh
No

Set Carry Bit

Rotate Left PORTB

Delay

RB3 = 1?

Yes
Rotate Right PORTB

1 lnh gi chng trnh con

2 lnh
No

Delay

RB0 = 1?

Yes
PHM NGUYN HUY CNG Bi ging VI IU KHIN NG DNG Slide 43

Lab 4: Hng dn

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

Ci t ging vng lp trong Lab 3.

lab 3: xoay LED tip theo bsf LEFT STATUS, C ; t bit c nh khi xoay ln u tin ; xoay tri PORTB ; gi chng trnh con DELAY ; xem LED chn RB3 c sng ko? ; nu khng xoay tri ln na ; xoay phi PORTB ; gi chng trnh con DELAY ; xem LED chn RB0 c sng ko? ; nu khng xoay phi ln na ; nu c xoay tri ; gim gi tr thanh ghi COUNTERL ; nu cha bng 0 th tip tc gim COUNTERL ; gim gi tr thanh ghi COUNTERH ; nu cha bng 0 th tip tc gim COUNTERL ln na ; tr v chng trnh chnh {lnh th nht} {lnh th hai} {lnh th ba} { lnh th t } {lnh th nm} {lnh th su} {lnh th by} { lnh th tm } { lnh th tm }

RIGHT

DELAY decfsz COUNTERL Goto DELAY Decfsz COUNTERH Goto DELAY Return END

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44

Lab 4: Bi gii
lab 3: xoay LED tip theo
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 bsf LEFT STATUS, C ; t bit c nh khi xoay ln u tin ; xoay tri PORTB ; gi chng trnh con DELAY ; xem LED chn RB3 c sng ko? ; nu khng xoay tri ln na ; xoay phi PORTB ; gi chng trnh con DELAY ; xem LED chn RB0 c sng ko? ; nu khng xoay phi ln na ; nu c xoay tri ; gim gi tr thanh ghi COUNTERL ; nu cha bng 0 th tip tc gim COUNTERL ; gim gi tr thanh ghi COUNTERH ; nu cha bng 0 th tip tc gim COUNTERL ln na ; tr v chng trnh chnh rlf PORTB, f call DELAY btfss PORTB, 3 goto LEFT rrf call btfss goto goto PORTB, f DELAY PORTB, 0 RIGHT LEFT COUNTERL DELAY COUNTERH DELAY

RIGHT

DELAY decfsz Goto Decfsz Goto Return END

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Lab 4: Kt qu

Bn c hc:
Lm th no x l trong phn mm v a ra nhng chui tc ng khc nhau.

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Lab 5: Nhim V

S dng phng php tra bng tm cc BIT mu v hin th ra PORTB

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Lab 5: Cu trc chng trnh

1 lnh
Ging Lab 1 1 lnh 1 lnh 1 lnh Goi chng trnh con

2 lnh
3 lnh 1 lnh 1 lnh 1 lnh

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Lab 5:V du mu Phn 1

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Lab 5: V d mu Phn 2

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Lab 5: V d mu Phn 3

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Lab 5: Li gii Phn 1

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Lab 5: Li gii Phn 2

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Lab 5: Li gii Phn 3

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Lab 5:Kt qu

Bn hc c:
Cch thc hin tra bng Cch c d liu bng phng php bng Cch gi chng trnh con trong trang khc Cch thc hin mt lnh nhy

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Tm tt

Kin trc PIC16 Tp lnh PIC16 T chc b nh PIC16 K thut lp trnh n gin

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Tham kho

PICmicro MCU Mid-Range Family Reference Manual (DS33023A) Microchip Technology Programming and Customizing PICmicro Microcontrollers by Myke Predko Design with PIC Microcontrollers by John B. Peatman
Bi ging VI IU KHIN NG DNG Slide 57

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Tham kho

123 PIC Microcontroller Experiments for the Evil Genius by Myke Predko

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Cm n

2005 2006 Microchip Microchip Technology Technology Incorporated. Incorporated. All Rights All Rights Reserved. Reserved.

101 ASP

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