GUJARAT TECHNOLOGICAL UNIVERSITY

M.E. (VLSI System Design) w.e.f. (28/2/2012) PROPOSED TEACHING SCHEME (SEMESTER-II)
Subject Code NAME OF SUBJECT TEACHIN G SCHEME (HOURS) THEO TUTORI PRACTIC RY AL AL 3 0 0 3 0 0 4 0 2 3 4 3 0 20 0 0 2 0 2 2 0 0 4 8 CREDI TS

1720001 1724201 1724202

1724208

Principles of Management Power Efficient VLSI Design Testing and Verification of VLSI Design Major Elective -II Major Elective -III Institute Elective-II Mixed Signal VLSI Design Lab Total

3 3 5 4 4 4 2 25

Institute Elective II
Subject Code 1724206 1724207 Subject Name Electronics System Level Design Hardware Software Co-Design

Major Elective -II

Subject Code 1722607 1724203 Subject Name VLSI Signal Processing RF CMOS IC Design

Major Elective - III

Subject Code 1724204 1724205 Subject Name HDL based Design with Programmable Logic Analog and Mixed Signal VLSI Design