---------------------------------------------------------------------------------- Company: -- Engineer: --- Create Date: 16:23:13 02/04/2014 -- Design Name: -- Module Name: counter_4bit_new - Behavioral -- Project

Name: -- Target Devices: -- Tool versions: -- Description: --- Dependencies: --- Revision: -- Revision 0.01 - File Created -- Additional Comments: ---------------------------------------------------------------------------------library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.numeric_std.all; entity counter_4bit_new is Port ( req : in STD_LOGIC; clk : in STD_LOGIC; reset : in std_logic; DIP_sw: std_logic_vector(2 downto 0); Grant : out STD_LOGIC; Deny : out STD_LOGIC; end counter_4bit_new; architecture Behavioral of counter_4bit_new is type state_type is (s0,s1,s2); --type of state machine. signal current_s,next_s: state_type; --current and next state declaration. signal signal signal signal begin clk_div : std_logic; clk_counter : std_logic; count_temp : std_logic_vector(3 downto 0) := "0000"; ten_sec : std_logic;

process (clk_div,reset) begin if (reset='1') then current_s <= s0; --default state on reset. elsif (rising_edge(clk)) then current_s <= next_s; --state change. end if; end process; --scale clock frequency process(clk) variable clk_count : std_logic_vector(25 downto 0) := (others => '0'); begin if clk'event and clk='1' then

clk_count := std_logic_vector(unsigned(clk_count) + 1); clk_div <= clk_count(25); end if; end process;

process(clk_div) --3 sec begin if clk_counter'event and clk_counter='1' then if (count_temp = "0011") then count_temp = "0000"; else count_temp <= count_temp + 1; end if; end if; end if; end process; process(clk_div) --10 sec begin if clk_counter'event and clk_counter='1' then if (count_temp = "1010") then count_temp = "0000"; else count_temp <= count_temp + 1; end if; end if; end if; end process;

process (current_s,req) begin case current_s is when s0 => --when current state is "s0" if(req ='1') then if(DIP_sw(0)) Grant <= '1'; Deny <= '0'; prev_light <= '0'; next_s <= s1; --3sec break; -- dont know can use end if; if(prev_light) Grant <= '1'; Deny <= '0'; next_s <= s1; --3sec break; end if; if(ten_sec) Grant <= '1'; Deny <= '0'; prev_light <= '1'; next_s <= s1; --3sec break;

end if; Grant <= '0'; Deny <= '1'; next_s <= s1; else next_s <= s0; end if; when s1 => --when current state is "s1" if(count_temp ="0011") then Grant <= '0'; Deny <= '0'; next_s <= s0; else next_s <= s1; end if; end case; end process; end Behavioral;

--3sec --3sec